JPH0567770A - Photoelectronic integrated circuit device - Google Patents

Photoelectronic integrated circuit device

Info

Publication number
JPH0567770A
JPH0567770A JP25425891A JP25425891A JPH0567770A JP H0567770 A JPH0567770 A JP H0567770A JP 25425891 A JP25425891 A JP 25425891A JP 25425891 A JP25425891 A JP 25425891A JP H0567770 A JPH0567770 A JP H0567770A
Authority
JP
Japan
Prior art keywords
optoelectronic
chip
integrated circuit
optical
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25425891A
Other languages
Japanese (ja)
Other versions
JP3413839B2 (en
Inventor
Akihiko Okuhora
明彦 奥洞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP25425891A priority Critical patent/JP3413839B2/en
Priority to US07/939,694 priority patent/US5357122A/en
Publication of JPH0567770A publication Critical patent/JPH0567770A/en
Application granted granted Critical
Publication of JP3413839B2 publication Critical patent/JP3413839B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/43Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Integrated Circuits (AREA)

Abstract

PURPOSE:To provide an photoelectronic integrated circuit device with a structure easy to manufacture and a simple photo-coupling structure as well as an accurate and simplified power supply for each photoelectronic IC chip. CONSTITUTION:A plurality of projecting parts 6 for mounting photoelecrtrnoic IC chips 4 are provided in an optical wiring board 1. A slope 5 coated with a reflecting film 2 is formed at the surrounding side part of the projecting part 6. The slope 5 is formed corresponding to the location of a light emitting device 11 and a photodetector 12 in the photoelectronic IC chip 4 so that light emitted from the emitting device 11 is reflected by the slope 5 and is transmitted along an optical waveguide 3. Then, the light reflected by another slope 5 is incident on the photodetector 12 in the photoelectronic IC chip 4. In this case, the slope 5 has a reflecting film 2 without an additional manufacturing step that a special angle shape is added for total reflection. Moreover, the reflecting film 2 functions as an interconnection for power supply.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電子回路と発光素子と受
光素子を混成させた光電子集積回路を複数光結合させた
光電子集積回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optoelectronic integrated circuit device in which a plurality of optoelectronic integrated circuits each including an electronic circuit, a light emitting element and a light receiving element are optically coupled.

【0002】[0002]

【従来の技術】ワークステーションやパーソナルコンピ
ューターの如きシステムにおいては、最近ますますその
小型化や高性能化の要求が高まっている。これらのシス
テムを構成する主要素の1つに、半導体電子回路技術が
有るが、高集積化のために金属配線のパターンを微細化
した場合では、伝送遅延の問題が生じ、さらに配線間の
スぺースを狭めた時では、誘導ノイズや相互干渉等が問
題となる。
2. Description of the Related Art In systems such as workstations and personal computers, demands for smaller size and higher performance have recently been increasing. One of the main components of these systems is semiconductor electronic circuit technology. However, if the pattern of metal wiring is miniaturized for high integration, the problem of transmission delay occurs, and further, there is a gap between wirings. When the space is narrowed, inductive noise, mutual interference, etc. become a problem.

【0003】そこで、電気的な配線によらず、電子デバ
イス間の伝送を光結合とする方法が着目されてきてい
る。このような光結合を行う装置の例として、特開昭6
1−121014号公報では、受光素子と発光素子が形
成された基板に光配線板を取りつけ、この光配線板にV
形溝及び光導波路を形成する装置が開示されている。す
なわち、発光素子からの光はV形溝の側面で反射し、光
導波路中を伝播し、受光素子に到達する。
Therefore, attention has been focused on a method in which transmission between electronic devices is performed by optical coupling regardless of electrical wiring. As an example of a device for performing such optical coupling, Japanese Patent Application Laid-Open No. 6-58242
In Japanese Patent Laid-Open No. 1-112014, an optical wiring board is attached to a substrate on which a light receiving element and a light emitting element are formed, and V
An apparatus for forming a groove and an optical waveguide is disclosed. That is, the light from the light emitting element is reflected by the side surface of the V-shaped groove, propagates in the optical waveguide, and reaches the light receiving element.

【0004】[0004]

【発明が解決しようとする課題】ところが、前記公報に
記載される光結合技術では、光配線板自体がSiO2
よって構成される。また、V形溝の側面での光の反射
は、SiO2 の臨界角以下の全反射を利用する。このた
めV形溝はその形状が制限され、そのV形溝を形成する
ために製造工程が複雑化することになる。
However, in the optical coupling technique described in the above publication, the optical wiring board itself is made of SiO 2 . For the reflection of light on the side surface of the V-shaped groove, total reflection below the critical angle of SiO 2 is used. Therefore, the shape of the V-shaped groove is limited, and the manufacturing process is complicated because the V-shaped groove is formed.

【0005】さらに、高集積化のために電子回路等を形
成した多数の光電子集積回路基板を光配線基板に接続す
る場合、各光電子集積回路基板に対して電源電圧の供給
等の目的で電気的な配線を施す必要があるが、電気的な
配線をワイヤボンディングによって行う場合では、その
ワイヤの引き回しなどが複雑化し、短絡如き問題も新た
に発生する。
Further, when a large number of optoelectronic integrated circuit boards on which electronic circuits are formed for high integration are connected to an optical wiring board, electric power is supplied to each optoelectronic integrated circuit board for the purpose of supplying a power supply voltage or the like. However, when the electrical wiring is performed by wire bonding, the wiring of the wire is complicated, and a problem such as a short circuit newly occurs.

【0006】そこで、本発明は上述の技術的な課題に鑑
み、基板間の光結合を行う装置であって、特にその製造
工程から量産して好適な構造を有する光電子集積回路装
置の提供を第1の目的とする。さらに、本発明は基板間
の電源等の配線にも有利な構造の光電子集積回路装置の
提供を第2の目的とする。
In view of the above-mentioned technical problems, the present invention provides an optoelectronic integrated circuit device which is a device for performing optical coupling between substrates and which has a structure suitable for mass production from the manufacturing process thereof. The purpose of 1. A second object of the present invention is to provide an optoelectronic integrated circuit device having a structure that is advantageous for wiring power supplies between substrates.

【0007】[0007]

【課題を解決するための手段】上述の第1の目的を達成
するために、本発明の光電子集積回路装置は、電子回路
と発光素子と受光素子が形成された光電子集積回路基板
と、前記発光素子及び前記受光素子に対向する傾斜面を
有し、且つその傾斜面に連続した光導波路が設けられる
共に、該傾斜面に前記基板間の光結合用の光を反射する
反射膜が形成された光配線基板と具備することを特徴と
する。
In order to achieve the above-mentioned first object, an optoelectronic integrated circuit device of the present invention comprises an optoelectronic integrated circuit substrate on which an electronic circuit, a light emitting element and a light receiving element are formed, and the light emitting element. The element and the light receiving element have an inclined surface, and a continuous optical waveguide is provided on the inclined surface, and a reflective film for reflecting light for optical coupling between the substrates is formed on the inclined surface. An optical wiring board is provided.

【0008】前記光電子集積回路基板は、基板上に電子
回路と発光素子と受光素子が形成された構造を有し、発
光素子や受光素子を当該基板の周囲側に配置すること
で、電子回路部を基板に中央部に配し、その中央部にて
前記光配線基板に取りつけられる構造にできる。また、
光電子集積回路基板自体が複数の基板を主面に垂直な方
向に積層した3次元構造であったり、光結合用の光が光
電子集積回路基板を透過する波長の光であっても良い。
The optoelectronic integrated circuit substrate has a structure in which an electronic circuit, a light emitting element, and a light receiving element are formed on the substrate, and the light emitting element and the light receiving element are arranged on the peripheral side of the substrate so that the electronic circuit section is formed. Can be arranged in the central portion of the substrate, and the optical wiring substrate can be attached at the central portion. Also,
The optoelectronic integrated circuit substrate itself may have a three-dimensional structure in which a plurality of substrates are laminated in a direction perpendicular to the main surface, or the light for optical coupling may be light having a wavelength that passes through the optoelectronic integrated circuit substrate.

【0009】光配線基板は、前記傾斜面と光導波路が形
成される基板であり、前記発光素子や受光素子の光の射
出方向や受光方向を主面に垂直な方向とし、当該光配線
基板の傾斜面を基板主面に対して45°とすることで、
光導波路は基板主面内方向のものとなる。このような光
配線基板としては、シリコン基板等が用いられるが、特
にこれに限定されるものではない。
The optical wiring board is a substrate on which the inclined surface and the optical waveguide are formed, and the light emitting direction and the light receiving direction of the light emitting element and the light receiving element are perpendicular to the main surface, and the optical wiring board is By setting the inclined surface at 45 ° with respect to the main surface of the substrate,
The optical waveguide is directed in the main surface of the substrate. A silicon substrate or the like is used as such an optical wiring substrate, but the optical wiring substrate is not particularly limited thereto.

【0010】前記傾斜面には、反射膜として金属等の膜
が形成され、その反射膜によって光結合の光が反射され
る。この反射膜には、前記第2の目的を達成するため
に、導電性を持たせることで配線を兼ねることができ
る。配線と反射膜が兼用となる場合、全面に被着した反
射膜の一部を電子回路の部分や他の領域でパターニング
して電源線の如き配線に用いることができる。
A film of metal or the like is formed as a reflective film on the inclined surface, and the light of the optical coupling is reflected by the reflective film. In order to achieve the second object, the reflective film can be made conductive so that it also serves as a wiring. When both the wiring and the reflection film are used, a part of the reflection film deposited on the entire surface can be patterned in a portion of the electronic circuit or in another region to be used as a wiring such as a power line.

【0011】[0011]

【作用】光配線基板の傾斜面では、発光素子からの光が
反射されて光導波路に至り、或いは光導波路からの光が
傾斜面で反射して受光素子に至る。この傾斜面には、反
射膜が形成されているため、その反射膜によって全反射
が可能であり、傾斜面の角度は、基板主面に沿った導波
路に対しては例えば45°で良いことになる。
On the inclined surface of the optical wiring board, the light from the light emitting element is reflected to reach the optical waveguide, or the light from the optical waveguide is reflected on the inclined surface to reach the light receiving element. Since the reflecting film is formed on this inclined surface, total reflection is possible by the reflecting film, and the angle of the inclined surface may be, for example, 45 ° with respect to the waveguide along the main surface of the substrate. become.

【0012】また、各光電子集積回路基板に対しては、
電源供給などのために、電気的な配線が必要であるが、
本発明では、反射膜に導電性を持たせることで、配線を
兼ねることできる。従って、電源供給のための新たな配
線が不要となる。
For each optoelectronic integrated circuit board,
Electrical wiring is required for power supply etc.,
In the present invention, the reflective film is made conductive so that it can also serve as a wiring. Therefore, new wiring for supplying power is unnecessary.

【0013】[0013]

【実施例】次に、図面を参照しながら本発明の好適な実
施例について説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described with reference to the drawings.

【0014】〔第1の実施例〕図1は本実施例の光電子
集積回路装置の斜視図である。平板状の光配線基板1の
表面には、複数の光電子ICチップ4が配列されて実装
されており、複数の光電子ICチップ4の間には導波路
3が形成されている。
[First Embodiment] FIG. 1 is a perspective view of an optoelectronic integrated circuit device according to the present embodiment. A plurality of optoelectronic IC chips 4 are arranged and mounted on the surface of the flat optical wiring board 1, and a waveguide 3 is formed between the plurality of optoelectronic IC chips 4.

【0015】光配線基板1は、シリコン基板の表面を後
述するような方法によって加工したものであり、光電子
ICチップ4を配すべき領域に対応して略正方形状に突
設された複数の凸部6が基板表面に形成されている。各
凸部6の周囲は基板主面より45°の角度に立ち上がっ
た傾斜面5とされている。この光配線基板1の全面に
は、反射膜2が所要の膜厚で形成されており、傾斜面5
の表面も反射膜2が覆う。凸部6以外の光配線基板1の
表面には、シリコン酸化膜7が形成されており、このシ
リコン酸化膜7の一部であって凸部6同士の間に光導波
路3が形成されている。
The optical wiring substrate 1 is obtained by processing the surface of a silicon substrate by a method described later, and has a plurality of convex protrusions formed in a substantially square shape corresponding to the region where the optoelectronic IC chip 4 is to be arranged. The portion 6 is formed on the surface of the substrate. The circumference of each convex portion 6 is an inclined surface 5 that rises at an angle of 45 ° from the main surface of the substrate. A reflection film 2 is formed on the entire surface of the optical wiring board 1 to have a required film thickness, and the inclined surface 5 is formed.
The surface of is also covered with the reflective film 2. A silicon oxide film 7 is formed on the surface of the optical wiring substrate 1 other than the convex portions 6, and the optical waveguide 3 is formed between the convex portions 6 which is a part of the silicon oxide film 7. ..

【0016】前記反射膜2はアルミニュームや金或いは
その他の金属膜であり、傾斜面5の反射率を金属反射に
よって著しく高めるものである。この反射膜2は、金属
膜であるために、導電性に優れており、本実施例では、
特に光電子ICチップ4への電源供給用の配線として機
能する。
The reflection film 2 is an aluminum, gold or other metal film, and the reflectance of the inclined surface 5 is remarkably enhanced by metal reflection. Since the reflective film 2 is a metal film, it has excellent conductivity, and in this embodiment,
In particular, it functions as a wiring for supplying power to the optoelectronic IC chip 4.

【0017】光導波路3は凸部6同士の間の光伝送を行
うための光路となり、光配線基板1の表面に被着された
シリコン酸化膜7に形成されているために、その光路は
基板主面に沿ったものとなる。一対の光電子ICチップ
4の間には、双方向の伝送や異なる信号を伝送するため
に、複数本の光導波路3が一の傾斜面5から他の傾斜面
5までの間に連続的に設けられる。一対の光電子ICチ
ップ4の光結合に用いられる各光導波路3は平行に延在
され、各光導波路3の間は屈折率の高い高屈折率部8と
される。この高屈折率部8は、プロトン等のイオン注入
等により形成される。
The optical waveguide 3 serves as an optical path for optical transmission between the convex portions 6, and since the optical waveguide 3 is formed on the silicon oxide film 7 deposited on the surface of the optical wiring board 1, the optical path is formed on the substrate. It will be along the main surface. Between the pair of optoelectronic IC chips 4, a plurality of optical waveguides 3 are continuously provided between one inclined surface 5 and another inclined surface 5 for bidirectional transmission and different signal transmission. Be done. Each optical waveguide 3 used for optical coupling of the pair of optoelectronic IC chips 4 extends in parallel, and a high refractive index portion 8 having a high refractive index is provided between the optical waveguides 3. The high refractive index portion 8 is formed by ion implantation of protons or the like.

【0018】光電子ICチップ4は、略正方形状の半導
体チップであって、その一方の主面の中央部に半導体集
積回路からなる電子回路部10を有し、その電子回路部
10の周囲に発光素子11や受光素子12を有する、光
素子と電子素子の混成基板である。電子回路部10は、
発光素子11や受光素子12の駆動回路や信号処理回路
或いは演算処理回路やメモリ等の集積回路部分である。
実装の際には、本実施例では、光電子ICチップ4の素
子形成面が光配線基板1側に向かい、電子回路部10が
凸部6に接触するかたちで取りつけられる。この光電子
ICチップ4の発光素子11の光の射出方向は、チップ
主面に対して垂直な方向であり、同じく受光素子12は
チップ主面に対して垂直方向な方向からなる光線に感度
を有する。発光素子11と受光素子12の位置は、各光
電子ICチップ4の端部に近い周辺領域であり、その位
置は光配線基板1の傾斜面5に対応した位置である。
The optoelectronic IC chip 4 is a substantially square semiconductor chip, has an electronic circuit section 10 composed of a semiconductor integrated circuit in the center of one main surface thereof, and emits light around the electronic circuit section 10. It is a hybrid substrate of an optical element and an electronic element having an element 11 and a light receiving element 12. The electronic circuit section 10 is
It is an integrated circuit portion such as a drive circuit for the light emitting element 11 and the light receiving element 12, a signal processing circuit, an arithmetic processing circuit, and a memory.
At the time of mounting, in this embodiment, the element forming surface of the optoelectronic IC chip 4 faces the optical wiring substrate 1 side, and the electronic circuit section 10 is mounted so as to contact the convex section 6. The light emitting element 11 of the optoelectronic IC chip 4 emits light in a direction perpendicular to the main surface of the chip, and similarly, the light receiving element 12 is sensitive to a light beam in a direction perpendicular to the main surface of the chip. .. The positions of the light emitting element 11 and the light receiving element 12 are peripheral areas near the ends of each optoelectronic IC chip 4, and the positions thereof are positions corresponding to the inclined surface 5 of the optical wiring board 1.

【0019】図2は光電子ICチップ4間の光結合の様
子を示す図である。光配線基板1の凸部6上に取りつけ
られた各光電子ICチップ4は、その受光素子12と発
光素子11が傾斜面5上に位置することになる。傾斜面
5は反射膜2が形成されており、45°に加工されて反
射鏡として機能する。このため発光素子11からチップ
の主面に垂直に射出された光線は、その傾斜面5で反射
し、光導波路3に導出される。また、その光導波路3か
らの光は、傾斜面5で反射し、主面に垂直な光線とされ
て受光素子12に受光される。
FIG. 2 is a diagram showing a state of optical coupling between the optoelectronic IC chips 4. In each optoelectronic IC chip 4 mounted on the convex portion 6 of the optical wiring board 1, the light receiving element 12 and the light emitting element 11 are located on the inclined surface 5. The inclined surface 5 has the reflection film 2 formed thereon and is processed at 45 ° to function as a reflection mirror. Therefore, the light beam emitted from the light emitting element 11 perpendicularly to the main surface of the chip is reflected by the inclined surface 5 and is guided to the optical waveguide 3. The light from the optical waveguide 3 is reflected by the inclined surface 5 to be a light beam perpendicular to the main surface and is received by the light receiving element 12.

【0020】反射膜2は導電膜としても機能して、各光
電子ICチップ4の電源供給用に用いられるため、所要
の配線パターンとなるようにパターニングされる。ま
た、光電子ICチップ4の部分では、該チップの電源用
の端子と接続される。この反射膜2を利用した電源ライ
ン、接地ライン等は、各光電子ICチップ4で共通化す
ることができ、チップ数が多い場合に極めて有効であ
る。
Since the reflective film 2 also functions as a conductive film and is used for supplying power to each optoelectronic IC chip 4, it is patterned to have a required wiring pattern. In addition, the optoelectronic IC chip 4 is connected to a power supply terminal of the chip. The power supply line, the ground line, and the like using the reflective film 2 can be shared by the respective optoelectronic IC chips 4, which is extremely effective when the number of chips is large.

【0021】上述の如き本実施例の光電子集積回路装置
は、光電子ICチップ4同士の光結合が反射膜2が被覆
する傾斜面5を有した光配線基板1によって行われるた
め、光による相互干渉や信号歪みのない信号伝送がなさ
れる。また、入射する光を全反射するための傾斜面5の
構造は、反射膜2を被覆した構造とされ、次に説明する
ような工程により得られるものである。
In the optoelectronic integrated circuit device of this embodiment as described above, the optical coupling between the optoelectronic IC chips 4 is performed by the optical wiring substrate 1 having the inclined surface 5 covered by the reflection film 2, and therefore mutual interference by light is caused. Signal transmission without signal distortion is performed. Further, the structure of the inclined surface 5 for totally reflecting the incident light is a structure in which the reflection film 2 is covered, and is obtained by the steps described below.

【0022】また、反射膜2は電源供給用の配線として
も機能するため、光電子ICチップ4の数が多くなる場
合に、有効な配線構造となる。
Further, since the reflection film 2 also functions as a wiring for supplying power, when the number of the optoelectronic IC chips 4 increases, the wiring structure becomes effective.

【0023】次に、図6〜図10を参照して、本実施例
の光電子集積回路装置の製造方法の一例について説明す
る。
Next, an example of a method of manufacturing the optoelectronic integrated circuit device of this embodiment will be described with reference to FIGS.

【0024】まず、図6に示すように、シリコン基板2
1を加工し、傾斜面22を伴う凸部23を該シリコン基
板21の表面に形成する。このような凸部23の形成
は、ドライエッチングの如き異方性エッチングを用いて
行われ、傾斜面22は主面に対して45°の角度をなす
ように加工される。次いで、凸部23の形成されたシリ
コン基板21の全面に反射膜24を被着する。反射膜2
4がアルミニューム膜である場合には、蒸着等により形
成できる。
First, as shown in FIG. 6, the silicon substrate 2
1 is processed to form a convex portion 23 with an inclined surface 22 on the surface of the silicon substrate 21. The formation of the convex portion 23 is performed by using anisotropic etching such as dry etching, and the inclined surface 22 is processed so as to form an angle of 45 ° with the main surface. Then, the reflective film 24 is deposited on the entire surface of the silicon substrate 21 on which the convex portions 23 are formed. Reflective film 2
When 4 is an aluminum film, it can be formed by vapor deposition or the like.

【0025】シリコン基板21上に反射膜24を形成し
た後、フォトリソグラフィ技術により、その反射膜24
を所要の電源供給用のパターンにパターニングする。
After forming the reflection film 24 on the silicon substrate 21, the reflection film 24 is formed by photolithography.
Is patterned into a required power supply pattern.

【0026】次に、図7に示すように、シリコン基板2
1上の全面に、導波路を形成するための材料層としてシ
リコン酸化膜25が例えばCVD法等により形成され
る。このシリコン酸化膜25の膜厚は、凸部23の間の
凹部が充分に埋められる厚みである。
Next, as shown in FIG. 7, the silicon substrate 2
A silicon oxide film 25 is formed as a material layer for forming a waveguide on the entire surface of 1 by, for example, the CVD method. The film thickness of the silicon oxide film 25 is such that the concave portions between the convex portions 23 are sufficiently filled.

【0027】シリコン酸化膜25を厚く形成した後、メ
カニカルポリッシング等によってシリコン酸化膜25の
膜厚を減らし、図8に示すように、凸部23の上面が露
出する程度までシリコン酸化膜25を削る。凸部23上
の反射膜24が露出しない程度にシリコン酸化膜25を
削る場合には、凸部23において電源供給のためのコン
タクトホールを形成する。
After the silicon oxide film 25 is formed thick, the film thickness of the silicon oxide film 25 is reduced by mechanical polishing or the like, and the silicon oxide film 25 is ground to the extent that the upper surface of the convex portion 23 is exposed as shown in FIG. .. When the silicon oxide film 25 is shaved to the extent that the reflection film 24 on the convex portion 23 is not exposed, a contact hole for power supply is formed in the convex portion 23.

【0028】次に、図9に示すように、シリコン酸化膜
25に対してプロトンを注入して、高屈折率層を形成す
る。この高屈折率層のパターンは、平行な導波路を形成
するパターンであり、図示しないレジスト等をマスクと
してイオン注入される。
Next, as shown in FIG. 9, protons are injected into the silicon oxide film 25 to form a high refractive index layer. The pattern of the high refractive index layer is a pattern for forming parallel waveguides, and ions are implanted by using a resist or the like (not shown) as a mask.

【0029】光導波路をシリコン酸化膜25に形成した
後、図10に示すように、受光素子や発光素子及び電子
回路部が既に形成された光電子ICチップ26が各凸部
23上に載置される。この時、光電子ICチップ26の
電源供給用端子が反射膜24に接続し、光電子ICチッ
プ26の受光素子や発光素子は傾斜面22上に位置する
ように載置される。
After the optical waveguide is formed on the silicon oxide film 25, as shown in FIG. 10, the optoelectronic IC chip 26 on which the light receiving element, the light emitting element and the electronic circuit section are already formed is placed on each convex portion 23. It At this time, the power supply terminal of the optoelectronic IC chip 26 is connected to the reflection film 24, and the light receiving element and the light emitting element of the optoelectronic IC chip 26 are placed on the inclined surface 22.

【0030】〔第2の実施例〕本実施例は第1の実施例
の変形例であり、本実施例の光配線基板31は、第1の
実施例と同様に、傾斜面39を周囲に有する凸部33を
表面に有し、その傾斜面39の表面には反射膜32が形
成されている。凸部33の周囲の凹部には、光導波路3
8が形成されている。
[Second Embodiment] This embodiment is a modification of the first embodiment, and the optical wiring board 31 of the present embodiment is similar to the first embodiment in that the inclined surface 39 is provided around the periphery. The projection 33 is provided on the surface, and the reflective film 32 is formed on the surface of the inclined surface 39. The optical waveguide 3 is provided in the concave portion around the convex portion 33.
8 is formed.

【0031】光電子ICチップ34は、一方の主面34
aに受光素子37,発光素子36,電子回路部35が形
成されるが、本実施例では、光結合に用いられる光の波
長が光電子ICチップ34を透過する波長の光とされ
る。従って、発光素子36で生成された光は、光電子I
Cチップ34を透過して傾斜面39の反射膜32で反射
し、光導波路38に向かう。また、光導波路38からの
光は傾斜面39の反射膜32で反射した後、光電子IC
チップ34を透過して受光素子37に受光されることに
なる。
The optoelectronic IC chip 34 has one main surface 34.
Although the light receiving element 37, the light emitting element 36, and the electronic circuit section 35 are formed in a, in the present embodiment, the wavelength of the light used for the optical coupling is the light of the wavelength that passes through the optoelectronic IC chip 34. Therefore, the light generated by the light emitting element 36 is the photoelectron I
The light passes through the C chip 34, is reflected by the reflection film 32 on the inclined surface 39, and goes toward the optical waveguide 38. Further, the light from the optical waveguide 38 is reflected by the reflection film 32 of the inclined surface 39, and then the optoelectronic IC
The light passes through the chip 34 and is received by the light receiving element 37.

【0032】このような光電子ICチップ34を透過す
る光による光結合では、電子回路部35の如き集積回路
を光配線基板31側にすることなく実装が可能である。
また、光電子ICチップ34毎に一方の主面34a側か
らプローブ等を使用しながら品質検査をすることができ
る。さらに、光電子ICチップ34の裏面にマイクロレ
ンズを形成することで、光の入出力効率を高くすること
ができる。
In such optical coupling by the light transmitted through the optoelectronic IC chip 34, the integrated circuit such as the electronic circuit section 35 can be mounted without being on the optical wiring board 31 side.
Further, it is possible to perform quality inspection for each optoelectronic IC chip 34 from the one main surface 34a side while using a probe or the like. Further, by forming a microlens on the back surface of the optoelectronic IC chip 34, the light input / output efficiency can be increased.

【0033】〔第3の実施例〕本実施例は、光電子IC
チップが3次元化された例である。その要部構造を図4
に示す。第2の実施例と同様に、本実施例の光配線基板
31は、傾斜面39を周囲に有する凸部33を表面に有
し、その傾斜面39の表面には反射膜32が形成されて
いる。凸部33の周囲の凹部には、光導波路38が形成
されている。
[Third Embodiment] This embodiment is based on an optoelectronic IC.
This is an example in which the chip is three-dimensionalized. The structure of the main part is shown in FIG.
Shown in. Similar to the second embodiment, the optical wiring board 31 of the present embodiment has the convex portion 33 having the inclined surface 39 on the periphery, and the reflective film 32 is formed on the surface of the inclined surface 39. There is. An optical waveguide 38 is formed in the concave portion around the convex portion 33.

【0034】光電子ICチップ41は、3枚の主面に垂
直方向に積層された基板42,43,44からなり、受
光素子45は最上層の基板44に形成され、発光素子4
6は中間の基板43に形成されている。これら受光素子
45や発光素子46の位置は、光配線基板31の傾斜面
39と平面上重なる位置であるが、発光素子46からの
光は、最下層の基板42を透過して、傾斜面39に到達
し、受光素子45に受光される光は、最下層の基板42
及び中間の基板43を透過したものである。
The optoelectronic IC chip 41 is composed of substrates 42, 43 and 44 which are vertically laminated on three principal surfaces, and the light receiving element 45 is formed on the uppermost substrate 44, and the light emitting element 4 is formed.
6 is formed on the intermediate substrate 43. The positions of the light receiving element 45 and the light emitting element 46 are positions that overlap with the inclined surface 39 of the optical wiring board 31 in plan view, but the light from the light emitting element 46 passes through the substrate 42 of the lowermost layer and the inclined surface 39. The light that reaches the bottom and is received by the light receiving element 45 is
And the intermediate substrate 43.

【0035】このように光電子ICチップ41を積層化
した場合では、配線経路が大幅に短縮され、配線遅延を
低減できることになる。なお、本実施例では、光電子I
Cチップを3枚の基板を積層する構造としたが、これに
限定されず、2枚やさらに多くの数の基板を積層した
り、他の種類の基板を組み合わせて積層するような構造
とすることも可能である。また、受光素子や発光素子を
基板主面な方向に複数個重なるように形成して、多重化
するような構造としても良い。
In the case where the optoelectronic IC chips 41 are laminated in this way, the wiring path is greatly shortened and the wiring delay can be reduced. In this embodiment, the photoelectron I
Although the C chip has a structure in which three substrates are laminated, the present invention is not limited to this, and may be a structure in which two or more substrates are laminated or other types of substrates are combined and laminated. It is also possible. Further, a structure may be adopted in which a plurality of light receiving elements or light emitting elements are formed so as to overlap in the main surface direction of the substrate so as to be multiplexed.

【0036】〔第4の実施例〕本実施例は、同一の光電
子ICチップ内で光結合される例である。図5の断面に
示すように、本実施例の光電子集積回路装置では、1つ
の光電子ICチップ55の内部での光結合のための光導
波路59が光配線基板51の表面に形成される。光配線
基板51の表面には、凸部53が形成され、この凸部5
3の端部が反射膜52の被覆された傾斜面54となる。
図5の断面では、一対の凸部53の間の光導波路59
は、当該光電子ICチップ55専用であり、他の光電子
ICチップとの光伝送には用いられない。他の光導波路
58は、他の実施例と同様に他の光電子ICチップとの
光結合に使用される。光電子ICチップ55には、他の
光電子ICチップとの光結合のための発光素子57及び
受光素子56が形成され、さらにチップ内の光結合のた
めの発光素子57i及び受光素子56iが形成される。
これら発光素子57,57i及び受光素子56,56i
は、それぞれ傾斜面54上に平面的に重なる位置に形成
されていることは言うまでもない。
[Fourth Embodiment] This embodiment is an example in which optical coupling is performed in the same optoelectronic IC chip. As shown in the cross section of FIG. 5, in the optoelectronic integrated circuit device of the present embodiment, an optical waveguide 59 for optical coupling inside one optoelectronic IC chip 55 is formed on the surface of the optical wiring board 51. A convex portion 53 is formed on the surface of the optical wiring board 51.
The end of 3 becomes an inclined surface 54 covered with the reflective film 52.
In the cross section of FIG. 5, the optical waveguide 59 between the pair of convex portions 53 is shown.
Is dedicated to the optoelectronic IC chip 55 and is not used for optical transmission with other optoelectronic IC chips. The other optical waveguide 58 is used for optical coupling with another optoelectronic IC chip as in the other embodiments. In the optoelectronic IC chip 55, a light emitting element 57 and a light receiving element 56 for optical coupling with another optoelectronic IC chip are formed, and further, a light emitting element 57i and a light receiving element 56i for optical coupling in the chip are formed. ..
These light emitting elements 57 and 57i and light receiving elements 56 and 56i
Needless to say, each is formed at a position where it overlaps the inclined surface 54 in plan view.

【0037】このような構造の光電子ICチップ55及
び光配線基板51を用いた場合では、光電子ICチップ
55内での信号伝達を光によって行うことができ、電気
配線に固有な伝送歪みや相互干渉の問題等を解決できる
ことになる。
In the case of using the optoelectronic IC chip 55 and the optical wiring board 51 having such a structure, signal transmission in the optoelectronic IC chip 55 can be performed by light, and transmission distortion and mutual interference peculiar to electric wiring can be achieved. It will be possible to solve the problem of.

【0038】[0038]

【発明の効果】本発明の光電子集積回路装置は、光電子
集積回路基板同士の光結合が反射膜に被覆された傾斜面
を有した光配線基板によって行われるため、光による相
互干渉や信号歪みのない信号伝送がなされる。また、入
射する光を全反射するための傾斜面の構造は、反射膜を
被覆した構造であり、特別な角度等を必要とせずに全反
射が可能であり、その製造工程も簡略化される。
In the optoelectronic integrated circuit device of the present invention, optical coupling between optoelectronic integrated circuit substrates is performed by an optical wiring board having an inclined surface coated with a reflection film, and therefore mutual interference and signal distortion due to light occur. No signal transmission is done. Further, the structure of the inclined surface for totally reflecting the incident light is a structure in which a reflective film is coated, and total reflection is possible without requiring a special angle, etc., and the manufacturing process thereof is also simplified. ..

【0039】また、本発明において、反射膜は電源供給
用の配線としても機能するため、光電子集積回路基板毎
のワイヤボンディング等が不要となり、光電子集積回路
基板の数が多くなる場合に、有効な配線構造となる。
Further, in the present invention, since the reflective film also functions as a wiring for supplying power, wire bonding or the like for each optoelectronic integrated circuit board becomes unnecessary, which is effective when the number of optoelectronic integrated circuit boards increases. It has a wiring structure.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の光電子集積回路装置の一例の構造を示
し、一部の光電子ICチップを分解しながら示す要部斜
視図である。
FIG. 1 is a perspective view of an essential part showing the structure of an example of an optoelectronic integrated circuit device of the present invention, showing a part of an optoelectronic IC chip while disassembling it.

【図2】前記光電子集積回路装置の一例の光伝送路に沿
った断面図である。
FIG. 2 is a sectional view taken along an optical transmission line of an example of the optoelectronic integrated circuit device.

【図3】本発明の第2の実施例の光電子集積回路装置を
示す要部断面図である。
FIG. 3 is a sectional view of a key portion showing an optoelectronic integrated circuit device according to a second embodiment of the present invention.

【図4】本発明の第3の実施例の光電子集積回路装置を
示す要部断面図である。
FIG. 4 is a sectional view of a key portion showing an optoelectronic integrated circuit device according to a third embodiment of the present invention.

【図5】本発明の第4の実施例の光電子集積回路装置を
示す要部断面図である。
FIG. 5 is a sectional view showing a principal part of an optoelectronic integrated circuit device according to a fourth embodiment of the present invention.

【図6】本発明の光電子集積回路装置の一例の製造方法
における基板加工工程までの工程断面図である。
FIG. 6 is a process sectional view up to a substrate processing process in a manufacturing method of an example of the optoelectronic integrated circuit device of the present invention.

【図7】本発明の光電子集積回路装置の一例の製造方法
におけるシリコン酸化膜形成工程までの工程断面図であ
る。
FIG. 7 is a process cross-sectional view up to the silicon oxide film forming process in the manufacturing method of the example of the optoelectronic integrated circuit device of the present invention.

【図8】本発明の光電子集積回路装置の一例の製造方法
におけるポリッシング工程までの工程断面図である。
FIG. 8 is a process sectional view up to a polishing process in a manufacturing method of an example of the optoelectronic integrated circuit device of the present invention.

【図9】本発明の光電子集積回路装置の一例の製造方法
におけるイオン注入工程までの工程断面図である。
FIG. 9 is a process cross-sectional view up to the ion implantation process in the manufacturing method of the example of the optoelectronic integrated circuit device of the present invention.

【図10】本発明の光電子集積回路装置の一例の製造方
法における光電子ICチップの取り付け工程までの工程
断面図である。
FIG. 10 is a process cross-sectional view up to a step of mounting an optoelectronic IC chip in a manufacturing method of an example of the optoelectronic integrated circuit device of the present invention.

【符号の説明】[Explanation of symbols]

1,31,51…光配線基板 2,32,52…反射膜 3,38,58,59…光導波路 4,34,41,55…光電子ICチップ 5,39,54…傾斜面 6,33,53…凸部 7…シリコン酸化膜 10…電子回路部 11,36,46,57,57i…発光素子 12,37,45,56,56i…受光素子 1, 31, 51 ... Optical wiring substrate 2, 32, 52 ... Reflective film 3, 38, 58, 59 ... Optical waveguide 4, 34, 41, 55 ... Optoelectronic IC chip 5, 39, 54 ... Inclined surface 6, 33, 53 ... Convex part 7 ... Silicon oxide film 10 ... Electronic circuit part 11, 36, 46, 57, 57i ... Light emitting element 12, 37, 45, 56, 56i ... Light receiving element

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 電子回路と発光素子と受光素子が形成さ
れた光電子集積回路基板と、少なくとも前記発光素子又
は前記受光素子に対向する傾斜面を有し、且つその傾斜
面に連続して光導波路が設けられる共に、該傾斜面に前
記光電子集積回路基板間の光結合用の光を反射する反射
膜が形成された光配線基板とを具備することを特徴とす
る光電子集積回路装置。
1. An optoelectronic integrated circuit substrate on which an electronic circuit, a light emitting element and a light receiving element are formed, an inclined surface facing at least the light emitting element or the light receiving element, and an optical waveguide continuous to the inclined surface. And an optical wiring board having a reflective film formed on the inclined surface for reflecting light for optical coupling between the optoelectronic integrated circuit boards.
【請求項2】 請求項1記載の光電子集積回路装置にお
いて、その反射膜は導電性を有し、基板への配線を兼ね
ることを特徴とする光電子集積回路装置。
2. The optoelectronic integrated circuit device according to claim 1, wherein the reflective film has conductivity and also serves as a wiring to the substrate.
JP25425891A 1991-09-05 1991-09-06 Optoelectronic integrated circuit device Expired - Lifetime JP3413839B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP25425891A JP3413839B2 (en) 1991-09-06 1991-09-06 Optoelectronic integrated circuit device
US07/939,694 US5357122A (en) 1991-09-05 1992-09-02 Three-dimensional optical-electronic integrated circuit device with raised sections

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25425891A JP3413839B2 (en) 1991-09-06 1991-09-06 Optoelectronic integrated circuit device

Publications (2)

Publication Number Publication Date
JPH0567770A true JPH0567770A (en) 1993-03-19
JP3413839B2 JP3413839B2 (en) 2003-06-09

Family

ID=17262480

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3413839B2 (en)

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