JPH0567088B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a D/A converter, and more particularly to a D/A converter that simultaneously D/A converts a plurality of digital input signals.

[Conventional technology]

Conventionally, methods for D/A converting multiple digital input signals include: (1) providing the same number of sample and hold circuits as the number of digital signals at the output of a D/A converter, and sequentially D/A converting each digital input signal; There were two methods: (2) providing the same number of D/A converters as digital input signals; An example of an application circuit for such a circuit is the generation of RY and BY signals in a color signal processing system during reproduction of a VTR. FIG. 5b is a block diagram of such an example. FIG. 5 also shows a block diagram during recording as well as during playback. According to the configuration in the same figure
Let's briefly explain the color signal processing system of a VTR. In the figure, R-Y signal 61 and B-Y signal 62
are signals that determine the color tone and color density. During recording, the circuit in the figure converts the R-Y signal 61 and B-Y signal 62 into signals suitable for magnetic recording (hereinafter referred to as low frequency conversion subcarriers 63). ), and during playback, from the low frequency conversion subcarrier 63, R
The purpose is to reproduce the -Y signal 61 and the BY signal 62.

First, during recording, the RY signal 61 and the BY signal 62 are converted into digital signals by A/D converters 51 and 52, respectively, as shown in FIG. After being subjected to predetermined digital signal processing in the circuit 53, the D/A converter 54 outputs it as a low frequency converted subcarrier 63. During reproduction, as shown in FIG. 5b, the low frequency subcarrier 63 is converted into a digital signal by the A/D converter 55, and after being subjected to digital signal processing in the next digital signal processing circuit 56, The D/A converters 57 and 58 convert the R-Y signal 61 and the B-
Each is output as a Y signal 62. In this way, the color signal processing system shown in FIG. 5 achieves the above-mentioned purpose.
2 systems of D/A for signal 61 and BY signal 62
It can be seen that converters 57 and 58 are required. As mentioned above, conventionally, in such a case, (1) the output of the D/A converter is provided with the same number of sample and hold circuits as the number of digital input signals (in that case, two), and the R-Y signal and Either the B-Y signal is sequentially D/A converted and the output is held in a corresponding sample-and-hold circuit, or (2) the same number of D/A converters as digital input signals (in this case two) are provided.

[Problem that the invention seeks to solve]

By the way, regarding the conventional case (1) mentioned above,
Since the conversion rate of the D/A converter is shared between the two sample and hold circuits, the conversion rate of either the RY signal or the BY signal is at most the conversion rate of the D/A converter itself. It becomes half. Conversely, the D/A converter receives the RY signal,
A conversion rate that is at least twice the conversion rate of the B-Y signal and the B-Y signal is required, but when realizing such a high-speed D/A converter, there is a problem that it places a considerable burden on the device. There is.

On the other hand, in case (2), it is clear that the conversion rate does not need to be as fast as in case (1). However, if completely separate D/A converters are used to reproduce the R-Y and B-Y signals, the two D/A
Differences in the characteristics of the converters may cause color misalignment, which is undesirable.

This phenomenon will be explained using FIGS. 6 and 7. Figure 6 shows an example of the characteristics of a D/A converter. In the figure, line 61 shows the characteristics of an ideal D/A converter, and line 62 shows the characteristics of a D/A converter with errors. . In this case, the D/A converter that has an error is deviated in the direction of outputting an output that is larger in absolute value than the ideal output.

FIG. 7 shows how errors in the D/A converter whose characteristics are shown in FIG. 6 cause color misregistration. In FIG. 7, circle 71 indicates the D/A converter for the RY signal and the B-
This is an example of the characteristics when both the Y signal D/A converters output ideal analog outputs, and the ellipse 72 represents only the R-Y signal D/A converter, and the line 62 in FIG.
When the characteristic is the same as that of circle 71, circle 73 shows the characteristic shown for the same digital input as in FIG. If the characteristic of the line 62 is the circle 71
This is the characteristic shown for the same input as . For example, focus on point 74 on circle 71. R-Y signal, B-Y
When the signal has a value corresponding to each point 74, the color tone is determined by the angle θ ₁ that the line segment connecting the point 74 and the origin makes with the B-Y axis, and the color is determined by the length of the line segment. The density of is determined. Point 74 is a case where both the D/A converter for the RY signal and the D/A converter for the B-Y signal are ideal, but if the D/A converter for the RY signal is
If only the converter were to have the characteristic of line 62 shown in FIG. 6, the analog output with the same digital input as point 74 would move to point 75 on ellipse 72. As a result, the angle that the line segment connecting the point 75 and the origin makes with the BY axis is θ ₂ , which changes from the angle θ ₁ . As mentioned above, the angles θ ₁ and θ ₂ indicate the color tone of the point, so the result is a change in color, resulting in the wrong color. Here, if the BY signal D/A converter also has the characteristic of line 62 in FIG. 6, then point 7
5 moves to point 76 on circle 73. As a result, point 76
The angle that the line segment connecting the origin and the BY axis makes is θ ₁ , which is the same as in the case of ideal output. From this, it can be seen that the better the relative characteristics of the D/A converter for the RY signal and the D/A converter for the B-Y signal, the smaller the relative difference in characteristics, the less error in color tone. You can see that it can be made smaller. However, in the conventional case (2), since the D/A converters for the RY signal and the BY signal are completely separate, there is a problem that their relative characteristics are not guaranteed at all.

In addition, in the color signal processing system configured as shown in FIG. 5, the D/A converter 54 used during recording is replaced with the previous D/A converters 57 and 58, Although the hardware can be reduced by reducing the number of D/A converters, in the conventional case (2), one D/A converter will be left over during recording. If two D/A converters can be combined to form a D/A converter with a higher number of bits, it is possible to expect improved recording characteristics.
In order to improve such characteristics in the conventional case (2), an extra circuit for adding the outputs of the two D/A converters in an analog manner is required, which is undesirable.

As mentioned above, conventional D/A converters that D/A convert multiple digital input signals require the device to have the ability to operate at extremely high speeds.
Alternatively, there was a problem that the relativity between multiple outputs was not guaranteed. Also, depending on the usage pattern, a part of the hardware may be inactive, resulting in a lot of waste, and there is also the problem that extra circuits are required to use the hardware efficiently and eliminate waste. Ta.

[Means for solving problems]

The D/A converter of the present invention includes a resistor network that generates a reference voltage group consisting of a plurality of reference voltages that are gradually increased in sequence, and a first resistor network that is formed by alternately extracting reference voltages from the reference voltage group in an order that increases gradually. a reference voltage group, a second reference voltage group, a first switch group connecting the first reference voltage group and the first output terminal, and a first switch group connecting the second reference voltage group and the second output terminal. In a first state determined by signals received from a second group of switches connecting the first output terminal and the second output terminal, a third group of switches connecting the first output terminal and the second output terminal, and a control terminal, the third switch group connects the first output terminal and the second output terminal. The first and second output terminals are not connected by the switch group, and one of the reference voltages in the first reference voltage group is applied to the first output terminal by a signal received from the first digital input terminal group. The first
the second switch so as to output one of the reference voltages in the second reference voltage group to the second output terminal in response to a signal received from the second digital input terminal group; in a second state determined by a signal received from the control terminal, the third group of switches connects the first and second output terminals;
The first digital input terminal is configured to output one of the reference voltages from the reference voltage group to the first output terminal in response to a signal received from the first digital input terminal group.
and a control circuit that controls the second switch group.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of a first embodiment of the present invention. In FIG. 1, 1 is the first reference voltage terminal, 2
is a second reference voltage terminal, R1 to R8 are resistive elements, and the voltage applied to each connection point of the series-connected elements R1 to R8 is the first reference voltage terminal and the second reference voltage terminal. A resistor network is configured to generate reference voltages V ₁ to V ₈ that gradually increase. This reference voltage
V ₁ to _{V 8} are further divided into two groups in increasing order, and the first reference voltage group (reference voltages V ₂ , V ₄ , V ₆ ,
V ₈ ) 5 and the second reference voltage group (reference voltage
(consisting of V ₁ , V ₃ , V ₅ , V ₇ )6.

3 is a first output terminal, and 4 is a second output terminal. 7 selects one reference voltage from the first reference voltage group 5 and connects it to the first output terminal 3.
8 is a _second switch _group that selects one reference voltage from the second reference voltage group ₆ and connects it to the second output terminal ₄ . (consisting of switches S ₁ , S ₃ , S ₅ , S ₇ ), and 9 is a third switch group (consisting of switch S ₀ ) that connects the first output terminal 3 and the second output terminal 4. be. 10 is the first digital input terminal A2
~A0, signals a 1 ~a that control the first switch group 7, second switch group 8, and third switch group ₉ from the input signals of the second digital input terminals B2, B1, and the control terminal SEL. This is a control circuit that generates ₄ , _b1 to _b4 , _c0 . Signals a ₁ to _{a 4} control switches S ₂ , S ₄ , S ₆ , S ₈ respectively, signals b ₁ to b ₄ control switches S ₁ , S ₃ , S ₅ , S ₇ respectively, and signals
c ₀ controls switch S ₀ . An example of the logic of the control circuit 10 is shown in FIG. In Fig. 3, signals a ₁ to a ₄ , b ₁
Assume that the switch connected to the signal line of which one of ~b ₄ and c ₀ is outputting is closed, and the remaining switches are open. For example, control terminal SEL and digital input terminals A2, A
1, A0, B2, and B1 are all 0, the output of the control circuit 10 is that only the signals a ₁ and b ₁ are 1, and the rest are all 0, so only switches S ₁ and S ₂ are closed. The other switches S ₃ to S ₈ and S ₀ are all opened. As a result, the reference voltage V ₂ appears at the output terminal 3 and the reference voltage V ₁ appears at the output terminal 4. In addition, control terminal SEL and digital input terminals A2, A
1, A0, and B2 are 0 and the signal at the digital input terminal B1 is 1, the output of the control circuit 10 is only the signals a ₁ and b ₂ are 1, and the rest are all 0, so the switches S ₃ and S ₂ Only closed, other switches S ₁ , S ₄ ~
S ₈ and S ₀ are all opened. As a result, the reference voltage V ₂ is applied to the output terminal 3, and the reference voltage V ₃ is applied to the output terminal 4.
appears. Below, in the same way, control terminal
While the SEL signal is 0, a reference voltage determined by the digital signal applied to the digital input terminals A2 and A1 from the reference voltage group 5 appears at the output terminal 3, and a reference voltage from the reference voltage group 6 appears at the output terminal 4. A reference voltage determined by the digital signals applied to the digital input terminals B2 and B1 appears, and each operates as two independent 2-bit D/A converters.

Furthermore, if the signal at the control terminal SEL is 1, as shown in Figure 3, the signal C ₀ becomes 1, and the switch
S ₀ is closed and output terminals 3 and 4 have the same potential. Furthermore, under the condition that the signal at the control terminal SEL is 1, only one of the switches S ₁ to _{S 8} in Fig. 1, selected by the three inputs at the digital input terminals A2, A1, and A0, will be closed. Therefore, output terminal 3 has digital input terminals A2, A
An analog output corresponding to the 3-bit digital input of 1 and A0 can now be obtained. From this, when the signal at the control terminal SEL is 1, the first
It can be seen that the circuit shown in the figure operates as a 3-bit D/A converter.

By the way, in the circuit of FIG. 1, the reference voltage group 5 and the reference voltage group 6 are alternately set from the reference voltages V 1 to V 8 between the resistive elements R1 to R8 connected in series between the same reference voltage terminals ₁ and ₂ . This is what was taken out.
This means that when the circuit shown in the figure operates as two D/A converters using reference voltage groups 5 and 6, the relativity between the D/A converter outputs is also good. Show that.

Note that the reference voltages V ₂ , V ₄ , V ₆ , V ₈ of reference voltage group 5
A shift occurs between the reference voltages V ₁ , V ₂ , V ₃ , and V ₇ of the reference voltage group 6 due to the magnitude of the difference between the voltages V ₂ and V ₁ , but in the color signal processing system of the VTR,
This shift is irrelevant because the shift is removed by a capacitor provided between the D/A converter and the D/A converter.

In addition, as shown in Fig. 3, terminals A ₂ to _{A 0} and B ₂
~ By setting the outputs of terminals 3 and 4 when the digital input signal from B ₁ is minimum as the reference voltages V ₂ and V ₁ , the above shift becomes a small value, and from this point of view, the above shift can be ignored. be able to.

In the circuit of FIG. 1, even when operating as two D/A converters, the maximum operating speed is the digital input signal of terminals A2 and A1, or the terminal B2,
Since it is sufficient to satisfy whichever of the B1 digital input signals has a faster conversion rate, it has the advantage that the requirements for the operating speed of the device are relatively lenient.

From the above explanation, it can be seen that the circuit according to the embodiment of the present invention shown in FIG. It can be seen that when a single digital input signal is used, a D/A converter with a higher number of bits can be constructed and a D/A converter with no wasted hardware can be provided.

FIG. 2 is a circuit diagram of a second embodiment of the invention. In Figure 2, symbols 1 to 6 and A2, A
1, A0, B2, B1, and SEL are terminals and reference voltage groups having functions equivalent to those of the embodiment shown in FIG.
In the figure, reference numeral 11 denotes a first switch group (switches S ₁₂ , S ₁₄ , S ₁₆ , S ₁₈ ,
S ₂₂ , S ₂₄ , S ₀₀ ), 12 selects one reference voltage from the second reference voltage group 6 and outputs it to the second output terminal 4
A second group of switches (switches S ₁₁ ,
S ₁₃ , S ₁₅ , S ₁₇ , S ₂₁ , S ₂₃ ), and 13
is a third switch group (consisting of switch S ₀₁ ) that connects the first output terminal 3 and the second output terminal 4. 14 is the first digital input terminal A2 to A0
and signals a00, 00, a that control the first switch group 11, second switch group 12, and third switch group 13 from the input signals of the second digital input terminals B2, B1 and the control terminal SEL.
11, 11, a22, 22, b11, 1
This is a circuit that generates 1, b22, 22. An example of the logic of the control circuit 14 is shown in FIG.

From Figures 2 and 4, when the signal at the digital input terminal SEL is 0, the signal a00 is always 1, the signal 00 is 0, and the output terminal 3 is always connected to the switch group 11.
A voltage determined by the signals of the digital input terminals A2 and A1 is output from the reference voltage group 5 via the switch group 12, and the digital input terminal from the reference voltage group 6 is always output to the output terminal 4 via the switch group 12. B
2, a voltage determined by the signal B1 is output. From this, when the signal at the control terminal SEL is 0, the circuit in Figure 2 operates as two independent 2-bit D/D signals.
It can be seen that it operates as an A converter.

Next, when the signal at the control terminal SEL is 1, the output appearing at the output terminal 3 from FIG.
The value is determined by the digital input terminals A2, A1, and A0. From this, when the signal on the control terminal SEL is 1, the second
It can be seen that the circuit shown in the figure operates as a 3-bit D/A converter.

In this embodiment as well, similarly to the first embodiment,
Needless to say, when operating as two D/A converters, the relativity is good and the requirements for the operating speed of the device are lenient.

〔Effect of the invention〕

As described above, the present invention enables D/A conversion of multiple digital input signals without requiring high-speed operation of the device and with good relativity between outputs, and when the digital input signal is a single signal. This has the advantage that a D/A converter with a higher number of bits can be constructed and can be effectively utilized in hardware.

In addition, the D/A converter of the present invention has the characteristics that most of the circuits are digital circuits and switch elements, and the reference voltage group is also determined by the relative accuracy of the resistive elements, making it extremely suitable for integrated circuit implementation. The field of use for this method is wide, and the benefits thereof are enormous.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a first embodiment of a D/A converter of the present invention, FIG. 2 is a circuit diagram of a second embodiment of the present invention, and FIG. 3 is a control circuit in FIG. 1. Figure 4 shows the voltages of the input signal and output signals 3 and 4 of the control circuit 14 in Figure 2.
Figure 5 is a block diagram of the color signal processing system of a VTR that uses a D/A converter.
The figure shows an example of the characteristics of the D/A converters 57 and 58 shown in FIG. 5, and FIG. 7 shows the influence that the difference in characteristics of the D/A converters has on the color signal system. DESCRIPTION OF SYMBOLS 1...First reference voltage terminal, 2...Second reference voltage terminal, 3...First output terminal, 4...Second output terminal, 5...First reference voltage group, 6... …Second
reference voltage group, 7, 11...first switch group,
8, 12... Second switch group, 9, 13... Third switch group, 10, 14... Control circuit, R1
~R8...Resistive element, A2, A1, A0, B
2, B1...Digital input terminal, SEL...Control terminal, _S0 ~ _S8 , _S00 , _S01 , _{S11~S18 , S21} ~
S ₂₄ ...Switch element.

Claims (1)

[Claims] 1. A resistor network that generates a reference voltage group consisting of a plurality of reference voltages that gradually increase in sequence, and a first reference voltage group and a second reference voltage that each alternately extracts reference voltages from the reference voltage group in an increasing order. with a group,
a first switch group that connects the first reference voltage group and a first output terminal; a second switch group that connects the second reference voltage group and a second output terminal; In a first state determined by a signal received from a control terminal and a third switch group connecting the output terminal of the switch and the second output terminal, the third switch group connects the first and second output terminals. The first switch group is configured to output one of the reference voltages in the first reference voltage group to the first output terminal by a signal received from the first digital input terminal group without connecting the terminals. and controlling the second switch group to output one of the reference voltages in the second reference voltage group to the second output terminal according to a signal received from a second digital input terminal group. , in a second state determined by signals received from the control terminals, the third group of switches connects the first and second output terminals, and the signals received from the first group of digital input terminals connect the first and second output terminals. A D/A converter comprising: a control circuit that controls the first and second switch groups so as to output one of the reference voltages to the first output terminal. .