JPH0564871B2 - - Google Patents

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Publication number
JPH0564871B2
JPH0564871B2 JP60032587A JP3258785A JPH0564871B2 JP H0564871 B2 JPH0564871 B2 JP H0564871B2 JP 60032587 A JP60032587 A JP 60032587A JP 3258785 A JP3258785 A JP 3258785A JP H0564871 B2 JPH0564871 B2 JP H0564871B2
Authority
JP
Japan
Prior art keywords
layer
electrode
amorphous
solar cell
electrode layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP60032587A
Other languages
Japanese (ja)
Other versions
JPS61193488A (en
Inventor
Kenji Nakatani
Mitsuaki Yano
Hiroshi Okaniwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teijin Ltd
Original Assignee
Teijin Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teijin Ltd filed Critical Teijin Ltd
Priority to JP60032587A priority Critical patent/JPS61193488A/en
Publication of JPS61193488A publication Critical patent/JPS61193488A/en
Publication of JPH0564871B2 publication Critical patent/JPH0564871B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/206Particular processes or apparatus for continuous treatment of the devices, e.g. roll-to roll processes, multi-chamber deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

[利用分野] 本発明は非晶質半導体を光起電力層とする非晶
質太陽電池の製造方法に関し、更に詳しくは歩留
りが良く且つ生産性が良い非晶質太陽電池の製造
方法に関する。 [従来技術] 非晶質半導体の中でも非晶質シリコンを光起電
力層とする非晶質太陽電池は、シランガス、ジシ
ランガス等のグロー放電分解法によつて低い基板
温度で広い面積に均一に連続的に堆積出来、又基
板として高分子フイルム、ガラス、セラミツク、
金属フオイル等の各種基板が選択出来、コスト的
に非常に有利な為広く研究されている。しかしな
がら、製造上以下の問題がある。 非晶質シリコン(Si)半導体太陽電池の基本構
造としては、上記各種基板上に設けられた金属電
極層/非晶質Si半導体層/透明電極層の積層構造
が主として用いられ、金属電極層、非晶質Si半導
体層、透明電極層あるいは透明電極層、非晶質Si
半導体層、金属電極層の順に真空蒸着法、スパツ
タ法などの物理的方法、グロー放電分解法、光
CVD法などの化学的方法等の膜形成手段を用い
て順次各層上に堆積されている。たとえば金属電
極層/非晶質Si半導体層/透明電極層の順に順次
堆積する場合を例にとると、同一基板上で太陽電
池をパターン化してモジユールを作成する場合に
はマスクを用いた蒸着法、スパツタ法や、レジス
トを用いた乾式、あるいは湿式のエツチング法に
よつて透明電極層をパターン化する方法がとられ
てきた。 ところでマスクを用いたパターニングの場合、
金属マスク等を直接非晶質Si半導体層表面に接触
させねばならない為、非晶質Si半導体層自身に損
傷を与えやすく、歩留りを低下させる問題があ
る。さらに連続的に広幅、長尺の大面積太陽電池
を作成するには多数の開口部を有する広幅、長尺
のマスクを該基板に密着させて正確に移動させな
ければならず、パターンずれ等の問題がある。 一方レジストを用いたパターンニングの場合
も、非晶質Si半導体層自身に損傷を与えやすいば
かりでなく、工程的にもレジスト添付、エツチン
グ、レジスト除去のごとく、複雑な工程を必要と
する問題がある。 [発明の目的] 本発明の目的はかかる問題点を解決し、生産性
良く且つ歩留りの良い非晶質太陽電池の製造方法
を提供することにある。 [発明の構成] 上述の目的は以下の本発明により達成される。 すなわち本発明は、前述の非晶質半導体を光起
電力層とした非晶質太陽電池の製造方法におい
て、 a 第1の基板上に電極層を形成するステツプ、 b 上記電極層に光起電力層を積層して中間積層
体を形成するステツプ、 c 第2の基板上に電極層を積層して電極積層体
を形成するステツプ、 d 中間積層体の光起電力層若しくは/及び電極
積層体の電極層上に導電性接着層を形成するス
テツプ、 e 中間積層体と電極積層体とをその光起電力層
と電極層とが対面するように重ね合わせ、導電
性接着層により接着固定するステツプ からなり、第1、第2の基板が可撓性の長尺基板
であり、該基板は連続的に実行されないステツプ
間ではロールにして移送し、連続的に実行される
ステツプ間ではロールを巻戻しつつ連続処理し、
次いでロールに巻取ることを特徴とする非晶質太
陽電池の製造方法であり、非常に生産性の良いプ
ロセスを実現するものである。 上述の本発明は、良好な電気的接合を得るため
には光起電力層の非晶質Si半導体層上に直接電極
層を膜形成手段等により形成するのが必須である
との従来の知見に反し、非晶質Si半導体層上に導
電性接着剤により別途作成した電極シートを接着
することにより、驚くべきことに従来の直接積層
した太陽電池に体し遜色のない性能を有する太陽
電池が得られることを見出し、なされたものであ
る。 上述の構成から本発明は以下の種々の作用効果
を奏する。 すなわち、光起電力層と一方の電極層を全く独
立に並行して作製できるので、従来に比し生産性
が大巾に上昇すると共に、光起電力層と電極層と
を独立に品質管理できると共に前述したパターン
化に伴なう問題もないので歩留りも大巾に上昇す
る。 また、本発明は一方の電極層を光起電力層の半
導体層とは無関係に別途基板上に形成する為、真
空蒸着法をはじめとする各種の電極形成法が利用
出来、広幅、長尺の大面積の太陽電池の製造に際
し連続化が容易である。又電極層のパターン化に
おいて非晶質Si半導体層に損傷を与える為に従来
使用することが困難であつたレーザスクライブ法
をはじめとしてマスク蒸着法等の種々の方法で容
易に形成可能で、太陽電池のパターン化も容易に
出来る。 さらに、導電性接着層を介して接合させる電極
層と光起電力積層体との基板を個々に選択するこ
とができるので、太陽電池を適用する為に必要な
各用途に適した表面保護能、耐久性能を各基板に
与えることによつて連続的に最終形態の太陽電池
を形成出来る。 以下、本発明の詳細を説明する。 第1図は、本発明の全体のブロツク説明図であ
る。 図示の通り、基板11上にステツプaで電極層
12が形成される。次いでステツプbで非晶質半
導体からなる後述の光起電力層13が積層され中
間積層体10が形成される。一方、もう一つの基
板21上にステツプcで電極層22が積層され、
電極積層体20が形成される。なお、図から明ら
かなように、ステツプcはステツプa及びステツ
プbとは時間的にも空間的にも全く独立して実施
できる。 ところで、光照射側に位置する上述の基板1
1,21と電極層12,22には、後述する透明
基板、透明電極が適用される。 ステツプdで中間積層体10の光起電力層13
上又は/及び電極積層体20の電極層22上には
導電性の接着層31が形成される。かかる接着層
31には後述する各種のものが適用される。 次いで、ステツプeで中間積層体10と電極積
層体20とが重ね合わされ、接着層31により接
着固定され、非晶質太陽電池30が形成される。 ところで、上述の各ステツプa〜eには生産性
面から連続的に処理される方式が好ましく適用さ
れる。そして基板11,21を可撓性の長尺の基
板としてロールに巻き上げて各ステツプ間を移送
し、各ステツプではロールを巻戻しつつ処理し再
びロールに巻き上げるようにすると、生産性面、
品質面で非常に有利である。 なお、上述の各ステツプa〜eはステツプ毎に
独立した装置としても良く、一つの装置内で複数
のステツプ例えばステツプaとステツプb、ある
いはステツプcとステツプd等を連続的に処理す
るようにしても良い。後者の場合、設備面、生産
性面、更に品質面で有利となる。 更には、各処理の時間的整合が得られれば全ス
テツプを一連の連続プロセスとして処理できる。 なお、太陽電池のパターニングが必要な場合
は、例えばレーザスクライブ方式を用いる場合
は、ステツプb、cあるいはdの後にパターニン
グのステツプを挿入すれば良く、マスク方式を用
いる場合には必要な処理をマスクを用いて行なえ
ば良く、パターニングの方式に応じた処理をすれ
ば良い。 以下、各構成について詳述する。 本発明の光起電力層の非晶質シリコン半導体層
はグロー放電法、スパツタリング法、イオンプレ
ーテイング法、イオンクラスタービーム法などの
公知の方法を用いて堆積する事が出来る。例え
ば、グロー放電法の場合、特開昭59−34668号公
報に開示のものと同様な3室分離非晶質Si堆積装
置を用い真空糟内にシラン(SiH4)、高次シラン
ガスを0.01〜10torrの圧力になるように導入し、
13.56MHzの高周波電力を供給、グロー放電分解
によつて前記ガスの分解生成物である非晶質Si半
導体層を設ける。非晶質Si層のP形あるいはn型
の電気導電型を制御する為には、シボラン
(B2H6)、あるいはホスフイン(PH3)、又はアル
シン(AsH3)などのガスを各専用堆積室に適量
導入する。又、非晶質Si半導体層の光学的禁制帯
幅を制御する為には、C、Ge、Sn、N、Fの第
3成分元素を導入する事が出来るが、その場合、
例えば炭化水素ガス、GeH4、SnH4、NH3
SiF4ガスなどをシランガスに混入して利用出来
る。また、投入高周波電力を増加させ、非晶質シ
リコン層中に一部微結晶層を混入させても良い。
光起電力層の構造としてはPin接合の他、Pin/
Pin、Pin/Pin/Pinのタンデム構造も用いる事
が出来る。 電極層としては、金属を主とする通常の電極層
の場合、Al、Ag、Au、Cu、Pt、Ni、Cr、Fe、
Mo、W、Ti、Coの金属単体および/またはそれ
らの合金金属層の単層および/または多層積層膜
が適用され、必要に応じて透明導電層を積層され
てなる電極層も適用される。なお、該電極層の形
成にはスパツタリング法、真空蒸着法等の物理的
方法、メツキ等の化学的方法、又、金属フイルム
をラミネートして設ける方法等種々の製法が適用
出来る。 該金属電極層としてはもちろん金属板そのもの
でも良く、又、電極層を堆積する基板として高分
子フイルム、セラミツク、ガラスあるいは絶縁化
処理を施した金属板、金属ホイルでも良い。 電極層が透明電極層である場合には酸化インジ
ユーム、酸化錫、錫酸カドニウム、酸化チタン等
の導電性酸化物、Au、Pt、Pd等の薄膜金属膜、
Agを主成分とする薄層を導電性酸化物層でサン
ドイツチ状に積層した導電性積層体等が用いられ
る。これらの透明電極層は真空蒸着法、スパツタ
リング法など公知の方法によつて形成出来、
10000Ω/□以下の表面抵抗、好ましくは1000
Ω/□以下の表面抵抗を有し、可視光での光透過
率が50%以上であることが望ましい。大面積太陽
電池を形成する時には、透明電極層での抵抗によ
る出力損失をさける為、くし形パターンの良導電
性金属層を収集電極として、基板/透明電極層界
面あるいは透明電極層表面に設けることも出来
る。又透明電極層を堆積した積層体の基板として
は高分子フイルム、高分子樹脂板、ガラス等の透
明性材料用いられる。 本発明の導電性接着層としてはポリエステル樹
脂、アクリル樹脂、ポリビニル系樹脂、エポキシ
系樹脂、ポリウレタン系樹脂、シリコーン系樹脂
等のバインダー用の高分子樹脂中に酸化錫、酸化
インジユウム、酸化チタン等の酸化物導電性微粒
子を分散させた分散型の導電性高分子樹脂接着剤
が用いられる。又ポリビニルカルバゾール等の導
電性高分子樹脂も使用出来る。さらに半田等の低
融点金属薄層を接着層として利用することも可能
である。接着力、耐久性等の面からは、導電性高
分子樹脂、特に分散型の導電性高分子樹脂が、電
気抵抗面からは低融点金属薄層が好ましく、用途
に応じて選定する。これらの導電性高分子樹脂は
スピナー法、バーコード法、ドクターブレード
法、スクリーン印刷法等の方法を用いて接合する
電極層表面あるいは非晶質半導体層表面に塗布す
る。非晶質半導体層の損傷発生を少なくする為に
は電極層表面に塗付するのが好ましい。この導電
性接着層が非晶質半導体光起電力層で発生した光
電流を電極層に損失なく伝達する役割をはたす為
には106cmΩ以下の抵抗率である事が望ましい。
なお、接着層の厚みは特に限定されないが、接着
力、耐久性、電気抵抗、光透過性等多くの因子に
関係し実験的に決める必要があるが、通常は0.01
〜10μの範囲で選定される。 又該導電性接着層もレーザスクライブ法、エツ
チング法等によるパターン化、あるいはスクリー
ン印刷によるパターン化塗付によつて、電導領域
を分割することが可能である。該導電性接着層を
設けた電極層、非晶質半導体層とを重ね合わせ、
又各層がパターン化されている場合は各パターン
を適切に位置合わせしてラミネートする事によつ
て本発明の非晶質太陽電池を形成出来る。 以下実施例をあげ、本発明を説明する。 [実施例] 金属電極層上に光起電力層として非晶質半導体
層を積層した光起電力積層体の基板として長尺の
厚さ100μmのポリエステルフイルムを用いた。
このポリエステルフイルムのロールを巻戻しつ
つ、その上に金属電極層としてアルミニウム層を
0.4μmの厚さに、さらにステンレス鋼層を100Å
の厚さに連続スパツタ装置を用いて連続的に堆積
し、再びロールに巻取つた。 非晶質半導体層として非晶質シリコン層を特開
昭59−34668号公報に開示のものと同様な内部電
極型の3室分離方式の高周波(13.56MHz)グロ
ー放電装置を用いて前記金属電極層上に以下のよ
うにして設けた。すなわち、巻出し室に前記ポリ
エステルフイルム基板上に金属電極層を形成した
電極基板のロールを装着し、巻出し室と反応室と
の間に設けたプレスパツタ室で215℃に該基板を
加熱しながらアルゴンガス又は/及び水素ガスを
導入して1.0torrの各ガス雰囲気下で5〜30wの高
周波電力を印加し前記基板をプレスパツタリング
を行つてクリーニングを行う。 次にシランガスとシランガスに対して1%濃度
のシボランガスを導入した1torrの該ガス雰囲気
下のP型反応室でグロー放電分解により該基板上
に厚さ250ÅのP型の非晶質シリコン層を設ける。 引続いてシランガス単独でi型反応室において
i型の非晶質シリコン層を厚5000Å積層する。次
に、シランガスとシランガスに対して1%のホス
フインガス、さらに水素ガスを導入したn型反応
室において微結晶層を含んだn型の非晶質シリコ
ン層を厚さ200Å設け、ポリエステルフイルム/
Al/ss/pin型非晶質シリコンからなる中間積層
体として巻取室でロールに巻取る。このように所
定の光起電力積層体ロールを得た。 一方透明電極層は以下のようにして作成した。
すなわち、同じ100μm厚のポリエステルフイル
ムを基板としてそのロールをスパツタ装置内に装
着し、10-5torrに排気しながら50℃に加熱する。
その後アルゴンガスを導入し3×10-3torrの雰囲
気下で、酸化インジユームと酸化錫の混合酸化物
ターゲツトからスパツタリングして厚さ700Åの
錫をドープした酸化インジユーム層をポリエステ
ルフイルム上に設けて、所定の透明電極層を積層
した電極積層体とし、巻取つてロールを得た。 この電極積層体のロールを巻戻しつつ、導電性
接着層として酸化錫微粒子をポリエステル系樹脂
バインダー中に分散した導電性高分子樹脂をバー
コート法により厚さ1μで前記透明電極層の酸化
インジユーム層上に連続的に塗布し、再び巻取つ
てロールとした。 この透明電極層/導電性樹脂層の電極積層体及
び前述の光起電力積層体の各ロールを巻戻しつ
つ、YAGレーザースクライブ法を用いて夫々1
cm角にパターニングし電気的に分離された小領域
を形成し、再び巻取つてロールとした。 次に、この小領域に区画された光起電力積層体
と電極積層体の両ロールを巻戻しつつ、その非晶
質シリコン層と導電性樹脂層を密着する様に重ね
合わせ、180℃に加熱された加熱ローラーからな
るラミネーター装置を用いてラミネートし、前記
2つの積層体を接合させ、太陽電池を製作した。
この様にして得た区画された小面積の太陽電池を
600ルツクスの蛍光燈下で測定した結果蛍光燈下
での変換効率11.5%であつた。その他の詳細デー
タを表1に示す。
[Field of Application] The present invention relates to a method for manufacturing an amorphous solar cell using an amorphous semiconductor as a photovoltaic layer, and more particularly to a method for manufacturing an amorphous solar cell with high yield and productivity. [Prior art] Amorphous solar cells, which use amorphous silicon as a photovoltaic layer among amorphous semiconductors, can be made uniformly and continuously over a wide area at a low substrate temperature using a glow discharge decomposition method using silane gas, disilane gas, etc. It can be deposited on polymer films, glass, ceramics, etc. as substrates.
Various substrates such as metal foil can be selected, and it is widely researched because it is extremely cost-effective. However, there are the following manufacturing problems. The basic structure of an amorphous silicon (Si) semiconductor solar cell is mainly a laminated structure of a metal electrode layer/amorphous Si semiconductor layer/transparent electrode layer provided on the various substrates mentioned above. Amorphous Si semiconductor layer, transparent electrode layer or transparent electrode layer, amorphous Si
Physical methods such as vacuum evaporation method, sputtering method, glow discharge decomposition method, and light
Each layer is sequentially deposited using a film forming method such as a chemical method such as CVD method. For example, when a metal electrode layer, an amorphous Si semiconductor layer, and a transparent electrode layer are sequentially deposited in this order, when a module is created by patterning solar cells on the same substrate, vapor deposition using a mask is used. , a method of patterning a transparent electrode layer by a sputtering method, a dry etching method using a resist, or a wet etching method has been used. By the way, in the case of patterning using a mask,
Since a metal mask or the like must be brought into direct contact with the surface of the amorphous Si semiconductor layer, there is a problem in that the amorphous Si semiconductor layer itself is easily damaged and the yield is reduced. Furthermore, in order to continuously create wide and long large-area solar cells, a wide and long mask with many openings must be brought into close contact with the substrate and moved accurately. There's a problem. On the other hand, patterning using resist not only easily damages the amorphous Si semiconductor layer itself, but also requires complicated processes such as resist attachment, etching, and resist removal. be. [Object of the Invention] An object of the present invention is to solve the above problems and provide a method for manufacturing an amorphous solar cell with high productivity and high yield. [Structure of the Invention] The above-mentioned object is achieved by the following present invention. That is, the present invention provides a method for manufacturing an amorphous solar cell using the aforementioned amorphous semiconductor as a photovoltaic layer, including the steps of: (a) forming an electrode layer on a first substrate; (b) applying a photovoltaic force to the electrode layer; laminating layers to form an intermediate laminate; c laminating an electrode layer on a second substrate to form an electrode laminate; d laminating a photovoltaic layer of the intermediate laminate and/or an electrode laminate a step of forming a conductive adhesive layer on the electrode layer, e a step of overlapping the intermediate laminate and the electrode laminate so that the photovoltaic layer and the electrode layer face each other, and adhering and fixing them with the conductive adhesive layer; In this case, the first and second substrates are flexible elongated substrates, and the substrates are transported in a roll between steps that are not executed continuously, and the roll is rewound between steps that are executed continuously. continuous processing,
This method of manufacturing an amorphous solar cell is characterized in that the solar cell is then wound into a roll, realizing a highly productive process. The present invention described above is based on the conventional knowledge that in order to obtain a good electrical connection, it is essential to form an electrode layer directly on the amorphous Si semiconductor layer of the photovoltaic layer by a film forming method or the like. However, by adhering a separately prepared electrode sheet onto the amorphous Si semiconductor layer using a conductive adhesive, it was surprisingly possible to create a solar cell with performance comparable to conventional directly laminated solar cells. This was done after discovering what could be achieved. From the above-described configuration, the present invention has the following various effects. In other words, since the photovoltaic layer and one electrode layer can be fabricated completely independently and in parallel, productivity is greatly increased compared to conventional methods, and the quality of the photovoltaic layer and electrode layer can be controlled independently. At the same time, since there are no problems associated with patterning as described above, the yield can be greatly increased. In addition, in the present invention, since one electrode layer is formed on a separate substrate independently of the semiconductor layer of the photovoltaic layer, various electrode formation methods including vacuum evaporation can be used, and wide and long electrode layers can be formed. Continuation is easy when manufacturing large area solar cells. In addition, when patterning the electrode layer, it can be easily formed using various methods such as laser scribing, which was difficult to use in the past because it would damage the amorphous Si semiconductor layer, and mask evaporation. Battery patterns can also be easily created. Furthermore, since it is possible to individually select the substrates for the electrode layer and photovoltaic laminate to be bonded via the conductive adhesive layer, the surface protection ability suitable for each application required for applying the solar cell, By imparting durability to each substrate, solar cells in their final form can be formed continuously. The details of the present invention will be explained below. FIG. 1 is an overall block diagram of the present invention. As shown, an electrode layer 12 is formed on a substrate 11 in step a. Next, in step b, a photovoltaic layer 13, which will be described later, made of an amorphous semiconductor is laminated to form an intermediate laminate 10. On the other hand, an electrode layer 22 is laminated on the other substrate 21 in step c,
Electrode stack 20 is formed. As is clear from the figure, step c can be performed completely independently of step a and step b, both temporally and spatially. By the way, the above-mentioned substrate 1 located on the light irradiation side
1 and 21 and the electrode layers 12 and 22, transparent substrates and transparent electrodes, which will be described later, are applied. In step d, the photovoltaic layer 13 of the intermediate laminate 10 is
A conductive adhesive layer 31 is formed on and/or on the electrode layer 22 of the electrode stack 20 . Various types of adhesive layers described below can be applied to the adhesive layer 31. Next, in step e, the intermediate laminate 10 and the electrode laminate 20 are overlapped and fixed by adhesive layer 31 to form an amorphous solar cell 30. Incidentally, from the viewpoint of productivity, a continuous process method is preferably applied to each of the above-mentioned steps a to e. Then, the substrates 11 and 21 are rolled up into rolls as flexible long substrates, and transported between each step, and at each step, the rolls are unwound and processed, and then wound up again into the rolls, which improves productivity.
Very advantageous in terms of quality. Incidentally, each of the above-mentioned steps a to e may be performed as an independent device for each step, or a plurality of steps such as step a and step b, or step c and step d, etc. may be continuously processed within one device. It's okay. In the latter case, it is advantageous in terms of equipment, productivity, and quality. Furthermore, if time alignment of each process is achieved, all steps can be processed as a series of continuous processes. If patterning of the solar cell is required, for example, if a laser scribe method is used, a patterning step can be inserted after steps b, c, or d, and if a mask method is used, the necessary processing can be done by masking. It is sufficient to carry out processing according to the patterning method. Each configuration will be explained in detail below. The amorphous silicon semiconductor layer of the photovoltaic layer of the present invention can be deposited using known methods such as glow discharge method, sputtering method, ion plating method, and ion cluster beam method. For example, in the case of the glow discharge method, a three-chamber separated amorphous Si deposition apparatus similar to that disclosed in JP-A No. 59-34668 is used, and silane (SiH 4 ) and higher-order silane gas are added in a vacuum chamber at 0.01 to Introduce the pressure to 10torr,
A high frequency power of 13.56 MHz is supplied, and an amorphous Si semiconductor layer which is a decomposition product of the gas is formed by glow discharge decomposition. In order to control the P-type or N-type electrical conductivity type of the amorphous Si layer, a gas such as ciborane (B 2 H 6 ), phosphine (PH 3 ), or arsine (AsH 3 ) is deposited specifically for each type. Introduce an appropriate amount into the room. In addition, in order to control the optical forbidden band width of the amorphous Si semiconductor layer, third component elements such as C, Ge, Sn, N, and F can be introduced, but in that case,
For example, hydrocarbon gas, GeH 4 , SnH 4 , NH 3 ,
It can be used by mixing SiF 4 gas etc. with silane gas. Alternatively, a portion of the microcrystalline layer may be mixed into the amorphous silicon layer by increasing the input high-frequency power.
In addition to Pin junction, the structure of the photovoltaic layer is Pin/
A tandem structure of Pin or Pin/Pin/Pin can also be used. For the electrode layer, in the case of a normal electrode layer mainly made of metal, Al, Ag, Au, Cu, Pt, Ni, Cr, Fe,
Single-layer and/or multi-layer laminated films of single metals such as Mo, W, Ti, and Co and/or alloy metal layers thereof are applied, and if necessary, electrode layers formed by laminating transparent conductive layers are also applied. In addition, various manufacturing methods can be applied to form the electrode layer, such as a physical method such as a sputtering method and a vacuum evaporation method, a chemical method such as plating, and a method in which a metal film is laminated. The metal electrode layer may of course be a metal plate itself, or the substrate on which the electrode layer is deposited may be a polymer film, ceramic, glass, or a metal plate or metal foil subjected to an insulating treatment. When the electrode layer is a transparent electrode layer, conductive oxides such as indium oxide, tin oxide, cadmium stannate, and titanium oxide, thin metal films such as Au, Pt, and Pd,
A conductive laminate or the like is used, in which a thin layer mainly composed of Ag is laminated with a conductive oxide layer in the shape of a sandwich. These transparent electrode layers can be formed by known methods such as vacuum evaporation and sputtering.
Surface resistance less than 10000Ω/□, preferably 1000
It is desirable to have a surface resistance of Ω/□ or less and a visible light transmittance of 50% or more. When forming a large area solar cell, in order to avoid output loss due to resistance in the transparent electrode layer, a comb-shaped highly conductive metal layer is provided as a collection electrode at the substrate/transparent electrode layer interface or on the surface of the transparent electrode layer. You can also do it. Further, as the substrate of the laminate on which the transparent electrode layer is deposited, a transparent material such as a polymer film, a polymer resin plate, or glass is used. The conductive adhesive layer of the present invention contains tin oxide, indium oxide, titanium oxide, etc. in a polymer resin for a binder such as polyester resin, acrylic resin, polyvinyl resin, epoxy resin, polyurethane resin, silicone resin, etc. A dispersed conductive polymer resin adhesive in which oxide conductive fine particles are dispersed is used. Further, conductive polymer resins such as polyvinyl carbazole can also be used. Furthermore, it is also possible to use a thin layer of a low melting point metal such as solder as an adhesive layer. From the viewpoint of adhesive strength, durability, etc., a conductive polymer resin, especially a dispersed conductive polymer resin, is preferable, and from the viewpoint of electrical resistance, a thin layer of a low melting point metal is preferable, and the selection is made depending on the application. These conductive polymer resins are applied to the surface of the electrode layer or amorphous semiconductor layer to be bonded using a method such as a spinner method, a barcode method, a doctor blade method, or a screen printing method. In order to reduce damage to the amorphous semiconductor layer, it is preferable to apply it to the surface of the electrode layer. In order for this conductive adhesive layer to play the role of transmitting the photocurrent generated in the amorphous semiconductor photovoltaic layer to the electrode layer without loss, it is desirable that the conductive adhesive layer has a resistivity of 10 6 cmΩ or less.
The thickness of the adhesive layer is not particularly limited, but it must be determined experimentally as it is related to many factors such as adhesive strength, durability, electrical resistance, and optical transparency, but is usually 0.01.
It is selected in the range of ~10μ. Further, the electrically conductive adhesive layer can also be divided into electrically conductive regions by patterning by laser scribing, etching, etc., or patterned coating by screen printing. Laminating the electrode layer provided with the conductive adhesive layer and the amorphous semiconductor layer,
Further, when each layer is patterned, the amorphous solar cell of the present invention can be formed by appropriately aligning each pattern and laminating. The present invention will be explained below with reference to Examples. [Example] A long polyester film with a thickness of 100 μm was used as a substrate of a photovoltaic laminate in which an amorphous semiconductor layer was laminated as a photovoltaic layer on a metal electrode layer.
While unwinding this roll of polyester film, an aluminum layer is placed on top of it as a metal electrode layer.
0.4μm thick with an additional 100Å stainless steel layer
The film was deposited continuously using a continuous sputtering device to a thickness of 100 mL, and then wound onto a roll again. An amorphous silicon layer as an amorphous semiconductor layer was formed on the metal electrode using an internal electrode type three-chamber separation type high frequency (13.56MHz) glow discharge device similar to that disclosed in JP-A-59-34668. It was provided on the layer as follows. That is, a roll of an electrode substrate in which a metal electrode layer was formed on the polyester film substrate was placed in an unwinding chamber, and the substrate was heated to 215° C. in a press spattering chamber provided between the unwinding chamber and the reaction chamber. Argon gas and/or hydrogen gas is introduced and high frequency power of 5 to 30 W is applied in each gas atmosphere of 1.0 torr, and the substrate is pre-sputtered and cleaned. Next, a P-type amorphous silicon layer with a thickness of 250 Å is formed on the substrate by glow discharge decomposition in a P-type reaction chamber under a gas atmosphere of 1 torr in which silane gas and ciborane gas at a concentration of 1% relative to the silane gas are introduced. . Subsequently, an i-type amorphous silicon layer with a thickness of 5000 Å is deposited in an i-type reaction chamber using silane gas alone. Next, an n-type amorphous silicon layer containing a microcrystalline layer was formed to a thickness of 200 Å in an n-type reaction chamber into which silane gas, 1% phosphine gas relative to the silane gas, and hydrogen gas were introduced.
An intermediate laminate made of Al/ss/pin type amorphous silicon is wound into a roll in a winding chamber. In this way, a predetermined photovoltaic laminate roll was obtained. On the other hand, the transparent electrode layer was created as follows.
That is, using the same 100 μm thick polyester film as a substrate, the roll is mounted in a sputtering device and heated to 50° C. while being evacuated to 10 −5 torr.
Thereafter, a 700 Å thick tin-doped indium oxide layer was formed on the polyester film by sputtering from a mixed oxide target of indium oxide and tin oxide under an atmosphere of 3×10 -3 torr by introducing argon gas. A predetermined transparent electrode layer was laminated to form an electrode laminate, which was then wound to obtain a roll. While unwinding the roll of this electrode laminate, a conductive polymer resin in which tin oxide fine particles are dispersed in a polyester resin binder is applied as a conductive adhesive layer to a thickness of 1 μm using a bar coating method to form the indium oxide layer of the transparent electrode layer. It was continuously coated on top and wound up again to form a roll. While unwinding each roll of the electrode laminate of the transparent electrode layer/conductive resin layer and the photovoltaic laminate described above, each roll was
It was patterned into cm squares to form electrically isolated small areas, and then wound again to form a roll. Next, while unwinding both the rolls of the photovoltaic laminate and the electrode laminate divided into small areas, the amorphous silicon layer and conductive resin layer are overlapped so that they are in close contact with each other, and heated to 180°C. The two laminates were laminated using a laminator device including heated rollers, and the two laminates were joined to produce a solar cell.
The small-area solar cells obtained in this way are
The conversion efficiency under fluorescent light was 11.5% when measured under 600 lux fluorescent light. Other detailed data are shown in Table 1.

【表】 を表わす。
表1の結果は本発明の太陽電池が十分な性能を
有し、従来例に比し遜色ないことを示している。
[Table] represents.
The results in Table 1 show that the solar cell of the present invention has sufficient performance and is comparable to conventional examples.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のフローを示す説明図である。 10:中間積層体、20:電極積層体、30:
非晶質太陽電池。
FIG. 1 is an explanatory diagram showing the flow of the present invention. 10: Intermediate laminate, 20: Electrode laminate, 30:
Amorphous solar cells.

Claims (1)

【特許請求の範囲】 1 非晶質半導体を光起電力層とした非晶質太陽
電池の製造方法において、(a)第1の基板上に電極
層を形成するステツプと、(b)該電極層上に光起電
力層を積層して中間積層体を形成するステツプ
と、(c)第2の基板上に電極層を積層して電極積層
体を形成するステツプと、(d)中間積層体の光起電
力層若しくは/及び電極積層体の電極層上に導電
性接着層を形成するステツプと、(e)中間積層体の
光起電力層に電極層が重なるように電極積層体を
接着固定するステツプの各ステツプからなり、第
1、第2の基板が可撓性の長尺基板であり、該基
板は連続的に実行されないステツプ間ではロール
にして移送し、連続的に実行されるステツプ間で
はロールを巻戻しつつ連続処理し、次いでロール
に巻取ることを特徴とする非晶質太陽電池の製造
方法。 2 前記第1、第2の基板が高分子フイルムであ
る特許請求の範囲第1項記載の非晶質太陽電池の
製造方法。 3 前記導電性接着層が塗布された導電性高分子
樹脂層である特許請求の範囲第1項若しくは第2
項記載の非晶質太陽電池の製造方法。 4 前記導電性高分子樹脂層が、導電性酸化物、
金属又はこれらの混合物の微粒子を分散させて導
電性を付与した高分子樹脂層である特許請求の範
囲第3項記載の非晶質太陽電池の製造方法。 5 前記非晶質半導体が、SiとHを主成分とし、
必要ならばその禁制帯幅を選択する為に適当量の
C、Ge、Sn、N、Fが添加され、又、電気導電
型を制御する為に微量のB、P、Asをドープさ
れた非晶質シリコン層である特許請求の範囲第1
項、第2項、第3項若しくは第4項記載の非晶質
太陽電池の製造方法。
[Claims] 1. A method for manufacturing an amorphous solar cell using an amorphous semiconductor as a photovoltaic layer, comprising: (a) forming an electrode layer on a first substrate; and (b) forming an electrode layer on a first substrate. (c) laminating an electrode layer on a second substrate to form an electrode stack; and (d) forming an intermediate stack. (e) forming a conductive adhesive layer on the photovoltaic layer of the intermediate laminate and/or the electrode layer of the electrode laminate; and (e) adhesively fixing the electrode laminate so that the electrode layer overlaps the photovoltaic layer of the intermediate laminate. The first and second substrates are flexible elongated substrates, and the substrates are rolled and transported between steps that are not executed continuously, and are transferred between steps that are not executed continuously. A method for producing an amorphous solar cell, comprising continuous processing while unwinding the roll in between, and then winding it into a roll. 2. The method of manufacturing an amorphous solar cell according to claim 1, wherein the first and second substrates are polymer films. 3. Claim 1 or 2, wherein the conductive adhesive layer is a conductive polymer resin layer coated with the conductive adhesive layer.
1. Method for manufacturing an amorphous solar cell as described in Section 1. 4 The conductive polymer resin layer comprises a conductive oxide,
4. The method for manufacturing an amorphous solar cell according to claim 3, wherein the polymer resin layer is made of a polymer resin layer in which conductivity is imparted by dispersing fine particles of a metal or a mixture thereof. 5 The amorphous semiconductor contains Si and H as main components,
If necessary, suitable amounts of C, Ge, Sn, N, and F are added to select the forbidden band width, and non-containing materials doped with trace amounts of B, P, and As to control the electrical conductivity type. Claim 1, which is a crystalline silicon layer
The method for manufacturing an amorphous solar cell according to item 2, item 3, or item 4.
JP60032587A 1985-02-22 1985-02-22 Manufacture of amorphous solar cell Granted JPS61193488A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60032587A JPS61193488A (en) 1985-02-22 1985-02-22 Manufacture of amorphous solar cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60032587A JPS61193488A (en) 1985-02-22 1985-02-22 Manufacture of amorphous solar cell

Publications (2)

Publication Number Publication Date
JPS61193488A JPS61193488A (en) 1986-08-27
JPH0564871B2 true JPH0564871B2 (en) 1993-09-16

Family

ID=12362996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60032587A Granted JPS61193488A (en) 1985-02-22 1985-02-22 Manufacture of amorphous solar cell

Country Status (1)

Country Link
JP (1) JPS61193488A (en)

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CN102544126A (en) * 2010-12-14 2012-07-04 三菱综合材料株式会社 Back electrode strap for thin film solar cell and producing method of thin film solar cell

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JPH036867A (en) * 1989-06-05 1991-01-14 Mitsubishi Electric Corp Electrode structure of photovoltaic device, forming method, and apparatus for manufacture thereof
JP2008047721A (en) * 2006-08-17 2008-02-28 Toppan Printing Co Ltd Solar cell substrate, its manufacturing method, solar cell using the same and its manufacturing method
JP2012142539A (en) * 2010-12-14 2012-07-26 Mitsubishi Materials Corp Back electrode tape for thin film solar cell and manufacturing method of thin film solar cell using back electrode tape
JP6065419B2 (en) * 2012-06-13 2017-01-25 三菱マテリアル株式会社 Laminate for thin film solar cell and method for producing thin film solar cell using the same

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JPS57172777A (en) * 1981-04-15 1982-10-23 Nippon Sheet Glass Co Ltd Modularization of photocell
JPS5854684A (en) * 1981-09-08 1983-03-31 テキサス・インスツルメンツ・インコ−ポレイテツド Solar energy converter
JPS58134481A (en) * 1982-02-05 1983-08-10 Hitachi Ltd Electrode connecting member for electric part and connecting method
JPS5853159B2 (en) * 1975-10-11 1983-11-28 タカハシ ヤスモト Cylinder lock for filing cabinets, etc.
JPS61112384A (en) * 1984-11-07 1986-05-30 Teijin Ltd Solar battery and manufacture thereof

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JPS5853159B2 (en) * 1975-10-11 1983-11-28 タカハシ ヤスモト Cylinder lock for filing cabinets, etc.
JPS57172777A (en) * 1981-04-15 1982-10-23 Nippon Sheet Glass Co Ltd Modularization of photocell
JPS5854684A (en) * 1981-09-08 1983-03-31 テキサス・インスツルメンツ・インコ−ポレイテツド Solar energy converter
JPS58134481A (en) * 1982-02-05 1983-08-10 Hitachi Ltd Electrode connecting member for electric part and connecting method
JPS61112384A (en) * 1984-11-07 1986-05-30 Teijin Ltd Solar battery and manufacture thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102544126A (en) * 2010-12-14 2012-07-04 三菱综合材料株式会社 Back electrode strap for thin film solar cell and producing method of thin film solar cell

Also Published As

Publication number Publication date
JPS61193488A (en) 1986-08-27

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