JPH0563013B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a thin film transistor, and particularly to a method for manufacturing a thin film transistor of a structure in which a gate electrode is located below a polycrystalline silicon (polysilicon) film forming a channel region. The present invention relates to a method for manufacturing a thin film transistor.

[Conventional technology]

An example of a method for manufacturing a thin film transistor having a gate electrode at the bottom is shown in the drawings (Figures 3-a to 3-c).
This will be explained using Figure). As shown in FIG. 3-a, the second gate insulating film 9 and sidewalls on the upper surface of the gate polysilicon 7 formed on the semiconductor substrate 1 in five N-type regions with the first gate insulating film 2 interposed therebetween. A thin polysilicon 12 is deposited to cover the insulating film 8 and the oxide film 6, heat treated using a laser or the like, and then the thin polysilicon 12 is patterned as shown in Figure 3-b. Using a mask material such as photoresist, a P-type impurity layer 13 that will become the source/drain region of the P-channel transistor is formed in the thin polysilicon 12 by ion implantation, and an interlayer insulating film 14, a contact hole 15, and an aluminum wiring 16 are formed. , forming a cover insulating film 17,
Finally, a thin film transistor having a structure as shown in FIG. 3-c is produced.

[Problem that the invention seeks to solve]

In the above-mentioned example of the conventional method for manufacturing a thin film transistor having a gate electrode at the bottom, the second step is first performed.
Polysilicon 12 deposited on gate insulating film 9 of
The film thickness becomes the film thickness of the thin film transistor to be finally created. In order to lower the threshold value of a thin film transistor, increase carrier mobility, and reduce channel leakage current, it is necessary to form a polysilicon film 12 with a large crystal grain size and a small thickness. The crystal grain size of this polysilicon increases by heat treatment, and since the thicker the film, the larger the crystal grain size tends to be, trying to obtain a larger crystal grain size. The thickness of the polysilicon film had to be increased. However, there is a drawback that increasing the thickness of the polysilicon film increases channel leakage current.

As described above, the conventional manufacturing method of a thin film transistor having a gate electrode at the bottom has a drawback that it is difficult to form a thin film transistor with good characteristics.

[Means for solving problems]

The method for manufacturing a thin film transistor of the present invention includes the steps of forming a gate electrode, forming a gate insulating film on the surface of the gate electrode, and depositing thick polysilicon or amorphous silicon on the gate insulating film. The method includes a step of performing heat treatment to form a polysilicon film with a large crystal grain size, and a step of thickly oxidizing the surface of the polysilicon to reduce the thickness of the polysilicon film. The above-described step of oxidizing the surface of polysilicon may be performed either before or after the patterning step of polysilicon, as long as it is after the step of applying heat treatment to polysilicon.

[Effect]

The present invention involves increasing the thickness of polysilicon or amorphous silicon deposited on a gate insulating film, applying heat treatment to form polysilicon with a large crystal grain size, and then oxidizing the surface of the polysilicon. By reducing the thickness of the polysilicon film, it is possible to form a thin film of polysilicon with a large crystal grain size, creating a thin film transistor with good characteristics such as a low absolute value of threshold voltage and high carrier mobility. I can do that.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

Figures 1-a to 1-h are longitudinal sectional views showing the main steps of the first embodiment of the present invention.

In FIG. 1-a, a region that will become a channel of an N-channel transistor is masked with a nitride film 3 on a P-type semiconductor substrate 1 on which a first gate insulating film 2 is formed, and N-type impurity ions 4 are ionized. By implanting, an N-type diffusion layer 5 is formed in the semiconductor substrate 1.
form.

In FIG. 1-b, an N-type diffusion layer 5 is formed by selectively oxidizing the semiconductor substrate 1 using the nitride film 3 as a mask.
An oxide film 6 is formed thereon. Thereafter, the nitride film 3 is removed and the gate polysilicon 7 shown in FIG. 1-c is formed.

In FIG. 1-d, a sidewall insulating film 8 is formed around the gate polysilicon 7 so that the upper surface of the gate polysilicon 7 is exposed.

In FIG. 1-e, a second gate insulating film 9 is formed on the upper surface of the gate polysilicon 7. As shown in FIG.

In FIG. 1-f, an n-type polysilicon film 10 with a thickness of, for example, 5000 Å is deposited on a semiconductor substrate 1, and heat treatment is performed at, for example, 1000°C for about 10 seconds using an arc lamp or the like, and the polysilicon film is 10 crystal grains are grown to a grain size of approximately 400 Å.

In FIG. 1-g, after patterning a polysilicon film 10, the surface is oxidized to form a polysilicon oxide film 11 of, for example, about 11,000 Å, thereby obtaining a thin polysilicon 12 of about 300 Å.

After that, using a mask material such as photoresist,
A P-type impurity layer 13 is formed by ion implantation in the region of thin polysilicon 12 that will become the source/drain of a P channel transistor, and an interlayer insulating film 14, a contact hole 15, an aluminum wiring 16, and a cover insulating film 17 are formed by a normal method. to form the
The result will be as shown in Figure 1-h.

In the first embodiment described here, the N-channel transistor and the P-channel transistor have a common gate electrode 7, and the N-channel transistor is mounted on the semiconductor substrate 1 and the P-channel transistor is mounted on the thin polysilicon 12. This is an example of a structure to be formed, in which an N-type diffusion layer 5 that becomes the source/drain region of an N-channel transistor is formed by ion implantation using the nitride film 3 as a mask in a non-self-aligned manner with the gate electrode 7. The thing is,
When forming the P-type impurity layer 13 which will become the source/drain region of the P-channel transistor formed on the upper part of the gate electrode 7, misalignment of the photomask depicting the source/drain region with respect to the gate electrode 7 occurs in the photoresist process. This is to increase the gate length of the P-channel transistor to compensate for the shortening of the effective channel length of the P-channel transistor caused by this.

For the present invention, the manufacturing method up to the formation of the second gate oxide film shown in FIG. 1-e is not important, and may be replaced with another method.

Figures 2-a to 2-f are longitudinal cross-sectional views showing the main steps of the second embodiment of the present invention.

In Figure 2-a, a gate insulating film 18 is formed on the surface.
A nitride film 3 is formed on the semiconductor substrate 1 on which the nitride film 3 is formed, in a region that will become the gate of an N-channel transistor, and as shown in FIG. After forming the film 19 and removing the nitride film 3 as shown in FIG. Form.

In step 2-d, amorphous silicon containing P-type impurities is deposited on the semiconductor substrate 1 to a thickness of, for example,
A polysilicon film 10 having a crystal grain size of about 900 Å is formed by depositing 5000A and performing heat treatment for 30 minutes at 1000°C in an electric furnace, and as shown in FIG. 2-c, the surface of the polysilicon film 10 is oxidized. , the film thickness is increased by forming a polysilicon oxide film 11 of about 11000 Å.
A thin polysilicon 12 of about 300 Å is obtained.

Thereafter, the polysilicon oxide film 11 and the thin polysilicon 12 are patterned, and the source of the N-channel transistor,
Forming an N-type impurity layer 20 that will become a drain region,
The interlayer insulating film 14, the contact hole 15, the aluminum wiring 16, and the cover insulating film 17 are formed by a normal method.
form.

〔Effect of the invention〕

As explained above, in manufacturing a thin film transistor having a structure in which a gate electrode is located under a polysilicon film forming a channel region, the present invention is advantageous in that the thickness of the polysilicon layer stacked after the gate insulating film is formed is increased. By applying heat treatment to grow polysilicon crystal grains and then oxidizing the surface of the polysilicon, it is possible to form a polysilicon film with a large crystal grain size and a thin film thickness, which increases the threshold voltage. This has the effect of making it possible to create a thin film transistor with good characteristics such as a low absolute value and high carrier mobility.

[Brief explanation of drawings]

Figures 1-a to 1-h are longitudinal sectional views of the main steps of the first embodiment of the present invention, and Figures 2-a to 2-h are longitudinal sectional views of the main steps of the first embodiment of the present invention.
Figure 3-f is a vertical sectional view of the main steps of the second embodiment of the present invention, and Figures 3-a to 3-c are vertical sectional views of the main steps of the conventional method. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... First gate insulating film, 3... Nitride film, 4... N-type impurity ion, 5
...N-type diffusion layer, 6...Oxide film, 7...Gate polysilicon, 8...Side wall insulating film, 9...Second gate insulating film, 10...Polysilicon film, 11...
Polysilicon oxide film, 12... Thin polysilicon, 13... P-type impurity layer, 14... Interlayer insulating film, 15... Contact opening, 16... Aluminum wiring, 17... Cover insulating film, 18... Gate Insulating film, 19... element isolation insulating film, 20... N-type impurity layer.

Claims (1)

[Scope of Claims] 1. A process of forming a gate electrode, a process of forming a gate insulating film on the surface of the gate electrode, a process of forming a silicon film on the gate insulating film, and a heat treatment to form the silicon film. A thin film transistor characterized by comprising the steps of: forming a polycrystalline silicon film with a large crystal grain size; and reducing the thickness of the polycrystalline silicon film by oxidizing the surface of the polycrystalline silicon film. Production method. 2. The method of manufacturing a thin film transistor according to claim 1, wherein the silicon film is a polycrystalline silicon film. 3. The method of manufacturing a thin film transistor according to claim 1, wherein the silicon film is an amorphous silicon film.