JPH0559453B2 - - Google Patents
Info
- Publication number
- JPH0559453B2 JPH0559453B2 JP61078655A JP7865586A JPH0559453B2 JP H0559453 B2 JPH0559453 B2 JP H0559453B2 JP 61078655 A JP61078655 A JP 61078655A JP 7865586 A JP7865586 A JP 7865586A JP H0559453 B2 JPH0559453 B2 JP H0559453B2
- Authority
- JP
- Japan
- Prior art keywords
- subscript
- array
- dimensional
- register
- block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 claims description 26
- 230000000903 blocking effect Effects 0.000 claims description 12
- 238000013507 mapping Methods 0.000 description 24
- 238000004364 calculation method Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- 238000003491 array Methods 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000007430 reference method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Landscapes
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61078655A JPS62235659A (ja) | 1986-04-04 | 1986-04-04 | 多次元配列のブロツク化アドレツシング装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61078655A JPS62235659A (ja) | 1986-04-04 | 1986-04-04 | 多次元配列のブロツク化アドレツシング装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62235659A JPS62235659A (ja) | 1987-10-15 |
JPH0559453B2 true JPH0559453B2 (ko) | 1993-08-31 |
Family
ID=13667873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61078655A Granted JPS62235659A (ja) | 1986-04-04 | 1986-04-04 | 多次元配列のブロツク化アドレツシング装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62235659A (ko) |
-
1986
- 1986-04-04 JP JP61078655A patent/JPS62235659A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS62235659A (ja) | 1987-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0739513B1 (en) | Method of transmitting of data | |
US6381668B1 (en) | Address mapping for system memory | |
Parsons et al. | A++/P++ array classes for architecture independent finite difference computations | |
JPH06318154A (ja) | 算術演算の必要性を最小にする方法及びそのための結果キャッシュ | |
US6128639A (en) | Array address and loop alignment calculations | |
JPH0812636B2 (ja) | 仮想記憶制御方式の計算機システム | |
KR100474357B1 (ko) | 다단계 분할을 이용한 기억소자 할당방법 | |
JPH06162227A (ja) | ベクトル並列計算機 | |
US5900023A (en) | Method and apparatus for removing power-of-two restrictions on distributed addressing | |
CA1115425A (en) | Data processor with address extension | |
JP2814860B2 (ja) | 画像拡大縮小装置 | |
JPH0559453B2 (ko) | ||
Harper | A multiaccess frame buffer architecture | |
EP0313787A2 (en) | A hardware mechanism for the dynamic customization of permutation using bit-matrix multiplication | |
EP0888586B1 (en) | Array indexing | |
JPH0289132A (ja) | 論理アドレス生成方式 | |
JPH0214364A (ja) | 多次元配列の一次元記憶空間への写像・参照方式 | |
JPH0559454B2 (ko) | ||
Ye et al. | High-performance NTT architecture for large integer multiplication | |
JPH0522238B2 (ko) | ||
Parkinson | 12 Practical parallel processors and their uses | |
JP2806262B2 (ja) | マルチプロセッサシステムのプロセス割当方法 | |
Moskowitz et al. | An algebraic memory model | |
Lenfant | Fast random and sequential access to dynamic memories of any size | |
JPH0331967A (ja) | ベクトル処理装置 |