JPH0556543B2 - - Google Patents

Info

Publication number
JPH0556543B2
JPH0556543B2 JP60212821A JP21282185A JPH0556543B2 JP H0556543 B2 JPH0556543 B2 JP H0556543B2 JP 60212821 A JP60212821 A JP 60212821A JP 21282185 A JP21282185 A JP 21282185A JP H0556543 B2 JPH0556543 B2 JP H0556543B2
Authority
JP
Japan
Prior art keywords
memory
address
block
data
cache memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP60212821A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6272041A (ja
Inventor
Izuyuki Uehara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60212821A priority Critical patent/JPS6272041A/ja
Publication of JPS6272041A publication Critical patent/JPS6272041A/ja
Publication of JPH0556543B2 publication Critical patent/JPH0556543B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP60212821A 1985-09-25 1985-09-25 キヤツシユメモリ制御装置 Granted JPS6272041A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60212821A JPS6272041A (ja) 1985-09-25 1985-09-25 キヤツシユメモリ制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60212821A JPS6272041A (ja) 1985-09-25 1985-09-25 キヤツシユメモリ制御装置

Publications (2)

Publication Number Publication Date
JPS6272041A JPS6272041A (ja) 1987-04-02
JPH0556543B2 true JPH0556543B2 (en:Method) 1993-08-19

Family

ID=16628911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60212821A Granted JPS6272041A (ja) 1985-09-25 1985-09-25 キヤツシユメモリ制御装置

Country Status (1)

Country Link
JP (1) JPS6272041A (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0775611A2 (en) 1993-12-22 1997-05-28 Nihon Plast Co., Ltd. Reel device for cable

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6479843A (en) * 1987-09-22 1989-03-24 Nec Corp Information processor
JP3614428B2 (ja) * 1992-02-28 2005-01-26 沖電気工業株式会社 キャッシュメモリ装置
WO2001037098A1 (fr) * 1999-11-16 2001-05-25 Hitachi, Ltd Dispositif et systeme informatique
JP5583893B2 (ja) * 2008-05-28 2014-09-03 富士通株式会社 演算処理装置及び演算処理装置の制御方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177782A (ja) * 1983-03-25 1984-10-08 Nec Corp バツフアメモリ制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0775611A2 (en) 1993-12-22 1997-05-28 Nihon Plast Co., Ltd. Reel device for cable

Also Published As

Publication number Publication date
JPS6272041A (ja) 1987-04-02

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees