JPH0555922A - A/d converter circuit - Google Patents

Abstract

PURPOSE:To realize the control of an input output characteristic of the A/D converter through the use of an addition and subtraction amplifier and a sample- and-hold circuit. CONSTITUTION:An output 6 of a D/A converter is connected to an input of a sample-and-hold circuit 2 and an addition and subtraction amplifier 3 and the other input of the addition and subtraction amplifier 3 is connected to the input of a comparator 5 and the other input of the comparator 5 is connected to one of outputs of the sample-and-hold circuit 2. In order to control the input output characteristic, a voltage equivalent to 1/2 LSB is held in the sample-and- hold circuit 2 and calculated with a reference voltage with the addition and subtraction amplifier 3 and the result is inputted to the comparator 5. Thus, the input output characteristic of the A/D converter is easily controlled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a successive approximation type AD.
Regarding the converter circuit.

[0002]

2. Description of the Related Art An example of a conventional AD converter is shown in FIG. The digital signal sent from the control circuit 4 to the DA converter 1 is converted into an analog signal. At that time, by inputting an analog signal smaller than the analog signal converted from the digital signal by 1/2 LSB from the output of the DA converter 1 to the comparator 5, the input / output characteristics of the comparator 5 and the AD converter are reduced to 1/2.
It was controlled so that it would shift only by the LSB. 1 LS here
B corresponds to the voltage of the least significant bit of the output of the AD converter.

[0003]

However, in the conventional AD converter, it is necessary to shift the output of the DA converter 1 by 1/2 LSB in order to make the shift of 1/2 LSB in the input / output characteristics. There is a problem that it is difficult to control the input / output characteristics of the converter so that the converter is shifted by 1/2 LSB.

Therefore, an object of the present invention is to control the input / output characteristics by using a sample hold circuit and an addition / subtraction amplifier in order to solve such a conventional problem.

[0005]

In order to solve the above-mentioned problems, the present invention is based on the output voltage of the DA converter, which has the input / output characteristics shifted by 1/2 LSB of the AD converter.
The sample hold circuit 2 and the adder / subtractor amplifier are used.

[0006]

In the AD converter configured as described above, 1 is input to the least significant bit and 0 is input to the other bits as the input of the DA converter 1 before the AD conversion is started.
A voltage corresponding to 1/2 LSB is output from the output terminal of the converter 1 and held in the sample hold circuit. At that time, at the same time, the analog input voltage Vin is also held in the sample hold circuit. Next, the reference voltage output from the DA converter 1 is input to the comparator 5 via the addition / subtraction amplifier. Each time one comparison ends, the reference voltage changes, but the sum of the input voltage captured in the sample hold circuit and the voltage corresponding to 1/2 LSB is compared with the reference voltage each time, and the output of the comparator 5 is can get.
In this way, when the DA converter 1 outputs a voltage equivalent to 1/2 LSB and the sample-hold circuit and the addition / subtraction amplifier are used to add a voltage equivalent to 1/2 LSB to the analog input voltage, the input / output characteristic of the AD converter is obtained. Can be shifted by 1/2 LSB.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an AD converter circuit according to the present invention. At the first clock timing, a voltage of 1/2 LSB is sent from the output terminal 6 of the DA converter to the input of the sample hold circuit 2 and held therein. At the same time, the analog input voltage Vin is also taken in and held in the sample hold circuit. Control circuit 4
The output of is connected to the input of DA converter 1, and 2
N-bit digital data is sent at the second clock. The N-bit digital data is converted into an analog voltage by the DA converter 1, is input to the adder / subtractor amplifier 3 from the output terminal 6 of the DA converter, and is subtracted by the voltage of 1/2 LSB held by the sample hold circuit 2. , Is input to one of the plurality of input terminals of the comparator 5. At this time, the analog input voltage Vin held by the sample hold circuit 2 is also input to another one of the plurality of input terminals of the comparator 5. And the comparator 5
The result of the comparison of the plurality of inputs is obtained from the output of the comparator 5, and the digital data corresponding to the most significant bit is determined. The output of the comparator 5 is the control circuit 4
, And determines the digital signal to be sent to the DA converter 1 at the next clock timing according to the output signal of the comparator 5. Thereafter, by repeating the procedure at the second clock timing N times, an N-bit digital output obtained by AD converting the analog input signal is obtained.

[0008]

As described above, according to the present invention, in the AD converter circuit, the output from the DA converter is reduced to 1/2.
Since the voltage equivalent to LSB is output and the same effect as adding 1 / 2LSB to the input voltage is used by using the adder / subtractor amplifier and the sample hold circuit, the input / output characteristics of the AD converter are shifted by 1 / 2LSB. The effect is that it can be easily done.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an AD converter circuit of the present invention.

FIG. 2 is a configuration diagram of a conventional AD converter circuit.

[Explanation of symbols] 1 DA converter 2 Sample and hold circuit 3 Addition / subtraction amplifier 4 Control circuit 5 Comparator 6 DA converter output terminal

Claims (1)

[Claims] 1. A comparator, a sample hold circuit connected to one input terminal of the comparator, an adder / subtractor amplifier connected to the other input terminal of the comparator, and an output to the sample hold circuit and the adder / subtractor amplifier. A DA converter that connects the terminals and outputs a voltage for input / output characteristic adjustment and a reference voltage from the output terminal to the sample hold circuit and the addition / subtraction amplifier, respectively, and a DA converter that receives the output of the comparator. An AD converter circuit characterized by comprising a control circuit for controlling output and controlling input / output characteristics.