JPH0555219A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0555219A
JPH0555219A JP21252691A JP21252691A JPH0555219A JP H0555219 A JPH0555219 A JP H0555219A JP 21252691 A JP21252691 A JP 21252691A JP 21252691 A JP21252691 A JP 21252691A JP H0555219 A JPH0555219 A JP H0555219A
Authority
JP
Japan
Prior art keywords
film
metal film
semiconductor device
metal
alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21252691A
Other languages
Japanese (ja)
Other versions
JP3119505B2 (en
Inventor
Kazumi Sugai
和己 菅井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP03212526A priority Critical patent/JP3119505B2/en
Publication of JPH0555219A publication Critical patent/JPH0555219A/en
Application granted granted Critical
Publication of JP3119505B2 publication Critical patent/JP3119505B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the deterioration of reliability and yield due to a metallic film having inferior stepped-section coating properties and a roughened surface shape having irregularities. CONSTITUTION:A semiconductor device has a first metallic film 3, film thickness of which from the sidewall of a connecting hole is kept approximately constant in the connecting hole and formed in approximately the radius of the connecting hole, and a second metallic film 4 having approximately fixed film thickness on the first metallic film on a substrate 1 having the connecting hole bored to an insulating film in a surface layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、微細接続孔を埋め込む
金属膜を有する半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a metal film filling a fine connection hole.

【0002】[0002]

【従来の技術】従来、この種の半導体装置としては、段
差被覆性の悪い一層の金属膜のみを有する半導体装置
(船木洋一 ニッケルマイクロデバイシィズ NIKK
EI MICRODEVICES、85頁 12月号
1986)、絶縁膜上での膜厚が不均一な金属膜のみを
有する半導体装置(エクステンデッド アブストラクツ
オブ ジ エイティーンス カンファレンス オン ソ
リッド ステート デバイシィズ アンド マテリアル
ズ Extended Abstracts of t
he 18th(1986 Internationa
l)Conference on Solid Sta
te Devices andMaterials,T
okyo,1986,pp.495−498)などがあ
る。
2. Description of the Related Art Conventionally, as a semiconductor device of this type, a semiconductor device having only one metal film with poor step coverage (Yoichi Funaki, Nickel Micro Devices NIKK)
EI MICRODEVICES, page 85, December issue
1986), a semiconductor device having only a metal film having a non-uniform film thickness on an insulating film (Extended Abstracts of Eighteenth Conference on Solid State Devices and Materials Extended Abstracts of
he 18th (1986 Internationala
l) Conference on Solid Sta
te Devices and Materials, T
tokyo, 1986, pp. 495-498).

【0003】[0003]

【発明が解決しようとする課題】上述した従来の段差被
覆性の悪い一層の金属膜のみを有する半導体装置は、金
属膜が配線に利用される場合には段差被覆性の低い部分
で断線を起こすため、信頼性が低いという欠点がある。
また、段差部での電流密度が上昇するのでエレクトロマ
イグレーション耐性が低いという欠点がある。絶縁膜上
での膜厚が不均一な金属膜のみを有する半導体装置は、
その金属膜の凹凸の多い荒れた表面形状が原因で、後に
続くリソグラフィ工程で入射光を乱反射させレジストの
解像度を劣化させるため、歩留まりを低下させるという
欠点がある。
In the conventional semiconductor device having only one metal film having poor step coverage as described above, when the metal film is used for wiring, disconnection occurs at a portion having low step coverage. Therefore, it has a drawback of low reliability.
In addition, the current density in the step portion increases, so that the electromigration resistance is low. A semiconductor device having only a metal film whose thickness on the insulating film is not uniform is
Due to the rough surface shape of the metal film having many irregularities, incident light is diffusely reflected in the subsequent lithography process and the resolution of the resist is deteriorated, so that the yield is lowered.

【0004】[0004]

【課題を解決するための手段】本発明の半導体装置は、
絶縁膜に開口した接続孔を表層に有する基板において、
前記接続孔側壁からの膜厚が接続孔内でほぼ一定で接続
孔の半径程度である第1の金属膜と、第1の金属膜上に
ほぼ一定の膜厚を有する第2の金属膜を有することを特
徴とする。また、第2の金属膜が合金、例えばアルミニ
ウム合金で、第1の金属膜がアルミニウム膜あるいは、
第2の金属膜中の元素が拡散した合金膜であることを特
徴とする。
The semiconductor device of the present invention comprises:
In a substrate having a connection hole opened in the insulating film on the surface layer,
A first metal film having a film thickness from the side wall of the connection hole that is substantially constant within the connection hole and is about the radius of the connection hole, and a second metal film having a substantially constant film thickness on the first metal film. It is characterized by having. Also, the second metal film is an alloy, for example, an aluminum alloy, and the first metal film is an aluminum film, or
It is an alloy film in which the elements in the second metal film are diffused.

【0005】[0005]

【作用】気相化学成長で絶縁膜上に堆積させた金属膜
は、膜厚が薄い場合には表面形状が滑らかで、膜厚が増
すにしたがって凹凸の多い荒れた表面形状になること
が、Al、Cu,W等で知られている。膜厚が薄くて
も、気相化学成長で形成した膜の段差被覆性はよい。一
方、スパッタリングで形成した膜は段差被覆性が悪いも
のの、表面形状が滑らかである。これらの特徴を組み合
わせて活かし、まず絶縁膜に開口した例えば直径0.5
μm以下の微小接続孔をほぼ完全に埋め込める程度の
0.25μm厚の薄く平坦性の比較的良好な金属膜を気
相化学成長で形成した後、スパッタリングによって所望
の膜厚までさらに金属膜を堆積させることで、段差被覆
性、平坦性共に優れた金属膜を形成できることを新たに
見いだした。
[Function] The metal film deposited on the insulating film by vapor phase chemical growth has a smooth surface shape when the film thickness is thin, and as the film thickness increases, the surface shape becomes rough with many irregularities. Known as Al, Cu, W and the like. Even if the film thickness is thin, the step coverage of the film formed by vapor phase chemical growth is good. On the other hand, although the film formed by sputtering has poor step coverage, the surface shape is smooth. Taking advantage of these features in combination, first open the insulating film, for example with a diameter of 0.5.
After forming a thin metal film having a thickness of 0.25 μm and relatively good flatness by vapor phase chemical growth so as to almost completely fill a microscopic connection hole of μm or less, further metal film is formed to a desired film thickness by sputtering. It has been newly found that the deposition can form a metal film having excellent step coverage and flatness.

【0006】また、所望の合金膜を気相化学成長で形成
することは、異種の原料の分解温度は一般に異なること
や、原料によっては互いに反応するため困難である。こ
れに対し、第1の金属を気相化学成長で堆積させた後、
前記金属と異なる第2の金属あるいは合金膜をスパッタ
リングで堆積させ、続いて焼鈍すれば、焼鈍の温度で決
まる量だけ第1の金属膜中にも第2の金属あるいは合金
が拡散し、形成した金属薄膜全体が容易に合金化するこ
とを新たに見いだした。
Further, it is difficult to form a desired alloy film by vapor phase chemical growth, because the decomposition temperatures of different kinds of raw materials are generally different and some raw materials react with each other. On the other hand, after depositing the first metal by chemical vapor deposition,
When a second metal or alloy film different from the above metal is deposited by sputtering and subsequently annealed, the second metal or alloy is diffused and formed in the first metal film by an amount determined by the annealing temperature. It has been newly found that the entire metal thin film is easily alloyed.

【0007】[0007]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0008】図1は、本発明の一実施例における主要工
程によって形成された基板の断面図である。本実施例
は、シリコン集積回路におけるアルミニウム膜を有する
半導体装置に適用した場合を例示する。
FIG. 1 is a sectional view of a substrate formed by the main steps in one embodiment of the present invention. This embodiment illustrates a case where the present invention is applied to a semiconductor device having an aluminum film in a silicon integrated circuit.

【0009】標準的な集積回路製作方法を用いて、図1
(a)に示したアルミニウム膜を形成する前の構造を形
成する。図において、1はシリコン基板、2は酸化シリ
コン膜である。基板には金属膜の気相化学成長を行う前
に、基板にTiが0.1モル%溶解した弗酸溶液に浸し
た後、乾燥させるという前処理を施しておく。次に図1
(b)に示すように、有機アルミニウム材料を用いた気
相化学成長で、基板表層の酸化シリコン膜2に開口した
接続孔の半径以上の膜厚まで第1の金属膜3を堆積させ
る。堆積は、アルミニウム膜の原料にジメチルアルミニ
ウムハイドライドを用い、キャリア水素流量60scc
m、成長室圧力3Torr、基板温度250℃で気相化
学成長によって行う。堆積したアルミ膜の膜厚が0.2
5μm以下では、酸化シリコン膜2上でのアルミ膜は平
坦性が充分に高い。また、酸化シリコン膜2に開口した
接続孔はほぼ完全に平坦に埋め込まれる。次に図1
(c)に示すように、第1の金属膜3の上にスパッタリ
ングによって第2の金属膜4を堆積させる。金属膜4の
膜厚が0.3μm程度でも、堆積した膜の表面形状は滑
らかで十分に平坦性は高い。なお、第1の金属膜形成後
から第2の金属膜形成前の間に大気や酸素に基板をさら
して、第1の金属膜の表面に酸化膜が形成された場合に
は第2の金属膜形成前に逆スパッタリングなどによって
酸化膜を除去し、第1の金属膜3と第2の金属膜4が導
電するようにしておく必要がある。
Using standard integrated circuit fabrication methods, FIG.
The structure before forming the aluminum film shown in (a) is formed. In the figure, 1 is a silicon substrate and 2 is a silicon oxide film. Before the vapor phase chemical growth of the metal film, the substrate is pretreated by immersing the substrate in a hydrofluoric acid solution in which 0.1 mol% of Ti is dissolved and then drying the substrate. Next in FIG.
As shown in (b), the first metal film 3 is deposited by vapor phase chemical growth using an organic aluminum material to a film thickness equal to or larger than the radius of the connection hole opened in the silicon oxide film 2 on the substrate surface. Deposition was carried out by using dimethylaluminum hydride as a raw material for the aluminum film, and the carrier hydrogen flow rate was 60 scc.
m, growth chamber pressure 3 Torr, substrate temperature 250 ° C., and vapor phase chemical growth. The thickness of the deposited aluminum film is 0.2
When the thickness is 5 μm or less, the flatness of the aluminum film on the silicon oxide film 2 is sufficiently high. Further, the connection hole opened in the silicon oxide film 2 is almost completely filled in flat. Next in FIG.
As shown in (c), the second metal film 4 is deposited on the first metal film 3 by sputtering. Even when the film thickness of the metal film 4 is about 0.3 μm, the surface shape of the deposited film is smooth and the flatness is sufficiently high. When the substrate is exposed to the atmosphere or oxygen after the first metal film is formed and before the second metal film is formed and an oxide film is formed on the surface of the first metal film, the second metal film is formed. Before forming the film, it is necessary to remove the oxide film by reverse sputtering or the like so that the first metal film 3 and the second metal film 4 become conductive.

【0010】アルミの気相化学成長用原料として、トリ
イソブチルアルミニウム、ジェチルアルミニウムハイド
ライド、トリメチルアミンアラン、トリエチルアミンア
ランなどを用いても同様な薄膜が形成できることは言う
までもない。
Needless to say, a similar thin film can be formed by using triisobutylaluminum, acetyl aluminum hydride, trimethylamine alane, triethylamine alane or the like as a raw material for vapor phase chemical growth of aluminum.

【0011】また、スパッタリングで形成する薄膜にA
l−Si合金、Al−Cu合金、Al−Si−Cu合金
等を用いてもかまわない。この場合には、スパッタリン
グ後の熱処理によって合金中のSi,Cu等が気相成長
法によって形成された第1のアルミニウム膜3中に拡散
し、アルミ配線のエレクトロマイグレーションやストレ
スマイグレーションの耐性を向上させる効果も合わせ持
つ。
A thin film formed by sputtering is
An l-Si alloy, an Al-Cu alloy, an Al-Si-Cu alloy or the like may be used. In this case, the heat treatment after sputtering causes Si, Cu, etc. in the alloy to diffuse into the first aluminum film 3 formed by the vapor phase growth method to improve the resistance of the aluminum wiring to electromigration and stress migration. It also has an effect.

【0012】絶縁膜として、ボロンドープドガラス、リ
ンドープドガラス、窒化シリコン膜などを用いても同様
の効果が得られる。
The same effect can be obtained by using boron-doped glass, phosphorus-doped glass, silicon nitride film or the like as the insulating film.

【0013】気相成長で堆積させる金属としては、WF
6 、W(CO)6 を用いることによって堆積が可能なW
や、Cu,Au等でもよい。また、蒸着あるいはスパッ
タリングで堆積させる金属、合金はW,Cu等の他にT
iN,TiW等のバリアメタルでも同様の効果が得られ
ることは言うまでもない。
As a metal to be deposited by vapor phase growth, WF
6 , W that can be deposited by using W (CO) 6
Alternatively, Cu, Au or the like may be used. The metals and alloys deposited by vapor deposition or sputtering include T, in addition to W, Cu, etc.
It goes without saying that the same effect can be obtained with barrier metals such as iN and TiW.

【0014】[0014]

【発明の効果】以上説明したように、本発明の半導体装
置は段差被覆性が良く、平坦な表面形状の金属膜を有す
るので、信頼性や歩留まりが大幅に向上するという効果
がある。それに加え、合金膜を形成した場合にはマイグ
レーション耐性が高く、信頼性が向上するという効果が
ある。
As described above, since the semiconductor device of the present invention has good step coverage and has a metal film having a flat surface shape, there is an effect that reliability and yield are significantly improved. In addition, when an alloy film is formed, it has high migration resistance and an effect of improving reliability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の主要工程を示す断面図であ
る。
FIG. 1 is a cross-sectional view showing the main steps of one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 酸化シリコン膜 3 第1の金属膜 4 第2の金属膜 1 Silicon Substrate 2 Silicon Oxide Film 3 First Metal Film 4 Second Metal Film

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 絶縁膜に開口した接続孔を表層に有する
基板において、前記接続孔側壁からの膜厚が接続孔内で
ほぼ一定で接続孔の半径程度である第1の金属膜と、第
1の金属膜上にほぼ一定の膜厚を有する第2の金属膜を
有することを特徴とする半導体装置。
1. In a substrate having a contact hole opened in an insulating film in a surface layer, a first metal film whose film thickness from the sidewall of the contact hole is substantially constant within the contact hole and about the radius of the contact hole; A semiconductor device having a second metal film having a substantially constant film thickness on the first metal film.
【請求項2】 請求項1記載の半導体装置において、第
2の金属膜が合金であることを特徴とする半導体装置。
2. The semiconductor device according to claim 1, wherein the second metal film is an alloy.
【請求項3】 請求項1記載の半導体装置において、第
1の金属膜がアルミニウム膜であることを特徴とする半
導体装置。
3. The semiconductor device according to claim 1, wherein the first metal film is an aluminum film.
【請求項4】 請求項1記載の半導体装置において、第
2の金属膜がアルミニウム合金膜であることを特徴とす
る半導体装置。
4. The semiconductor device according to claim 1, wherein the second metal film is an aluminum alloy film.
【請求項5】 請求項4記載の半導体装置において、第
1の金属膜が、第2の金属膜中の元素が拡散した合金膜
であることを特徴とする半導体装置。
5. The semiconductor device according to claim 4, wherein the first metal film is an alloy film in which an element in the second metal film is diffused.
JP03212526A 1991-08-26 1991-08-26 Semiconductor device Expired - Fee Related JP3119505B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP03212526A JP3119505B2 (en) 1991-08-26 1991-08-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03212526A JP3119505B2 (en) 1991-08-26 1991-08-26 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0555219A true JPH0555219A (en) 1993-03-05
JP3119505B2 JP3119505B2 (en) 2000-12-25

Family

ID=16624135

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03212526A Expired - Fee Related JP3119505B2 (en) 1991-08-26 1991-08-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3119505B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004556A (en) * 2007-06-21 2009-01-08 Fuji Electric Holdings Co Ltd Semiconductor device and method of forming metal thin film

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57183052A (en) * 1981-05-06 1982-11-11 Seiko Epson Corp Semiconductor
JPH0290610A (en) * 1988-09-28 1990-03-30 Nec Corp Manufacture of semiconductor integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57183052A (en) * 1981-05-06 1982-11-11 Seiko Epson Corp Semiconductor
JPH0290610A (en) * 1988-09-28 1990-03-30 Nec Corp Manufacture of semiconductor integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004556A (en) * 2007-06-21 2009-01-08 Fuji Electric Holdings Co Ltd Semiconductor device and method of forming metal thin film

Also Published As

Publication number Publication date
JP3119505B2 (en) 2000-12-25

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