JPH05508495A - 多重プロセッサ用大域レジスタ - Google Patents

多重プロセッサ用大域レジスタ

Info

Publication number
JPH05508495A
JPH05508495A JP3514236A JP51423691A JPH05508495A JP H05508495 A JPH05508495 A JP H05508495A JP 3514236 A JP3514236 A JP 3514236A JP 51423691 A JP51423691 A JP 51423691A JP H05508495 A JPH05508495 A JP H05508495A
Authority
JP
Japan
Prior art keywords
global
register
registers
data
multiprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3514236A
Other languages
English (en)
Japanese (ja)
Inventor
ビアード，ダグラス　アール．
スピックス，ジョージ　エイ．
ミラー，エドワード　シー．
ストラウト，ロバート　イー．，ザ、サード
スクーラー，アンソニ　アール．
シルベイ，アレクサンダー　エイ．
バンダーウォーン，ブランドン　ディー．
ウイルソン，ジミー　アール．
ヘッセル，リチャード　イー．
フェルプス，アンドルー　イー．
Original Assignee
クレイ、リサーチ、インコーポレーテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by クレイ、リサーチ、インコーポレーテッド filed Critical クレイ、リサーチ、インコーポレーテッド
Publication of JPH05508495A publication Critical patent/JPH05508495A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G06F15/17368—Indirect interconnection networks non hierarchical topologies
    • G06F15/17375—One dimensional, e.g. linear array, ring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G06F15/17368—Indirect interconnection networks non hierarchical topologies
    • G06F15/17381—Two dimensional, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8092—Array of vector units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/43—Checking; Contextual analysis
    • G06F8/433—Dependency analysis; Data or control flow analysis
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
JP3514236A 1990-06-11 1991-06-10 多重プロセッサ用大域レジスタ Pending JPH05508495A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/536,198 US5165038A (en) 1989-12-29 1990-06-11 Global registers for a multiprocessor system
US536,198 1990-06-11

Publications (1)

Publication Number Publication Date
JPH05508495A true JPH05508495A (ja) 1993-11-25

Family

ID=24137555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3514236A Pending JPH05508495A (ja) 1990-06-11 1991-06-10 多重プロセッサ用大域レジスタ

Country Status (5)

Country Link
US (1) US5165038A (enExample)
JP (1) JPH05508495A (enExample)
AU (1) AU8424491A (enExample)
TW (1) TW197502B (enExample)
WO (1) WO1991020043A1 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5434970A (en) * 1991-02-14 1995-07-18 Cray Research, Inc. System for distributed multiprocessor communication
US5287461A (en) * 1991-10-31 1994-02-15 Sun Microsystems, Inc. Method and apparatus for remotely accessing a plurality of server consoles
JPH05282143A (ja) * 1992-03-30 1993-10-29 Nec Ibaraki Ltd 主記憶アクセス制御回路
US5428803A (en) * 1992-07-10 1995-06-27 Cray Research, Inc. Method and apparatus for a unified parallel processing architecture
US5435001A (en) * 1993-07-06 1995-07-18 Tandem Computers Incorporated Method of state determination in lock-stepped processors
US6073231A (en) * 1993-10-18 2000-06-06 Via-Cyrix, Inc. Pipelined processor with microcontrol of register translation hardware
EP0665503A3 (en) * 1994-01-28 1996-01-17 Nec Corp High speed synchronization communication control mechanism for a multiprocessor system.
SG75756A1 (en) * 1994-02-28 2000-10-24 Intel Corp Method and apparatus for avoiding writeback conflicts between execution units sharing a common writeback path
JP3169779B2 (ja) * 1994-12-19 2001-05-28 日本電気株式会社 マルチスレッドプロセッサ
US5555543A (en) * 1995-01-03 1996-09-10 International Business Machines Corporation Crossbar switch apparatus and protocol
JP2766216B2 (ja) * 1995-05-08 1998-06-18 甲府日本電気株式会社 情報処理装置
JP2731761B2 (ja) * 1995-08-29 1998-03-25 甲府日本電気株式会社 ネットワーク制御装置
US6298479B1 (en) * 1998-05-29 2001-10-02 Sun Microsystems, Inc. Method and system for compiling and linking source files
US6351848B1 (en) * 1998-05-29 2002-02-26 Sun Microsystems, Inc. Unitary data structure systems, methods, and computer program products, for global conflict determination
US20040030873A1 (en) * 1998-10-22 2004-02-12 Kyoung Park Single chip multiprocessing microprocessor having synchronization register file
JP3721283B2 (ja) * 1999-06-03 2005-11-30 株式会社日立製作所 主記憶共有型マルチプロセッサシステム
US20040128475A1 (en) * 2002-12-31 2004-07-01 Gad Sheaffer Widely accessible processor register file and method for use
US20040268143A1 (en) * 2003-06-30 2004-12-30 Poisner David I. Trusted input for mobile platform transactions
US7246218B2 (en) * 2004-11-01 2007-07-17 Via Technologies, Inc. Systems for increasing register addressing space in instruction-width limited processors
KR100806274B1 (ko) * 2005-12-06 2008-02-22 한국전자통신연구원 멀티 쓰레디드 프로세서 기반의 병렬 시스템을 위한 적응형실행 방법
KR100663709B1 (ko) * 2005-12-28 2007-01-03 삼성전자주식회사 재구성 아키텍처에서의 예외 처리 방법 및 장치
US10423415B2 (en) 2017-04-01 2019-09-24 Intel Corporation Hierarchical general register file (GRF) for execution block
US20240370242A1 (en) * 2023-05-01 2024-11-07 Mellanox Technologies, Ltd. Register allocation optimization using per-register bin packing

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3308436A (en) * 1963-08-05 1967-03-07 Westinghouse Electric Corp Parallel computer system control
US3970993A (en) * 1974-01-02 1976-07-20 Hughes Aircraft Company Cooperative-word linear array parallel processor
US4015243A (en) * 1975-06-02 1977-03-29 Kurpanek Horst G Multi-processing computer system
US4240143A (en) * 1978-12-22 1980-12-16 Burroughs Corporation Hierarchical multi-processor network for memory sharing
US4523273A (en) * 1982-12-23 1985-06-11 Purdue Research Foundation Extra stage cube
US4814980A (en) * 1986-04-01 1989-03-21 California Institute Of Technology Concurrent hypercube system with improved message passing
US4924380A (en) * 1988-06-20 1990-05-08 Modular Computer Systems, Inc. (Florida Corporation) Dual rotating priority arbitration method for a multiprocessor memory bus

Also Published As

Publication number Publication date
US5165038A (en) 1992-11-17
AU8424491A (en) 1992-01-07
TW197502B (enExample) 1993-01-01
WO1991020043A1 (en) 1991-12-26

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