JPH0549152B2 - - Google Patents

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Publication number
JPH0549152B2
JPH0549152B2 JP9011282A JP1128290A JPH0549152B2 JP H0549152 B2 JPH0549152 B2 JP H0549152B2 JP 9011282 A JP9011282 A JP 9011282A JP 1128290 A JP1128290 A JP 1128290A JP H0549152 B2 JPH0549152 B2 JP H0549152B2
Authority
JP
Japan
Prior art keywords
charge
source region
diode
semiconductor substrate
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP9011282A
Other languages
Japanese (ja)
Other versions
JPH03171883A (en
Inventor
Yutaka Myata
Takao Chikamura
Takuo Shibata
Shinji Fujiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP485980A external-priority patent/JPS56102169A/en
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2011282A priority Critical patent/JPH03171883A/en
Publication of JPH03171883A publication Critical patent/JPH03171883A/en
Publication of JPH0549152B2 publication Critical patent/JPH0549152B2/ja
Granted legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Description

【発明の詳細な説明】 本発明は、固体撮像装置に関するもので、半導
体基板上に、電荷走査機能を有する回路素子と入
射光により生じる信号電荷を蓄積するソース領域
を形成した固体撮像素子において、上記ソース領
域中の余分な過剰電荷のみを半導体基板側に確実
に流出させ、走査回路部における電荷のオーバー
フローや残像のない固体撮像装置を提供するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device, in which a circuit element having a charge scanning function and a source region for accumulating signal charges generated by incident light are formed on a semiconductor substrate. It is an object of the present invention to provide a solid-state imaging device in which only the excess charge in the source region is reliably discharged to the semiconductor substrate side, and there is no charge overflow or afterimage in the scanning circuit section.

従来、電荷走査機能を有する固体撮像板には種
種のものがあるが、特に雑音の少ない電荷転送機
能を有するものとしては、CCDまたはBBD等の
自己走査機能をもつ回路素子が提案されている
(特開昭61−95721号参照)。
Conventionally, there are various types of solid-state imaging boards with a charge scanning function, but circuit elements with a self-scanning function such as CCDs or BBDs have been proposed as ones with a charge transfer function with particularly low noise ( (See Japanese Patent Application Laid-Open No. 61-95721).

しかしながら、上記のような構成において、 CCD又はBBDで構成される電荷転送段の取扱
い電荷量が、入射光により生成されソース領域に
蓄積される電荷量より少ない場合、強い入射光に
より生成された過剰電荷は走査回路部でオーバー
フローが生じたり光電変換部に印加される電圧が
制限をうけ、焼きつけやフリツカ等が生じてい
た。
However, in the above configuration, if the amount of charge handled by the charge transfer stage consisting of a CCD or BBD is smaller than the amount of charge generated by the incident light and accumulated in the source region, the excess charge generated by the strong incident light Charge overflow occurred in the scanning circuit section, and the voltage applied to the photoelectric conversion section was limited, causing burn-in and flickering.

本発明は、半導体基板に信号電荷を蓄積するソ
ース領域を設け、基板とソース領域でダイオード
を形成し、このダイオードに電荷転送機能を有す
る回路素子の取扱い電荷量よりも多い信号電荷が
生成したとき、ソース領域の電荷の回路素子への
読み込みを防止しつつダイオードを順バイアス状
態とし、光電変換部で生じる余分な過剰電荷をソ
ース領域下の半導体基板に流出させることによ
り、オーバーフローによる不要信号の転送部への
もれによる疑似信号の発生ならびに残像等の生じ
ない固体撮像装置に提供するものである。
The present invention provides a source region for accumulating signal charges on a semiconductor substrate, forms a diode with the substrate and the source region, and when a signal charge larger than the amount of charge handled by a circuit element having a charge transfer function is generated in this diode, , by putting the diode in a forward bias state while preventing the charge in the source region from being read into the circuit elements, the excess charge generated in the photoelectric conversion section flows out to the semiconductor substrate under the source region, thereby reducing the transfer of unnecessary signals due to overflow. The object of the present invention is to provide a solid-state imaging device that does not generate false signals due to leakage to other parts, and does not cause afterimages.

以下図面に従つて発明の一実施例にかかる固体
撮像装置を説明する。走査回路としては雑音の少
ない電荷転送型で説明する。電荷転送型としての
CCD又はBBDは、電荷の蓄積が空乏層か、不純
物領域かの差はあるが、動作は本質的に同一であ
る。従つて今後BBDにて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A solid-state imaging device according to an embodiment of the invention will be described below with reference to the drawings. The scanning circuit will be explained using a charge transfer type which has less noise. As a charge transfer type
Although there is a difference in whether charge is stored in a depletion layer or an impurity region, CCDs and BBDs operate essentially the same. Therefore, this will be explained in the future on BBD.

第1図は、Si基板上に形成したBBDとその転
送段をドレインとしゲート電極とソース領域を設
けこれらの領域上に光導電体と電極を形成した固
体撮像装置の一単位を示したものである。
Figure 1 shows a unit of a solid-state imaging device in which a BBD formed on a Si substrate, a transfer stage thereof as a drain, a gate electrode and a source region, and a photoconductor and electrodes formed on these regions. be.

p型半導体基板10にソース領域となるn+
領域11を形成しダイオードを設ける。12は
n+型領域で電位の井戸であり、電荷転送回路素
子となる。13はゲート電極であり、n+型領域
11と重なり部分を有している。14は、半導体
基板10とゲート電極13との間の絶縁体膜で、
ゲート酸化膜である。15は、第一電極16と半
導体基板10およびゲート電極13とを電気的に
分離するための絶縁体層である。16は第一電極
で、n+型領域11と電気的に接続したダイオー
ドの電極であるとともに正孔阻止層17の電極と
もなつている。18は、(Zn1-xCdxTe)1-y
(In2Te3y(ただしO<x<1、O<y<0.3)よ
りなる光導電体であり、その上に透明電極(第二
電極)19が形成されており、透明電極19側よ
り入射光20が照射される。
An n + type region 11 serving as a source region is formed in a p-type semiconductor substrate 10, and a diode is provided. 12 is
It is a potential well in the n + type region and becomes a charge transfer circuit element. Reference numeral 13 denotes a gate electrode, which has a portion overlapping with the n + type region 11. 14 is an insulating film between the semiconductor substrate 10 and the gate electrode 13;
This is the gate oxide film. 15 is an insulating layer for electrically separating the first electrode 16 from the semiconductor substrate 10 and the gate electrode 13. A first electrode 16 is an electrode of a diode electrically connected to the n + type region 11 and also serves as an electrode of the hole blocking layer 17 . 18 is (Zn 1-x Cd x Te) 1-y
(In 2 Te 3 ) y (O < x < 1, O < y < 0.3). A transparent electrode (second electrode) 19 is formed on the photoconductor, and the transparent electrode 19 side The incident light 20 is irradiated.

まず本発明を用いない場合の光情報読み込み動
作について説明する。
First, the optical information reading operation when the present invention is not used will be explained.

上記第1図の構成において、第2図aに示すよ
うな駆動パルスをゲート電極13に印加する。時
間tTにおいて電極16は、第2図bに示した如く
(VCH−VT)に設定される。ここでVTは、n+領域
11,12およびゲート電極13より構成される
MOS型電界効果型トランジスタ(FET)のしき
い値電圧である。今入射光21があると光導電体
18において電子・正孔対が生成し、それぞれ電
極16,19に到達してソース領域10に信号電
荷が蓄積された電極16の電位が低下する。さら
に時間t2においてゲート電極13にVCHを印加す
るとn+領域11からn+領域12に信号電荷の移
送が行なわれる。その結果n+領域11の電位は
再び上昇し(VCH−VT)となる。n+領域12に移
送された信号電荷は、その後第2図aに示した転
送パルスVOにより出力部へ転送される。
In the configuration shown in FIG. 1, a drive pulse as shown in FIG. 2a is applied to the gate electrode 13. At time t T , electrode 16 is set at (V CH -V T ) as shown in FIG. 2b. Here, V T is composed of n + regions 11 and 12 and gate electrode 13.
This is the threshold voltage of a MOS field effect transistor (FET). If there is now incident light 21, electron-hole pairs are generated in the photoconductor 18, which reach the electrodes 16 and 19, respectively, and the potential of the electrode 16 where signal charges are accumulated in the source region 10 decreases. Furthermore, when V CH is applied to gate electrode 13 at time t 2 , signal charges are transferred from n + region 11 to n + region 12 . As a result, the potential of n + region 11 rises again to (V CH -V T ). The signal charge transferred to the n + region 12 is then transferred to the output section by the transfer pulse V O shown in FIG. 2a.

以上が本発明を用いない場合の光情報読み込み
動作であり、光導電体に印加される電圧は、第二
電極19を接地電位に保つた場合(VCH−VT)と
なる。
The above is the optical information reading operation when the present invention is not used, and the voltage applied to the photoconductor is when the second electrode 19 is kept at the ground potential (V CH -V T ).

しかしながら、転送回路阻止でありCCDまた
はBBDで構成され電荷転送段の取扱い電荷量が
光電変換部である光導電体で生成する最大電荷量
より少ない場合、光導電体に印加する電圧を小さ
くするしかなく、そうすると焼きつけ、フリツカ
等が生じる。一方、光導電体に十分な電圧を印加
すると、一回の読み込み動作では信号を読み込む
ことができず、発生した過剰電荷(オーバーフロ
ー電荷)が転送段にもれ込み、不要な信号が出力
され、残像も生じる。
However, if the transfer circuit is blocked and the amount of charge handled by the charge transfer stage, which is composed of a CCD or BBD, is less than the maximum amount of charge generated by the photoconductor, which is the photoelectric conversion section, the only option is to reduce the voltage applied to the photoconductor. Otherwise, burn-in, frizz, etc. will occur. On the other hand, if a sufficient voltage is applied to the photoconductor, the signal cannot be read in a single reading operation, and the generated excess charge (overflow charge) leaks into the transfer stage, causing unnecessary signals to be output. An afterimage also occurs.

次に本発明の過剰電荷の流出の一例としての動
作を説明する。第3図は、半導体基板とソース領
域で形成されるダイオードを、順バイアス状態に
し不要な電荷の読み込みを生ずることなく基板に
過剰電荷を流出させる方法の一例として、第二電
極19へのパルス印加およびゲート電極への制御
パルスを利用する方法を示したものである。時間
T1において入射光による過剰電荷(転送取扱い
電荷量よりも多い生成電荷)が発生しダイオード
電位がVC以下になつた場合、第二電極19に印
加する外部電圧すなわち負のパルス(−VC′)に
よりダイオード電位(ソース領域11の電位は、
基板に体してVC分負に引き下げられ順バイアス
状態となり、基板と同電位(接地電位)になるま
で電荷が基板に流出する。
Next, the operation of the present invention as an example of draining excess charge will be described. FIG. 3 shows a method of applying a pulse to the second electrode 19 as an example of a method for forward biasing a diode formed by a semiconductor substrate and a source region and draining excess charge to the substrate without causing unnecessary charge loading. and a method using control pulses to the gate electrode. time
If an excess charge (generated charge greater than the transferred charge amount) is generated by the incident light at T 1 and the diode potential becomes below V C , the external voltage applied to the second electrode 19, that is, the negative pulse (-V C '), the diode potential (the potential of the source region 11 is
It is applied to the substrate and is pulled down by V C to a negative value, resulting in a forward bias state, and the charge flows to the substrate until it reaches the same potential as the substrate (ground potential).

このとき、ゲート電極13には第3図aに示さ
れる制御パルス30が印加される。このパルス3
0は、転送およびリードパルスとは逆極性であ
り、当然ゲート電極13直下に位置する信号電荷
の読み込み部の障壁電位が、基板の他の部分すな
わちソース領域11直下の障壁電位よりも高くな
る。このような手段により、順バイアス状態で基
板10に流出した過剰電荷は転送段の領域12に
は読み込まれず、不要な疑似信号は出力されな
い。こうした流出の後、第二電極19のパルスが
OVに戻るとダイオード電位は、VCに設定され、
その後リードパルスにより{(VCH−VT)−TC}の
電位に相当する信号電荷が転送段である領域12
に読み込まれる。時間T1においてダイオード電
位がVC以上の場合すなわち転送取扱い電荷量以
下の信号電荷の場合には、第二電極のパルスによ
つて、OV以下にはならず、ダイオードは順バイ
アスとはならない。従つてダイオード電位がVC
以上の場合、光情報は入射光強度に比例するが、
VC以下の場合、すなわち入射光強度がより強い
場合には、転送段に不要な読み込みを生じること
なく余分な過剰電荷を基板に流出させることによ
り、光情報はある値で一定(白クリツプ)とな
る。以上が本発明を用いた場合の光情報読み込み
動作の一例である。
At this time, a control pulse 30 shown in FIG. 3a is applied to the gate electrode 13. This pulse 3
0 has a polarity opposite to that of the transfer and read pulses, and naturally the barrier potential of the signal charge reading portion located directly below the gate electrode 13 is higher than the barrier potential of the other portion of the substrate, that is, directly below the source region 11. With such means, excess charges flowing into the substrate 10 in a forward bias state are not read into the region 12 of the transfer stage, and no unnecessary pseudo signals are output. After such outflow, the pulse of the second electrode 19
Returning to OV, the diode potential is set to V C ,
After that, a read pulse transfers the signal charge corresponding to the potential of {(V CH −V T )−T C } to the region 12 at the transfer stage.
is loaded into. When the diode potential is equal to or higher than V C at time T 1 , that is, when the signal charge is equal to or less than the transferable charge amount, the pulse of the second electrode does not reduce the potential to below OV, and the diode does not become forward biased. Therefore, the diode potential is V C
In the above case, the optical information is proportional to the incident light intensity, but
When V C or less, that is, when the incident light intensity is stronger, the optical information remains constant at a certain value (white clip) by draining the excess charge to the substrate without causing unnecessary reading in the transfer stage. becomes. The above is an example of the optical information reading operation when the present invention is used.

以上は光導電体として(Zn1-xCdxTe)1-y
(In2Te3yを用いた場合について説明したが、光
導電体としては、他の材料、例えばアモルフアシ
リコン等を用いたものでもかまわない。さらに、
光電変換部として半導体基板とソース領域で構成
されるダイオードを用いてもよい。さらには光導
電体のかわりに絶縁物を用いても同様の効果が得
られる。
The above is a photoconductor (Zn 1-x Cd x Te) 1-y
Although the case where (In 2 Te 3 ) y is used has been described, the photoconductor may be made of other materials such as amorphous silicon. moreover,
A diode including a semiconductor substrate and a source region may be used as the photoelectric conversion section. Furthermore, similar effects can be obtained by using an insulator instead of the photoconductor.

以上述べて来たように、本発明の固体撮像装置
は半導体基板と信号電荷を蓄積するソース領域で
構成されるダイオードを、順バイアスとすること
が可能な機構を有し、かつMOSFETのゲード電
極へのリードパルスとは逆極性の電圧印加により
信号電荷の読み込み部の障壁電位を高くすること
ができるもので、本発明を用いるなら、CCDま
たはBBDで構成される電荷転送段の取扱い電荷
量が、光電変換部で生成する最大電荷量より小さ
い場合でも、電荷転送段に過剰電荷をオーバーフ
ローさせることなく基板に確実に流出することが
でき、過剰電荷による不要な疑似信号の出力が発
生せず、残像も防止でき、入射光に忠実な信号電
荷を出力することが可能となり、高性能な固体撮
像装置の実現に大きく寄与するものである。
As described above, the solid-state imaging device of the present invention has a mechanism that can forward bias the diode, which is composed of a semiconductor substrate and a source region that accumulates signal charges, and has By applying a voltage of opposite polarity to the read pulse, the barrier potential of the signal charge reading section can be increased.If the present invention is used, the amount of charge handled by the charge transfer stage consisting of a CCD or BBD can be increased. Even if the amount of charge is smaller than the maximum amount generated by the photoelectric conversion section, the excess charge can reliably flow to the substrate without overflowing to the charge transfer stage, and unnecessary spurious signals will not be output due to excess charge. It also prevents afterimages, makes it possible to output signal charges that are faithful to incident light, and greatly contributes to the realization of high-performance solid-state imaging devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は電荷転送機能を有する回路素子上に光
導電体を設けた固体撮像装置の一単位の断面構造
図、第2図は第1図の固体撮像装置の動作を説明
するための図でクロツクパルスの時間関係と光導
電体の電位関係を示す波形図、第3図は本発明の
一実施例の固体撮像装置における半導体基板とソ
ース領域で構成されるダイオードを順バイアス状
態にする時の動作を説明するための電位波形図で
ある。 10……p型半導体基板、11……ソース領域
となるn+型領域、12……電位の井戸となる転
送用n+型領域、13……ゲート電極、14……
絶縁体膜、15……絶縁体層。
Fig. 1 is a cross-sectional structural diagram of one unit of a solid-state imaging device in which a photoconductor is provided on a circuit element having a charge transfer function, and Fig. 2 is a diagram for explaining the operation of the solid-state imaging device shown in Fig. 1. A waveform diagram showing the time relationship of clock pulses and the potential relationship of the photoconductor, and FIG. 3 is an operation when a diode composed of a semiconductor substrate and a source region is put into a forward bias state in a solid-state imaging device according to an embodiment of the present invention. FIG. 2 is a potential waveform diagram for explaining. DESCRIPTION OF SYMBOLS 10...P-type semiconductor substrate, 11...N + type region which becomes a source region, 12...N + type region for transfer which becomes a potential well, 13...Gate electrode, 14...
Insulator film, 15... Insulator layer.

Claims (1)

【特許請求の範囲】 1 一方の導電型を有する半導体基板に形成され
他方の導電型を有し入射光により生じる信号電荷
を蓄積し、ダイオードを形成するソース領域と、
上記基板のソース領域以外の部分に形成された信
号電荷を転送する回路素子と、上記ソース領域の
信号電荷をゲート電極にリードパルスを印加して
上記回路素子に読み込むためのMOSFETと、一
方の電極が上記ソース領域と電気的に接続された
光導電体とを有し、上記ダイオードを順バイアス
状態として余剰な電荷を上記半導体基板に流出さ
せると共に、上記MOSFETのゲート電極に信号
電荷の読み込み期間以外に上記リードパルスと逆
極性の電圧を印加することを特徴とする固体撮像
装置。 2 一方の導電型を有する半導体基板に形成され
他方の導電型を有し入射光により生じる信号電荷
を蓄積し、ダイオードを形成するソース領域と、
上記基板のソース領域以外の部分に形成された信
号電荷を転送する回路素子と、上記ソース領域の
信号電荷をゲート電極にリードパルスを印加して
上記回路素子に読み込むためのMOSFETと、一
方の電極が上記ソース領域と電気的に接続された
光導電体とを有し、上記回路素子の取扱電荷量よ
り多い電荷が上記ソース領域に蓄積されたとき、
上記ダイオードを順バイアス状態として余剰な電
荷を上記半導体基板に流出させると共に、上記
MOSFETのゲート電極に信号電荷の読み込み期
間以外に上記リードパルスと逆極性の電圧を印加
することを特徴とする固体撮像装置。
[Claims] 1. A source region formed on a semiconductor substrate having one conductivity type and having the other conductivity type and accumulating signal charges generated by incident light to form a diode;
A circuit element that transfers the signal charge formed in a portion of the substrate other than the source region, a MOSFET that applies a read pulse to the gate electrode to read the signal charge in the source region into the circuit element, and one electrode. has a photoconductor electrically connected to the source region, puts the diode in a forward bias state, drains excess charge to the semiconductor substrate, and supplies the gate electrode of the MOSFET with a photoconductor other than during the signal charge loading period. A solid-state imaging device characterized in that a voltage having a polarity opposite to that of the read pulse is applied to. 2. A source region formed on a semiconductor substrate having one conductivity type and having the other conductivity type and accumulating signal charges generated by incident light to form a diode;
A circuit element that transfers the signal charge formed in a portion of the substrate other than the source region, a MOSFET that applies a read pulse to the gate electrode to read the signal charge in the source region into the circuit element, and one electrode. has a photoconductor electrically connected to the source region, and when more charge than the amount of charge handled by the circuit element is accumulated in the source region,
The diode is forward-biased to drain excess charge to the semiconductor substrate, and the diode is forward-biased.
A solid-state imaging device characterized in that a voltage having a polarity opposite to the read pulse is applied to a gate electrode of a MOSFET during a period other than a signal charge read period.
JP2011282A 1980-01-18 1990-01-19 Solid-state image pickup device Granted JPH03171883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011282A JPH03171883A (en) 1980-01-18 1990-01-19 Solid-state image pickup device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP485980A JPS56102169A (en) 1980-01-18 1980-01-18 Solid image pickup device
JP2011282A JPH03171883A (en) 1980-01-18 1990-01-19 Solid-state image pickup device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP485980A Division JPS56102169A (en) 1980-01-18 1980-01-18 Solid image pickup device

Publications (2)

Publication Number Publication Date
JPH03171883A JPH03171883A (en) 1991-07-25
JPH0549152B2 true JPH0549152B2 (en) 1993-07-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011282A Granted JPH03171883A (en) 1980-01-18 1990-01-19 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPH03171883A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5495116A (en) * 1978-01-13 1979-07-27 Toshiba Corp Solid image pickup unit
JPS551151A (en) * 1978-06-19 1980-01-07 Matsushita Electric Ind Co Ltd Photoconductive element
JPS56102169A (en) * 1980-01-18 1981-08-15 Matsushita Electric Ind Co Ltd Solid image pickup device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54124480U (en) * 1978-02-20 1979-08-31

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5495116A (en) * 1978-01-13 1979-07-27 Toshiba Corp Solid image pickup unit
JPS551151A (en) * 1978-06-19 1980-01-07 Matsushita Electric Ind Co Ltd Photoconductive element
JPS56102169A (en) * 1980-01-18 1981-08-15 Matsushita Electric Ind Co Ltd Solid image pickup device

Also Published As

Publication number Publication date
JPH03171883A (en) 1991-07-25

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