JPH0546651B2 - - Google Patents

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Publication number
JPH0546651B2
JPH0546651B2 JP12861585A JP12861585A JPH0546651B2 JP H0546651 B2 JPH0546651 B2 JP H0546651B2 JP 12861585 A JP12861585 A JP 12861585A JP 12861585 A JP12861585 A JP 12861585A JP H0546651 B2 JPH0546651 B2 JP H0546651B2
Authority
JP
Japan
Prior art keywords
terminal
relay
turned
pulse
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP12861585A
Other languages
Japanese (ja)
Other versions
JPS61285625A (en
Inventor
Yukio Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12861585A priority Critical patent/JPS61285625A/en
Publication of JPS61285625A publication Critical patent/JPS61285625A/en
Publication of JPH0546651B2 publication Critical patent/JPH0546651B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 〔概要〕 パルスが入力する度にオンオフ状態を反転し、
オン状態の時は共通端子とオン端子とを接続し、
オフ状態の時は該共通端子とオフ端子とを接続す
る信号変換回路を、リレー4個の簡単な回路構成
で実現すると共に電源断時及び初期状態では該共
通端子とオン端子及びオフ端子間を開放状態とし
て、オン状態及びオフ状態と違う状態とし、次段
の回路の誤動作を防ぐようにしたものである。
[Detailed Description of the Invention] [Summary] Each time a pulse is input, the on/off state is reversed,
When in the on state, connect the common terminal and the on terminal,
A signal conversion circuit that connects the common terminal and the off terminal when in the off state is realized with a simple circuit configuration of four relays, and also connects the common terminal and the on and off terminals when the power is off or in the initial state. The open state is different from the on state and off state to prevent malfunction of the next stage circuit.

〔産業上の利用分野〕[Industrial application field]

本発明は、通信電子機器の表示装置等の制御装
置に使用する信号変換回路の改良に関する。
The present invention relates to improvements in signal conversion circuits used in control devices such as display devices for communication electronic equipment.

上記信号変換回路では、回路構成が簡単で且つ
電源断時及び初期状態では共通端子とオン端子及
びオフ端子間を開放状態として、オン状態及びオ
フ状態と違う状態に出来次段の回路の誤動作を防
げることが望ましい。
The above-mentioned signal conversion circuit has a simple circuit configuration, and when the power is turned off or in the initial state, the common terminal, on terminal, and off terminal are in an open state, and the state is different from the on state and off state, thereby preventing malfunction of the next stage circuit. It is desirable to be able to prevent this.

〔従来の技術〕[Conventional technology]

第3図は、従来例の信号変換回路の回路図、第
4図は、第3図の回路の動作のタイムチヤートで
ある。
FIG. 3 is a circuit diagram of a conventional signal conversion circuit, and FIG. 4 is a time chart of the operation of the circuit shown in FIG.

図中1はFF、2は初期設定回路、3はバツフ
ア、4はオフ端子、5はオン端子、6は共通端
子、7はリセツト端子、R1〜R3は抵抗、V
1,V2は電源、Trはトランジスタ、RLはリレ
ー、r1はリレーRLの接点、Cはコンデンサを
示す。
In the figure, 1 is FF, 2 is initial setting circuit, 3 is buffer, 4 is off terminal, 5 is on terminal, 6 is common terminal, 7 is reset terminal, R1 to R3 are resistors, V
1, V2 is a power supply, Tr is a transistor, RL is a relay, r1 is a contact of the relay RL, and C is a capacitor.

動作を説明すると、第4図Aに示す如く、電源
V1,V2をオンとすると、初期設定回路2の出
力は、第4図Dに示す如くオンとなりFF1をク
リアし出力Qがオンであつてもオフであつてもオ
フとする。
To explain the operation, when the power supplies V1 and V2 are turned on as shown in FIG. 4A, the output of the initial setting circuit 2 is turned on as shown in FIG. 4D, clearing FF1, and output Q is on. It is also off even if it is off.

次にパルス入力より第4図Bに示す如くパルス
が入力すると、FF1の出力Qは第4図Eに示す
如く交互にオンオフとなり、トランジスタTrは
これに応じてオンオフし、リレーRLは第4図F
に示す如くオンオフする。
Next, when a pulse is input from the pulse input as shown in FIG. 4B, the output Q of FF1 is turned on and off alternately as shown in FIG. 4E, the transistor Tr is turned on and off accordingly, and the relay RL is turned on and off as shown in FIG. F
It turns on and off as shown in .

このことにより、接点r1はこれに応じてオン
オフし、オン端子5と共通端子6との接続は第4
図Gに示す如くオンオフし、オフ端子4と共通端
子6との接続は第4図Hに示す如くオン端子5と
は逆にオンオフする。
As a result, the contact r1 is turned on and off accordingly, and the connection between the on terminal 5 and the common terminal 6 is
The connection between the off terminal 4 and the common terminal 6 is turned on and off as shown in FIG.

従つて、共通端子6よりの信号は、最初のパル
スが入力した時、オン端子5より出力し、次のパ
ルスが入力した時、オフ端子4より出力し、この
動作は交互に繰り返され、信号は変換される。
Therefore, when the first pulse is input, the signal from the common terminal 6 is output from the ON terminal 5, and when the next pulse is input, it is output from the OFF terminal 4. This operation is repeated alternately, and the signal is converted.

尚第4図Cに示す如く、リセツト端子7をアー
スし、パルスを入力させると、初期設定回路2の
出力は第4図Dに示す如くオフとなり、FF1の
出力Qがオンとなつていてもオフとなり初期状態
となる。
As shown in Fig. 4C, when the reset terminal 7 is grounded and a pulse is input, the output of the initial setting circuit 2 turns off as shown in Fig. 4D, and even if the output Q of FF1 is on, It turns off and returns to its initial state.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、第3図の場合では、第4図Hに
示す如く、電源がオフの時及び電源がオンとなり
パルスが未だ入力していない初期状態の間もオフ
端子4は共通端子6と接続状態にあり、共通端子
6より入力した信号はオフ端子4より出力され、
これ等の端子と接続される次段の回路では、パル
スが入力しオフ状態となつた時との区別がつか
ず、誤動作することがある問題点及び初期設定回
路も必要で回路が複雑になる問題点がある。
However, in the case of FIG. 3, as shown in FIG. 4H, the off terminal 4 remains connected to the common terminal 6 both when the power is off and during the initial state when the power is on and no pulse has been input yet. Yes, the signal input from common terminal 6 is output from off terminal 4,
In the next stage circuit connected to these terminals, there is a problem that it is difficult to distinguish between the input pulse and the off state, which may cause malfunction, and the circuit becomes complicated as an initial setting circuit is also required. There is a problem.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点は、第1〜第4のリレーを備え、共
通端子と該第1〜第4のリレーの接点の一方とを
接続し、該第1、第3のリレーの接点の他方をオ
ン端子とオア接続し、該第2、第4のリレーの接
点の他方をオフ端子とオア接続し、電源断時及び
初期状態では各接点は開放状態としておき、最初
のパルスで該第1のリレーをオンとし該リレーの
接点をオンとし、第2のパルスでは該第2のリレ
ーをオンとして該リレーの接点をオンとすると共
に該第1のリレーをオフとし、第3のパルスでは
該第3のリレーをオンとして該リレーの接点をオ
ンとすると共に該第2のリレーをオフとし、該第
4のパルスでは該第4のリレーをオンとして該リ
レーの接点をオンとすると共に該第3のリレーを
オフとする、このような動作を繰り返すようにし
た本発明の信号変換回路により解決される。
The above problem is that the first to fourth relays are provided, the common terminal is connected to one of the contacts of the first to fourth relays, and the other of the contacts of the first and third relays is connected to the on terminal. The other of the contacts of the second and fourth relays is OR-connected with the OFF terminal. When the power is turned off and in the initial state, each contact is left open, and the first pulse turns off the first relay. the second pulse turns on the contacts of the relay, the second pulse turns on the contacts of the relay, and the first relay turns off, and the third pulse turns the third relay on. The relay is turned on, the contacts of the relay are turned on, and the second relay is turned off, and the fourth pulse is turned on, the contacts of the relay are turned on, and the third relay is turned on. This problem is solved by the signal conversion circuit of the present invention, which repeats such an operation by turning off the signal.

〔作用〕[Effect]

本発明によれば、電源断時及び初期状態ではオ
ン端子、オフ端子は共通端子とは開放状態になつ
ており、パルスが入力してから、オン端子、オフ
端子は夫々共通端子と接続されるので、次段の回
路は誤動作することはなく又初期設定回路を必要
とせず且つリレー4個で信号変換回路が構成出来
るので、簡単な回路構成となる。
According to the present invention, when the power is turned off and in the initial state, the on terminal and the off terminal are in an open state from the common terminal, and after a pulse is input, the on terminal and the off terminal are respectively connected to the common terminal. Therefore, the next stage circuit does not malfunction, does not require an initial setting circuit, and the signal conversion circuit can be constructed with four relays, resulting in a simple circuit configuration.

〔実施例〕〔Example〕

第1図は本発明の実施例の信号変換回路の回路
図、第2図は第1図の回路の動作のタイムチヤー
トである。
FIG. 1 is a circuit diagram of a signal conversion circuit according to an embodiment of the present invention, and FIG. 2 is a time chart of the operation of the circuit of FIG.

図中RLA,RLB,RLC,RLDはリレー、r1
a−1〜r1a−4,r1b−1〜r1b−4,
r1c−1〜r1c−4,r1d−1,r1d−
2,r1d−4は夫々リレーRLA,RLB,
RLC,RLDの設点、+Vは電源、4,5,6,7
は従来例の場合と同じくオフ端子、オン端子、共
通端子、リセツト端子を示し、この場合はリセツ
ト端子7は通常アースとなつている。
In the diagram, RLA, RLB, RLC, RLD are relays, r1
a-1 to r1a-4, r1b-1 to r1b-4,
r1c-1 to r1c-4, r1d-1, r1d-
2, r1d-4 are relays RLA, RLB,
RLC, RLD settings, +V is power supply, 4, 5, 6, 7
1 shows an OFF terminal, an ON terminal, a common terminal, and a reset terminal as in the conventional example, and in this case, the reset terminal 7 is normally grounded.

動作を説明すると、第2図Aに示す如く電源+
Vをオンとしても、接点r1a−4,r1b−
4,r1c−4,r1d−4は電源をオンとしな
い時と同様にパルスが入力する迄の間開放状態で
あり、オン端子5、オフ端子4と共通端子6との
接続状態は第2図J,Kに示す如くオフの状態で
ある。
To explain the operation, as shown in Figure 2A, the power supply +
Even if V is turned on, contacts r1a-4, r1b-
4, r1c-4, and r1d-4 are open until a pulse is input, just as when the power is not turned on, and the connection status of the on terminal 5, off terminal 4, and common terminal 6 is shown in Figure 2. It is in the off state as shown in J and K.

次に第2図Bに示す如く逐次パルスが入力しパ
ルス入力端子がアースされると、リレーRLA,
RLB,RLC,RLDは逐次第2図D,E,F,G
に示す如くオンとなるが、次のパルスで次のリレ
ーが動作する迄リレーの自己保持状態を続け、次
のリレーがオンとなつて、このリレーはオフとな
る。
Next, as shown in Figure 2B, when pulses are input sequentially and the pulse input terminal is grounded, relay RLA,
RLB, RLC, and RLD are sequentially shown in Figure 2 D, E, F, and G.
The relay is turned on as shown in the figure, but the self-holding state of the relay continues until the next relay is activated by the next pulse, and when the next relay is turned on, this relay is turned off.

従つて、リレーRLA,RLCがオンとなつてい
る時、接点r1a−4,r1c−4は第2図Hに
示す如くオンとなり、リレーRLB,RLDがオン
となつている時、接点r1b−4,r1d−4は
第2図Iに示す如くオンとなり、オン端子5は第
2図Jに示す如く、接点r1a−4又はr1c−
4がオンとなつている間共通端子6に接続され、
オフ端子4は第2図Kに示す如く、接点r1b−
4又はr1d−4がオンとなつている間共通端子
6に接続される。
Therefore, when relays RLA and RLC are on, contacts r1a-4 and r1c-4 are on as shown in FIG. 2H, and when relays RLB and RLD are on, contact r1b-4 is on. , r1d-4 are turned on as shown in FIG. 2I, and the ON terminal 5 is connected to the contact r1a-4 or r1c- as shown in FIG. 2J.
4 is on, it is connected to the common terminal 6,
The off terminal 4 is connected to the contact r1b- as shown in FIG. 2K.
4 or r1d-4 is connected to the common terminal 6 while it is on.

尚第2図Cに示す如く、リセツト端子7をオフ
とすると、リレーは前部オフとなり初期状態とな
る。
As shown in FIG. 2C, when the reset terminal 7 is turned off, the front part of the relay is turned off and the relay is in its initial state.

このようにして、パルスが入力する度に共通端
子6から入力した信号はオン状態ではオン端子5
より、オフ状態ではオフ端子4より次段に出力
し、且つ電源オフ及び初期状態では、オン端子
5、オフ端子4は共に共通端子6には接続されて
おらず、次段の回路が誤動作を起こすことはな
く、又初期設定回路はなくとも所望の動作を行い
第1図に示す如く簡単な回路構成の信号変換回路
が実現出来る。
In this way, every time a pulse is input, the signal input from the common terminal 6 is transferred to the on terminal 5 in the on state.
Therefore, in the off state, the output is output from the off terminal 4 to the next stage, and in the power off and initial state, both the on terminal 5 and the off terminal 4 are not connected to the common terminal 6, which prevents the next stage circuit from malfunctioning. This does not occur, and even without an initial setting circuit, the desired operation can be performed, and a signal conversion circuit with a simple circuit configuration as shown in FIG. 1 can be realized.

〔発明の効果〕 以上詳細に説明せる如く本発明によれば、電源
オフ及び初期状態では、オン端子、オフ端子は共
に共通端子には接続されておらず、次段の回路が
誤動作を起こすことはなく、又初期設定回路は不
要で簡単な回路構成の信号変換回路が実現出来る
効果がある。
[Effects of the Invention] As explained in detail above, according to the present invention, when the power is off and in the initial state, both the on terminal and the off terminal are not connected to the common terminal, so that the next stage circuit does not malfunction. Moreover, there is an effect that a signal conversion circuit with a simple circuit configuration can be realized without the need for an initial setting circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の信号変換回路の回路
図、第2図は第1図の回路の動作のタイムチヤー
ト、第3図は、従来例の信号変換回路の回路図、
第4図は、第3図の回路の動作のタイムチヤート
である。 図において、1はFF、2は初期設定回路、3
はバツフア、4はオフ端子、5はオン端子、6は
共通端子、7はリセツト端子、V1,V2,+V
は電源、R1〜R3は抵抗、Cはコンデンサ、
Trはトランジスタ、RL,RLA,RLB,RLC,
RLDはリレーで、r1,r1a−1〜r1a−
4,r1b−1〜r1b−4,r1c−1〜r1
c−4,r1d−1,r1d−2,r1d−4は
夫々リレーRL,RLA,RLB,RLC,RLDの接
点を示す。
FIG. 1 is a circuit diagram of a signal conversion circuit according to an embodiment of the present invention, FIG. 2 is a time chart of the operation of the circuit of FIG. 1, and FIG. 3 is a circuit diagram of a conventional signal conversion circuit.
FIG. 4 is a time chart of the operation of the circuit of FIG. In the figure, 1 is FF, 2 is initial setting circuit, 3
is a buffer, 4 is an off terminal, 5 is an on terminal, 6 is a common terminal, 7 is a reset terminal, V1, V2, +V
is a power supply, R1 to R3 are resistors, C is a capacitor,
Tr is a transistor, RL, RLA, RLB, RLC,
RLD is a relay, r1, r1a-1 to r1a-
4, r1b-1 to r1b-4, r1c-1 to r1
c-4, r1d-1, r1d-2, and r1d-4 indicate contacts of relays RL, RLA, RLB, RLC, and RLD, respectively.

Claims (1)

【特許請求の範囲】 1 パルスが入力する度にオンオフ状態を反転
し、オン状態の時は共通端子とオン端子とを接続
し、オフ状態の時は該共通端子とオフ端子とを接
続するに際し、 第1〜第4のリレーを備え、 該共通端子と該第1〜第4のリレーの接点の一
方とを接続し、 該第1、第3のリレーの接点の他方をオン端子
とオア接続し、 該第2、第4のリレーの接点の他方をオフ端子
とオア接続し、 電源断時及び初期状態では各接点は開放状態と
しておき、 最初のパルスで該第1のリレーをオンとし該リ
レーの接点をオンとし、 第2のパルスでは該第2のリレーをオンとして
該リレーの接点をオンとすると共に該第1のリレ
ーをオフとし、 第3のパルスでは該第3のリレーをオンとして
該リレーの接点をオンとすると共に該第2のリレ
ーをオフとし、 第4のパルスでは該第4のリレーをオンとして
該リレーの接点をオンとすると共に該第3のリレ
ーをオフとする、このような動作を繰り返すよう
にしたことを特徴とする信号変換回路。
[Claims] 1. Each time a pulse is input, the on/off state is inverted, and when the on state is on, the common terminal and the on terminal are connected, and when the off state is, the common terminal and the off terminal are connected. , comprising first to fourth relays, connecting the common terminal and one of the contacts of the first to fourth relays, and OR-connecting the other of the contacts of the first and third relays to the ON terminal. Then, the other of the contacts of the second and fourth relays is OR-connected to the OFF terminal, and each contact is left open when the power is turned off and in the initial state, and the first pulse is turned on to turn on the first relay. A contact of a relay is turned on, a second pulse turns on the second relay, turns on a contact of the relay, and turns off the first relay, and a third pulse turns on the third relay. As a fourth pulse, the contacts of the relay are turned on and the second relay is turned off, and the fourth pulse is turned on and the contacts of the relay are turned on, and the third relay is turned off. , a signal conversion circuit characterized in that such an operation is repeated.
JP12861585A 1985-06-13 1985-06-13 Signal conversion circuit Granted JPS61285625A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12861585A JPS61285625A (en) 1985-06-13 1985-06-13 Signal conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12861585A JPS61285625A (en) 1985-06-13 1985-06-13 Signal conversion circuit

Publications (2)

Publication Number Publication Date
JPS61285625A JPS61285625A (en) 1986-12-16
JPH0546651B2 true JPH0546651B2 (en) 1993-07-14

Family

ID=14989165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12861585A Granted JPS61285625A (en) 1985-06-13 1985-06-13 Signal conversion circuit

Country Status (1)

Country Link
JP (1) JPS61285625A (en)

Also Published As

Publication number Publication date
JPS61285625A (en) 1986-12-16

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