JPH0540563A - Key switch controller - Google Patents

Abstract

PURPOSE:To judge which key switch obtains state data by a CPU even without providing data holding circuits as many as all the key switches in the key switch controller by providing a function to output the state data of the key switch from an output part and cycle information showing which key switch obtains the state data. CONSTITUTION:This controller is provided with a count part 2 to input a clock signal, information converter 4 to input the data of the count part 2 and to generate plural decode signals corresponding to respective states, plural key switches 13 to be controlled by these decode signals, data input circuit to input the states of the key switches 13 and to hold the data, and output part 18 to output the data of the count part 2 and the key switch state data in the data input circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a key switch control device, and more particularly to a control method of an output drive device for key switch control.

[0002]

2. Description of the Related Art A conventional key switch controller is a central processing unit (hereinafter referred to as "center processing unit").
The key switch is connected to each input / output device, and the key switch control is such that the CPU executes the program data held in the memory to cause the output device to have a specific periodicity. The control code is output to a plurality of key switches, and the plurality of key switches are realized by transmitting the ON-OFF state of each key switch to an input device. However, since most of the information processing capability of the CPU is occupied by key switch control, a specific control code having periodicity is generated in a counter circuit other than the CPU to periodically scan all key switches. However, a method of storing the state of each key switch in the same number of data holding circuits as the key switch can be considered.

[0003]

However, the prior art requires as many data holding circuits as there are key switches.
Therefore, in order to solve such a conventional problem, the present invention has an object to provide a control device which has a small number of circuit elements and can perform key switch control capable of reducing the load on the CPU.

[0004]

In order to solve the above-mentioned problems, a key switch controller according to the present invention inputs a clock signal, a counter for measuring the clock signal, and a count information of the counter. Information conversion section for converting measurement information, an output drive section for outputting the converted information from the information conversion section, and a key switch section composed of a plurality of key switches connected to output terminals of the output drive section A key switch control device comprising an input control unit for holding information from the key switch unit and an output unit for outputting information from the input control unit, the information corresponding to the counting unit and the information corresponding to the information. It is characterized in that it has an output section for outputting the information from the key switch section together.

[0005]

As described above, the data output from the information conversion section (hereinafter referred to as a "decoder") for converting the data of the counting section (hereinafter referred to as a "counter") for inputting the clock signal and measuring the clock signal is output to the key switch. Output to an output terminal of the key switch, drive a plurality of key switches with the output terminal, take in the ON-OFF state data from the output terminal of the key switch to the key switch input control unit, and the taken-in data, By transferring the information of the counter corresponding to the fetched data to the CPU, the number of data holding circuits in the input control unit can be reduced to a fraction of the total number of key switches.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration and embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a key switch control device of the present invention. The counting unit 2 inputs the clock signal 1 and performs clock counting, and outputs the count data 3 to the information converting unit 4 and the output unit 18. The information conversion unit 4 decodes the count data and sends a signal for selecting one switch group in a time-divisional manner from a plurality of switch groups to the key / switch control output drive unit 5, and the drive unit Reference numeral 5 outputs a control signal to the key switch unit 13.
The key switch unit 13 turns ON / OFF each key switch.
The F information is transferred to the key switch control input device 7.
The key switch control input device 7 transfers the information to the output unit 18 via the information transmission output 12. Output unit 18
Outputs the count data 3 from the counting unit 2 and ON / OFF information of the key switch of the key switch control input device 7 to the CPU via the output terminal 19.

FIG. 2 shows an embodiment of the circuit configuration of the counting section and the information converting section. This circuit uses a 3-bit synchronous counter to count CL, that is, the clock signal 1, and the outputs Q0, Q1 and Q2 of the data input type flip-flop 14 are periodically changed by the rising edge of CL. .. Q0, Q1, and Q2 have eight output states,
It can be expressed, and the state is converted into eight output signals 6 (OUT0 to OUT7) corresponding to each state in the information conversion unit 4. The output signal is sent to the key switch control output drive section 5 to control the key switch section 13. FIG. 6 shows a timing chart of CL, Q0 to Q2, and OUT0 to OUT7. An output signal 6 (OUT0 to OUT0 from the information conversion unit 4
OUT7) outputs only one output signal for a certain period of time.
It becomes the W level, and only the switch group connected to the signal line becomes operable only during the period. FIG. 3 shows an embodiment of the key switch group 13. The output signal 6 is connected to the anode terminal of the diode, and the output signal 6 is LO
Only when W, LOW level is propagated to the cathode terminal, and when the output signal 6 is HIGH level, the cathode terminal is in an open state (state in which the potential is not fixed). The input terminals of a plurality of key switches are connected to the cathode terminal, and each output signal 6 is divided into eight switch groups, so one of the switch groups is always selected periodically. Will be done. Focusing on the switch group selected as OUT0, the LOW potential is applied to the input terminal of the key switch during the selection period. At this time, if a certain key switch is in the ON state, LOW is output to the output terminal of the key switch
In the F state, the open state appears. In the non-selected period, the open state appears regardless of the ON / OFF state of the key switch. Output terminals IN0 to INn
One switch output terminal of each different switch group is connected to each of the switch groups, and the switch states of each switch group are output in a time division manner. FIG. 4 shows an embodiment of a key switch control input section. Key
The output terminals IN0 to INn from the switch unit 13 are key
It is connected to the switch information input terminal 15 so that the key / switch information can be taken into the data holding circuit section 10. The number of holding circuits in this embodiment is 8 which is the total number of keys and switches.
It is suppressed to one-tenth. For comparison, the conventional key is shown in FIG.
A block diagram of the switch control device, and FIG. 9 shows a conventional control input unit. In the conventional example, the same number of holding circuits as the number of all the key switches are prepared, all the data obtained when the key switches are scanned are held, and the CPU is required only by checking all the holding circuits. I was getting information. In FIG. 4, when the data is fetched, the output states of the output terminals IN0 to INn from the key switch unit 13 are open and LOW level. Therefore, the input pull-up circuit 9 is provided, and 16 is a pull-up resistor for converting the open state to the HIGH state. The latch clock 17 (LC) is input so that the data can be fetched within each of the eight selection periods. The key switch information is transferred to the output section through the data latch output terminal 12.

FIG. 5 shows an example of the circuit configuration of the output section.
The counter / data holding circuit 20 holds the data of the counting section 2, but since the fetch clock is the latch clock 17 (LC), the timing of fetching the key switch information to the key switch control input section 7 and Since it is simultaneous, the information appearing at the output terminal 19 of the output unit 3 is CP
By obtaining U, the CPU can determine which key switch information is the obtained data. The problem is that the information appearing at the output terminal 19 changes as the state of the key switch changes. If the CPU performs information acquisition processing at this time, there is a possibility of erroneous recognition. Therefore, the AND circuit 21 sets all the output terminals 19 to the HIGH level during the HIGH level from the rising timing of the latch clock 17 (LC). CPU by
It is prepared to inform the change period.

In FIG. 7, OUT0 to OUT7, A1 to A3,
The timing chart of IN0 to INn and LC is shown.

[0010]

As described above, the key switch control device of the present invention outputs the state data of the key switch and the cycle information indicating which key switch the state data belongs to from the output section. Since it has a function, it is possible to provide information required by the CPU without preparing the same number of data holding circuits as the total number of key switches in the key switch controller.

[Brief description of drawings]

FIG. 1 is a block diagram of a key switch control device of the present invention.

FIG. 2 is a circuit diagram of an embodiment of a counting unit and an information converting unit according to the present invention.

FIG. 3 is a circuit diagram of an embodiment of a key switch unit of the present invention.

FIG. 4 is a circuit diagram of an embodiment of an input device for controlling a key switch of the present invention.

FIG. 5 is a circuit diagram of an embodiment of an output section of the key switch control input device of the present invention.

FIG. 6 is a timing diagram of a counting unit and an information converting unit according to the present invention.

FIG. 7 is a timing chart of the information conversion unit and the key switch control input device of the present invention.

FIG. 8 is a block diagram of a conventional key switch control device.

FIG. 9 is a circuit diagram of an embodiment of a conventional key switch control input device.

[Explanation of symbols]

1 clock signal 2 counting unit 3 counting information transmission signal 4 information conversion unit 5 key switch control output drive device 6 key switch control output signal 7 key switch control input device 9 key switch control input device Pull-up circuit 10 Data holding circuit in input device for key switch control 12 Data latch output terminal 13 Key switch section 17 Key switch information capture signal 18 Output section 19 Output terminal of output section 20 Counter data holding circuit 21 AND circuit

Claims (1)

[Claims] 1. A counting unit for inputting a clock signal and measuring the clock signal, an information converting unit for inputting count information of the counting unit and converting measurement information, and outputting converted information from the information converting unit. An output drive unit, a key switch unit composed of a plurality of key switches connected to the output terminals of the output drive unit, an input control unit that holds information from the key switch unit, and information of the input control unit. A key switch control device comprising an output unit for outputting, a key switch characterized by having an output unit for outputting both the information of the counting unit and the information from the key switch unit corresponding to the information. Switch control device.