JPH0540470A - Display controller - Google Patents

Abstract

PURPOSE:To reduce the capacity of a character generator ROM by eliminating trimming data from the ROM in which the display dot patterns of a character and a graphic are stored, and generating the trimming data based on display data. CONSTITUTION:The display data are divided and stored in three ROMs 12a-12c in sequence of line (or caster) of dot matrix comprising the character. The trimming data can be generated by reading the display data of three lines simultaneously, and performing the OR processing of four pieces of display data at the upper and lower, and right and left dot positions of a remarked dot at a trimming control part 13 based on the output of a data holding part 14 holding the final data before one character and the display data of three lines.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control device (on-screen display controller OSDC) for displaying characters and drawings on a CRT or the like, and in particular, a border for distinguishing a display from a background is a character or a graphic. The present invention relates to a display control device adapted to be added to.

[0002]

2. Description of the Related Art As a known means for adding borders to display characters, graphics, etc., there is a system of storing border data together with a character pattern in a character generator ROM. In this ROM, the edging pattern is stored where the pixel value changes from “0” to “1” or from “1” to “0”, and the continuous portion such as “11” is stored as a character pattern. There is.

[0003]

In the character generator of the above-mentioned method, since the pattern of "10" or "01" cannot be used as a character, the minimum unit of pixels forming the character is 2 dots, and the dot of the character is The configuration becomes large. When the character dot configuration becomes large, high quality display is obtained, but the amount of data written to the character generator ROM increases, the ROM capacity increases, and the number of stages of the dot counter for the read address increases, and the dot clock The problem arises that the frequency becomes high.
This increases the LSI chip area and power consumption of the character generator. Further, there is also a disadvantage that the quality of characters is small, and therefore the quality of characters is not required to be displayed in a very high quality.

The present invention has been made in view of this problem. A character generator ROM storing only character and graphic pattern data is used, and border data is added to the read data, so that the entire character is read. -The purpose is to reduce the circuit scale of the generator.

[0005]

The display control device of the present invention is a storage unit (ROM 12) storing display dot patterns of characters, figures, etc., and is read from the storage unit in correspondence with the row-direction scanning of the display. In addition to the display data to be displayed, a border control unit 13 that generates border data that borders a display character or graphic is provided.

The edging control section stores the data holding means 14 for storing the end data in the line direction in the display data one character before, the display data, and one line before the line number corresponding to the display data. By referring to the display data corresponding to the number of each subsequent row and the output of the data holding means, when there is display data at the upper, lower, left, and right dot positions of the target dot on the display surface, the edging data is set for the target dot. And an OR means (gate 23) for giving.

A display of a character or a graphic with a border is obtained based on the display data and the border data. The row corresponds to the raster in the embodiment.

[0008]

The storage unit stores only the display dot pattern data, and the border display is performed based on the read display data. Since the edging data is not stored, the storage capacity of the storage unit can be small, and the character dot configuration does not become large. The border data is the display data for the adjacent 3 lines and 1
Since it is generated by the OR gate based on the end data in the row direction of the display data before the character, it is possible to easily obtain a high-speed operation that follows the display speed by using simple circuit means. The display data for three lines are simultaneously referred to in order to generate the border data. For this reason, the storage unit is divided into three,
It is accessible. Since display data is divided and stored each time it is performed, it is necessary to instruct which storage means is to be read from which divided row, and address information indicating the data storage position is created. Further, the identification information for selecting the data to be used for display among the three lines of display data is also created.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A display control device according to an embodiment of the present invention shown in FIG. For example, codes corresponding to characters and figures displayed on the CRT screen are stored in the video RAM (VRAM) 10. The contents of the VRAM 10 are read based on the address given from the horizontal position counter / vertical position counter 9 which counts the dot clock and the CRT sync signal, and is fetched character by character into the character code latch 11. The output a of the character code latch 11 is given to the character generator ROM 12 (CGROM) as address data for designating a character type (pattern). Therefore, the character pattern data to be displayed is read from the CGROM 12 in synchronization with the screen scanning of the CRT.

The CGROM 12 has three access points that can be accessed simultaneously.
ROMs 12a, 12b, 12c (ROM0-ROM
2). In addition, these ROM12a ~
12c may consist of a single ROM and may not be simultaneously accessible, even if it has substantially three parallel outputs. That is, if reading at a sufficiently high speed is possible, the ROM areas corresponding to the three ROMs 12a to 12c can be sequentially accessed and three parallel outputs can be formed by a latch or the like.

The ROMs 12a to 12c are shown in FIG.
As shown in (D), character data obtained by dividing the rows of the matrix forming each character pattern into raster-sequential (line-sequential) is divided and stored. In the example shown in FIG. 2A, the character pattern is composed of a matrix of 9 rows × 8 columns, and 0, 3, corresponding to each row as shown in FIG. 2B.
6 raster data is stored in ROM0 (12a),
As shown in FIG. 2 (C), the data of 1, 4, and 7 rasters is ROM.
1 (12b), as shown in FIG.
The data of 8 rasters is stored in the ROM 2 (12c).

The ROMs 12a to 12c are accessed in parallel so that character pattern data for three adjacent raster lines can be read simultaneously. For example, when the line position to be displayed in FIG. 2 (A) corresponds to the fourth raster, the character pattern of the corresponding line is read from the ROM 1 (FIG. 2 (C)), and at the same time from the ROM 0 to the 3rd line. (FIG. 2 (B)), the character pattern data on the fifth line is read from the ROM 2 (FIG. 2 (D)). Note that each read data is parallel (simultaneous) for eight columns in the example of FIG.

The ROM 12a based on such reading order
In order to perform simultaneous access of .about.12c, the raster address decoder 17 decodes the output of the raster counter 18 which counts the CRT sync signal SYNC, and RO
The M addresses b0 to b2 are supplied. ROM 12a-12
The character pattern data c0 to c2 read from c is supplied to the edging control unit 13. The edging control unit 13 creates character data for display based on the character data of the central raster of the read data of 8 dots (rows) × 3 rasters and adds it between the display character and the background. The edging data for the edging is generated. ROM
An identification signal d is supplied from the raster address decoder 17 to the edging control section 13 in order to indicate which of the three rasters of character data read from 12a to 12c corresponds to the central raster position.

The edging data is generated for each dot of the character data to be displayed as a logical sum of these five data by referring to the data of each dot and the character pattern data at the upper, lower, left, and right dot positions. The data of the upper and lower dot positions is obtained from the character pattern data of the rasters above and below the central raster, and the data of the left and right dot positions is obtained from the character pattern data of the central raster.

In the character pattern as shown in FIG. 2A, the edging shifts to the character display area located on the right adjacent to the CRT screen. Therefore, the data e corresponding to the rightmost column in the character data created by the edging control unit 13 is latched by the previous data holding unit 14. The edging control unit 13 reads 3 from the ROMs 12a to 12c.
The edging data is generated by referring to the character data of the raster and the character data of the dots located in the right end column of the left adjacent display character held in the previous data holding unit 14.

FIG. 3 shows how character data and border data are generated in the border control section 13 based on the ROM data shown in FIG. First, when the raster address is 0, the address 0 of the ROM0 and ROM1 is designated, and the corresponding character data of 8 dots is read out and given to the edging control unit 13. Since the data of the upper raster among the data of three rasters necessary for forming the edging is no data at this time, data of dummy all 0 is supplied. From the raster address decoder 17, an identification number d indicating that the output of the ROM 0 is the data to be displayed is given to the control unit 13. Therefore, the data of the central raster is used as it is as the character data f. The edging data is generated as a logical sum of dot pixel values on the upper, lower, left and right sides of each dot on the central row. Therefore, the edging data g is generated at the fourth to sixth dodd positions from the left, which are indicated by circles.

Similarly, when the raster address is 1, the data is read from each address 0 of the ROM0 to ROM2, the data of the ROM1 is derived as the character data g, and the data is read at the third and seventh dot positions of the central row. Border data f is generated. When the raster address is 3, the pixel value of the rightmost dot of the formed character data is latched in the previous data holding unit 14. This latched data e is used to generate the edging data as shown by the dotted line E in FIG. 3 in the next character area on the right.

In FIG. 1, the character data f and the edging data g obtained from the edging control unit 13 are written in parallel in the shift register 15 for 8 dots respectively, and are read serially by a dot clock. Therefore, the character signal F and the edging signal G as shown in FIG. 3 are obtained from the shift register 15. These signals are supplied to the image display control unit 16 as 2-bit data. The screen display control unit 16 is supplied with data for defining each color of characters, background, and border, and the data of each color is selected based on the 2-bit data F and G and output to the CRT as a display color signal h. To be done. Further, the screen display control unit 16 uses the 2-bit data F,
Based on G, a blanking signal i indicating whether valid data is output is output.

Display characters formed on the CRT screen based on these signals h and i are as shown in FIG. 4, for example. In FIG. 4, a shaded area A is a portion colored with a character, and a circle B is a portion colored with a border. The circle C is a border added to the right end of the character adjacent to the left in the character area on the right. The border control section 13 can be configured by a logic circuit as shown in FIG. This logic circuit, when the character pattern has a dot configuration of vertical 9 (row) × horizontal 8 (column) as in the above example,
Eight blocks B1 to B for processing horizontal 8 dots in parallel
It consists of eight. Each block has data input terminals I0 to I2 corresponding to the outputs of the ROMs 12a to 12c and arranged in the vertical direction for 3 dots (3 rasters). The input terminals I0 to I2 of the first block B1 are connected to the ROMs 12a to 12c (R
The character data s1 corresponding to the first dot (first column) from the left of the parallel output for each 8 dots of OM0-ROM1) is received. Similarly, the input terminals I0 to I of the second block
2 receives the second character data s2 from the left. Similarly, the block Bn handles the Nth (nth column) character data sn.

Input terminals I0 to I2 of the blocks B1 to B8
3, the gate circuit 20 is used to introduce dummy all-zero character data FCCX corresponding to the upper raster when the raster address is 0 as shown in FIG. The gate circuit 20 is also used to introduce dummy all-zero character data LCCX corresponding to the lower raster when the raster address is 8.

The gate circuit 21 connected to the output of the gate circuit 20 is a selection circuit for selecting the output data corresponding to the central raster of the three ROM0 to ROM2, and the identification number d (d0 to d0 supplied from the raster address decoder 17). d
Based on 2), one of the three outputs from the gate circuit 20 is selected and output. The output of the gate circuit 21 is output as character data f1 via the buffer 22.

The gate 23 of each block functions as an OR circuit which forms the edging data g by taking the logical sum of the data of the dot of interest and the data of the four dots in the upper, lower, left and right directions. As typically shown in the second block B2, the 5-input gate 23 receives the three output data of ROM0 to ROM1 in the same block from the gate 20 as vertically arranged data of 3 dots, and also receives the buffer 24. The data q1 from the previous block B1 and the data q3 from the subsequent block B3 are respectively received as left and right data in the horizontal direction. Therefore, edging data q indicating whether or not to add edging at the dot position of interest is obtained from the gate 23.

For the first block B1, the gate 23 for forming the edging data outputs the latch output e of the previous data holding unit 14 indicating whether or not the rightmost dot position of the previous character display area is the character data. Then, the logical sum operation is performed. The above is the case where the character dot configuration is vertical 9 × horizontal 8, but in practice a dot matrix of vertical 18 × horizontal 12 is used. FIG. 6 shows the ROM0 for the latter dot pattern.
Is a data map showing divided storage of character data in ROM2. Even in this case, the character data corresponding to the rasters 0 to 18 are raster-sequentially allocated and stored in the ROM0 to ROM2. From the address decoder 17 shown in FIG.
The ROM addresses supplied to 2a to 12c are 0 to 15, so that the address decoders b0 to b2 have 3 bits each.

FIG. 7 is a decoding explanatory view showing the ROM addresses b0 to b2 and the identification signal d output from the raster address decoder 17. For raster addresses 0 to 17,
Each 3 that takes a value of 0 to 5 according to the data division shown in FIG.
Bit ROM addresses b0 to b2 are formed. The identification signals d0 to d2 become 1 in raster order. In this example, the identification signal output supplied from the raster address decoder 17 is 3 lines, but it may be 2 bit data.

[0025]

According to the present invention, since it is not necessary to store the edging data together with the display dot pattern data in the storage means, the capacity of the storage means may be small, and the dot configuration of characters and figures to be displayed can be reduced. This has the effect that it does not become unnecessarily large to store the border data. Therefore, it is possible to obtain a display control device having a simple structure for displaying high-quality characters and graphics with edging.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment for explaining an embodiment of a display control device.

FIG. 2 is a pattern configuration diagram showing stored contents of a character generator ROM.

FIG. 3 is an explanatory diagram of formation of character data and edging data.

FIG. 4 is an explanatory diagram of a display character pattern with a border.

FIG. 5 is a detailed explanatory diagram of a trimming control unit.

FIG. 6 is a data format showing the stored contents of a character generator ROM.

FIG. 7 is an output explanatory diagram of a raster address decoder.

[Explanation of symbols]

 10 ... VRAM 11 ... Character code latch 12 ... Character generator ROM 13 ... Bordering control unit 14 ... Previous data holding unit 15 ... Shift register 16 ... Image display control unit 17 ... Raster address decoder 18 ... Raster counter

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location G09G 5/36 8121-5G H04N 5/262 7337-5C 5/66 D 7205-5C (72) Invention Satoshi Genma 2-6-1, Marunouchi, Chiyoda-ku, Tokyo Inside Fujitsu Device Co., Ltd.

Claims (3)

[Claims] 1. A storage unit storing display dot patterns of characters, figures and the like, and display data read from the storage unit in correspondence with a row-direction scanning of the display in parallel with the display characters or figures. A trimming control unit for generating trimming data for trimming, wherein the trimming control unit stores data for storing end data in the line direction in the display data one character before, and the display data; With reference to the display data corresponding to the row numbers one and one before and after the row number corresponding to the display data and the output of the data holding means, the display data is displayed at the upper, lower, left and right dot positions of the target dot with respect to the display surface. If there is, there is provided a logical sum means for giving the edging data to the dot of interest, and it is possible to obtain a display of a character or a figure with an edging based on the display data and the edging data. Display control apparatus according to symptoms. 2. The storage unit for storing the display dot pattern is composed of three storage means for storing the display data by dividing the display data in the order of the line numbers, and the display corresponding to the three adjacent rows at the same time from these recording means. The display control device according to claim 1, wherein the display control device is configured to read data. 3. The data of the row numbers sequentially formed corresponding to the row-direction scanning is input, and in order to read the display data corresponding to the three adjacent rows, each of the three storage means is read. 3. The display control device according to claim 2, further comprising a decoder that outputs an address indicating a data storage position and outputs an identification signal indicating display data of a central row among the display data of three adjacent rows. ..