JPH0536964A - Manufacture of monolithic photodiode array - Google Patents

Abstract

PURPOSE:To enable a photoelectric current to be increased while maintaining its crosstalk at less than 10% by arranging plural photodiode elements in parallel on one and the same chip, using particularly a silicon semiconductor substrate having a specific resistance of more than 800OMEGAcm, and making the interval between the elements 280-400mum. CONSTITUTION:An oxide film 2 is formed on the main surface of a silicon semiconductor substrate l to open a desired region. On the opening part, n<+> layers 3 and 4 are formed for ohmic contact. Then, a desired region is opened to form a p<+> layer which becomes a light receiving part. Subsequently, a desired part is opened to deposit an aluminum layer for the formation of a cathode electrode 8 and an anode electrode 9. Hence, a plurality of photodiode elements are arranged in parallel on one and the same chip. Particularly, a semiconductor substrate 1 having a specific resistance of more than 800OMEGAcm is used, and the interval between the elements is arranged to be 280-400mum thereby to increase the photoelectric current and suppress its crosstalk to be less than 10%.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a monolithic photodiode array in which a plurality of photodiodes are arranged in parallel on the same chip, and more specifically, it is preferably used for an optical sensor of an optical rotary encoder. And a method for manufacturing a monolithic photodiode array.

[0002]

2. Description of the Related Art Conventionally, a monolithic photodiode array used for an optical sensor of an optical rotary encoder has been manufactured with a low resistance substrate (resistivity: 50 Ωcm or less) and an element isolation width of 200 μm or less.

FIG. 6 shows a plan view of a monolithic photodiode array manufactured by a general manufacturing process which has been conventionally used, and FIG. 7 shows a sectional view thereof. 6 and 7, 21 is a silicon semiconductor substrate, 22 is an n ⁺ layer, 23 is a p ⁺ layer, 24 is a cathode electrode, and 25 is an anode electrode. In such a monolithic photodiode array, only a specific element of each photodiode formed in parallel on the same chip is externally irradiated with light to generate a photocurrent in the light receiving portion. In this case, there is a drawback that crosstalk occurs in other elements not irradiated with light, especially adjacent elements.

In other words, as shown in FIG. 7, one photodiode a is irradiated with light, and the other photodiode b is irradiated with an appropriate light with the photodiode elements a and b adjacent to each other as a boundary. In addition to blocking the light from shining,
When a reverse bias is applied between the anode electrode and the cathode electrode, an electron-hole pair that contributes to a photocurrent is generated by the irradiation light in the region of the element a irradiated with one light, and the other element is irradiated. Since element b is not irradiated with light,
Although no electron-hole pair is generated in the region, holes generated in the region of element a reach the pn junction surface of element b by diffusion and then move to the p ⁺ layer of element b by drift due to the electric field. , And is taken out as a current from the reverse biased anode electrode 25, and this becomes crosstalk.

[0005]

In the above-mentioned conventional monolithic photodiode array, the element spacing is two.
When the thickness is 00 μm, a low resistance substrate (eg, resistivity: 50 Ωcm) is used to reduce the crosstalk to 10% or less, but the photocurrent is small and there is a practical problem. on the other hand,
High resistance substrate (for example, resistivity: 1000 to 2000 Ωc
When m) is used, a large photocurrent can be obtained, but there is a problem that the crosstalk exceeds 10% and it cannot be used in practice. The present invention is intended to solve the above problems, and an object thereof is to increase photocurrent while keeping crosstalk at 10% or less.

[0006]

Means for Solving the Problems The monolithic structure of the present invention
The manufacturing method of the photodiode array is such that the resistivity of a monolithic photodiode array in which a plurality of photodiode elements are arranged in parallel on the same chip is 80% or less.
It is characterized in that a silicon semiconductor substrate of 0 Ωcm or more is used and an element interval is set to 280 μm to 400 μm.

In the present invention, the element spacing is set to 280 to 40 by reducing the light receiving area of the photodiode.
Expand to 0 μm. Further, the photocurrent per unit area is increased by using a semiconductor substrate having a resistivity of 800 Ωcm or more. It has been found that the crosstalk can be suppressed to 10% or less, and the increase of the photocurrent per unit area exceeds the reduction of the light receiving area, and the photocurrent of the entire photodiode can be increased. The monolithic photodiode array of the present invention has a small crosstalk of 10% or less and a large photocurrent, and thus can be suitably used as an optical sensor of an optical rotary encoder.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a monolithic photodiode array according to the present invention will be described below with reference to FIGS.
Will be described in detail with reference to. 1A to 1D are schematic cross-sectional views sequentially showing the main manufacturing steps of a monolithic photodiode array according to an embodiment of the present invention.

First, an oxide film 2 having a thickness of 1 μm is formed on the main surface of the silicon semiconductor substrate 1 by wet oxidation.
A desired region of the oxide film 2 is opened by the lithography method, and phosphorus is diffused in the opening by the POCl ₃ method,
The n ⁺ layers 3 and 4 for element isolation and ohmic contact of the cathode electrode were formed [FIG. 1 (a)].

Next, the oxide film 2 is removed, an oxide film 5 is newly formed by wet oxidation to have a thickness of 0.6 μm, a desired region is opened by a lithography method, and then PBF is applied to the opening. Boron was diffused by a diffusion method (a method of forming a boron compound coating layer by coating a solution containing a boron-containing compound and then diffusing boron) to form a p ⁺ layer 6 serving as a light receiving portion [FIG. b)].

Next, after removing the oxide film 5, an oxide film 7 of 0.3 μm is formed again by wet oxidation, and a desired portion is opened by a lithography method [FIG.
(C)], an aluminum layer was vapor-deposited by 1 μm by a sputtering method, and a cathode electrode 8 and an anode electrode 9 were formed by a lithography method [FIG. 1 (d)]. FIG. 2 shows a plan view of the monolithic photodiode array manufactured in this way in the case where the element spacing is 300 μm. At this time, the diffusion depth of p ⁺ is 1 μm, and the diffusion depth of the n ⁺ layer is 2 μm.
was μm.

With respect to the monolithic photodiode array manufactured as described above, as in the case of FIG. 7, the photodiode elements a and b adjacent to each other are used as a boundary, and one element a has a standard A Illuminance of 10 using a light source
The device b was irradiated with 00 Lx of light, and the other device b was appropriately shielded from light so that the device was not irradiated with light. Photocurrent was measured for the device a and crosstalk was measured for the device b. However, the results shown in FIGS. 3, 4 and 5 were obtained. In addition, the inside of () in FIG. 4 shows an element space | interval.

In the case where the element spacing is 300 μm as a typical example, the light receiving area of each photodiode element is reduced by 20% as compared with the case where the element spacing is 200 μm.
As is apparent from the above, by using the high resistance substrate having the resistivity of 1000 to 2000 Ωcm, the photocurrent per unit area could be increased by 90%. Therefore, FIG.
As is clear from the figure, the photocurrent of each photodiode element is 5
It has become possible to increase it by 0%. Further, as is clear from FIG. 5, the crosstalk at this time has an element spacing of 3
By setting it to 00 μm, it became possible to suppress it to 10% or less. From FIGS. 3, 4 and 5, the resistivity capable of increasing the photocurrent while keeping the crosstalk at 10% or less is 800 Ωcm or more, and the element spacing is 28.
It is clear that it is 0 μm to 400 μm.

[0014]

As is apparent from the above description, according to the present invention, in the monolithic photodiode array, the resistivity of the silicon semiconductor substrate used is 80%.
By using a high resistance substrate of 0 Ωcm or more, and by reducing the light receiving area of each photodiode element and increasing the element spacing, the photocurrent can be increased and the crosstalk can be reduced to 10% or less with the conventional chip size. It becomes possible to suppress.

[Brief description of drawings]

1A to 1D are schematic cross-sectional views schematically showing main manufacturing steps of a monolithic photodiode array according to an embodiment of the present invention.

FIG. 2 is a schematic plan view of a monolithic photodiode array manufactured in the above.

FIG. 3 is a graph showing the relationship between the substrate resistivity and the photocurrent per unit area of the monolithic photodiode array manufactured as above.

FIG. 4 is a graph showing the relationship between substrate resistivity and photocurrent of the same monolithic photodiode array.

FIG. 5 is a graph showing the relationship between element spacing and crosstalk in the same monolithic photodiode array.

FIG. 6 is a plan view of a monolithic photodiode array manufactured by a commonly used general manufacturing process.

FIG. 7 is a cross-sectional view of a monolithic photodiode array manufactured as above.

[Explanation of symbols]

1 Silicon Semiconductor Substrate 2 Oxide Film 3 n ⁺ Layer 4 n ⁺ Layer 5 Oxide Film 6 p ⁺ Layer 7 Oxide Film 8 Cathode 9 Anode 21 Silicon Semiconductor Substrate 22 n ⁺ Layer 23 p ⁺ Layer 24 Cathode 25 Anode

Claims (1)

Claim: What is claimed is: 1. In a monolithic photodiode array in which a plurality of photodiode elements are arranged in parallel on the same chip, a silicon semiconductor substrate having a resistivity of 800 Ωcm or more is used and the element spacing is 280 μm. ~ 40
A method for manufacturing a monolithic photodiode array, which is characterized in that the thickness is 0 μm.