JPH0536952A - Manufacture of semiconductor base material - Google Patents

Abstract

PURPOSE:To manufacture an Si crystal layer, whose crystallinity as excellent as a single crystal wafer, on a transparent glass base (light transmitting base) and provide temperature control method for manufacturing the Si crystal layer. CONSTITUTION:The method is constituted of a process of making a silicon base porous, a process of forming a non-porous silicon single crystal layer 12 at a first temperature on the porous silicon base 11, a process of laminating the surface of the non-porous silicon single crystal layer with a light transmitting glass base 13. And the method has a process of selectively etching the porous silicon, which removes the porous silicon laminated on the base by electroless wet chemical etching and a process of forming a single crystal silicon layer 14 on the non-porous silicon single crystal layer at a second temperature which is higher than the first temperature by epitaxial growing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a semiconductor substrate, and more particularly, to production of a semiconductor substrate suitable for an electronic device or an integrated circuit formed by dielectric isolation or a single crystal semiconductor layer on an insulator. It is about the method.

[0002]

2. Description of the Related Art The formation of a single crystal Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique, and a device utilizing this SOI technique is not used in a bulk Si substrate for producing a normal Si circuit. Much research has been done because it has many unattainable advantages. In other words, by using SOI technology,
1. 1. Easy dielectric isolation and high integration 2. Excellent radiation resistance 3. 3. Stray capacitance is reduced and high speed is possible. 4. The well process can be omitted. Latch-up can be prevented, 6. Advantages such as a fully depleted field effect transistor can be obtained by thinning the film.

In order to realize the many advantages in device characteristics as described above, a method for forming an SOI structure has been researched for several decades. The contents are summarized in the following documents, for example.

Special Issue: "Single-crystal silic
on on non-single-crystal insula-tors "; edited by
GWCullen, Journal of Crystal Growth, volume63, n
o.3, pp429 to 590 (1983) In addition, SOS (silicon on sapphire) formed by heteroepitaxy Si on a single crystal sapphire substrate by CVD (chemical vapor deposition) has been known for a long time. Although it has been successful as the most mature SOI technology, it has a large number of crystal defects due to the lattice mismatch between the Si layer and the underlying sapphire substrate interface, mixing of aluminum from the sapphire substrate into the Si layer, The widespread application is hindered by the high price and delay in increasing the area.

Relatively recently, attempts have been made to realize SOI structures without the use of sapphire substrates. This attempt is roughly divided into the following two.

1. After the surface of the Si single crystal substrate is oxidized, a window is opened to partially expose the Si substrate, and the portion is used as a seed for lateral epitaxial growth to form a Si single crystal on SiO ₂ (in this case, S on SiO ₂
with i-layer deposition).

2. The Si single crystal substrate itself is used as an active layer, and a SiO ₂ layer is formed thereunder (this method does not involve deposition of a Si layer).

[0008]

As means for realizing the above-mentioned 1, the method for directly laterally epitaxially growing single crystal Si by CVD, or the method for depositing amorphous Si and performing solid phase lateral epitaxial growth by heat treatment. Alternatively, a method in which an amorphous or polycrystalline Si layer is converged and irradiated with an energy beam such as an electron beam or a laser beam, and a single crystal is grown on SiO ₂ by melting recrystallization, or a band-shaped melting is performed by a rod heater. How to scan an area (Zone
Melting Recrystallization) etc. are known.

Each of these methods has merits and demerits, but there are still many problems in controllability, productivity, uniformity, and quality, and none of them has been industrially put into practical use.

For example, the CVD method requires sacrificial oxidation to obtain a flat thin film, and the solid phase growth method has poor crystallinity.

Further, the beam annealing method has problems in processing time by convergent beam scanning, controllability such as beam overlapping and focus adjustment.

Of these, Zone Melting Recrystallizati
The on method is the most mature, and relatively large-scale integrated circuits have been prototyped, but still many crystal defects such as sub-grain boundaries remain, and it has not been possible to create a minority carrier device. .

In the method of the above-mentioned 2 which does not use the Si substrate as seeds for epitaxial growth, the following 3
There are several types of methods.

1. An oxide film is formed on a Si single crystal substrate in which V-shaped grooves are anisotropically etched on the surface, and an oxide film is formed on the oxide film.
After depositing the polycrystalline Si layer as thick as the Si substrate,
By polishing from the surface of the substrate, an Si single crystal region surrounded by V grooves and dielectrically separated is formed on the thick polycrystalline Si layer.

However, in this method, although the crystallinity is good, the step of depositing polycrystalline Si to a thickness of several hundreds of microns thick, the step of polishing the single crystal Si substrate from the back surface, and leaving only the separated Si active layer However, there are problems in terms of controllability and productivity.

2. SIMOX: Seperati
On by Ion Implanted Oxygen) is a method for forming a SiO ₂ layer by ion implantation of oxygen into a Si single crystal substrate, and is the most mature method at present because it has good compatibility with the Si process.

However, in order to form the SiO ₂ layer, it is necessary to implant 10 ¹⁸ ions / cm ² or more of oxygen ions, but the implantation time is long and the productivity cannot be said to be high. Also, the wafer cost is high. Further, many crystal defects remain, and from an industrial viewpoint, the quality is not sufficient to produce a minority carrier device.

3. A method of forming an SOI structure by dielectric isolation by oxidation of porous Si. This method uses P-type Si
An N-type Si layer is formed on the surface of a single crystal substrate by proton ion implantation (Imai et al., J. Cryst. Growth, vol.63, 547 (1983)) or by epitaxial growth and patterning to form islands, and Si islands are formed from the surface. After making only the P-type Si substrate porous by the anodization method in the HF solution so as to surround it,
This is a method of dielectrically separating N-type Si islands by the accelerated oxidation method.

In this method, the separated Si region is
It is decided before the device process, and there is a problem that the degree of freedom in device design may be limited.

Further, on a light-transmissive substrate typified by glass, generally, due to the disorder of the crystal structure, the deposited thin film Si layer is amorphous, reflecting the disorder of the substrate. It is only a good polycrystalline layer, and a high-performance device cannot be manufactured. This is because the crystal structure of the substrate is amorphous, and simply depositing a Si layer cannot obtain a good-quality single crystal layer.

However, the light transmissive substrate which is one of the insulating substrates is important in constructing a contact sensor which is a light receiving element and a projection type liquid crystal image display device, and a pixel (pixel) of the sensor or the display device ( In order to further increase the density, resolution, and definition of picture elements, high-performance driving elements are required. As a result, it is necessary that the device provided on the light-transmitting substrate is also manufactured using a single crystal layer having excellent crystallinity.

Therefore, with amorphous Si or polycrystalline Si, it is difficult to fabricate a driving element having sufficient performance required at present or in the future due to the crystal structure having many defects.

Therefore, there is a problem in that it is difficult to provide an SOI layer having crystallinity similar to that of a Si wafer on a light-transmitting glass substrate which is one of the insulating substrates by any of the above methods.

Next, the porous S which is essential for the method of the present invention.
The removal of the i-layer by chemical etching is discussed.

Generally, P = (2.33−A) /2.33 (1) is called Porosity, and this value can be changed at the time of anodization, and it can be expressed as follows.

P = (m1 −m2) / (m1 −m3) (2) or P = (m1 −m2) / ρAt (3) m1: total weight before anodization m2: total weight after anodization m3 : Total weight after removal of porous Si ρ: Density of single crystal Si A: Area of porosity t: Expressed by the thickness of porous Si, but the area of the area of porosity is accurately calculated There are many cases where it is not possible. In this case, equation (2) is valid, but porous Si must be etched in order to measure m3.

In the epitaxial growth on the porous Si described above, because of the structural property of the porous Si, it is possible to relax the strain generated during the heteroepitaxial growth and suppress the generation of defects. . However, also in this case, it is clear that the Porosity of the porous Si is a very important parameter. Therefore, the above-mentioned measurement of Porosity is indispensable also in this case.

The method for etching porous Si is as follows. Etching porous Si with NaOH aqueous solution (G. Bonchil, R. Herino, K. Barla, and JCPfister, J. El.
ectrochem.Soc., vol.130, no.7, 1611 (1983)). 2.
It is known to etch porous Si with an etchant capable of etching single crystal Si.

In the above method 2, a hydrofluoric nitric acid-based etching solution is usually used, and the Si etching process at this time is Si +2 O → Si O ₂ (4) Si O ₂ +4 HF → Si F ₄ As shown by + H ₂ O (5), Si is oxidized by nitric acid and transformed into SiO ₂ , and the SiO ₂ is etched with hydrofluoric acid, whereby Si etching proceeds.

As a method for etching crystalline Si,
Other than the above-mentioned hydrofluoric / nitric acid-based etching solution, there are ethylenediamine-based, KOH-based, hydrazine-based, and the like.

From the above, in order to perform the selective etching of porous Si, it is necessary to select an etching solution that can etch porous Si other than the above Si etching solution. The conventional selective etching of porous Si is only etching using a NaOH aqueous solution as an etching solution.

Further, as described above, the hydrofluoric / nitric acid-based etching solution etches porous Si, but also has the problem that single crystal Si is also etched.

In the conventional selective etching method of porous Si using an aqueous NaOH solution, adsorption of Na ions on the etching surface is inevitable.

The Na ion is a substance that is a main cause of impurity contamination, is mobile, and only has an adverse effect such as forming an interface state, and must not be introduced in a semiconductor process. (Object of the Invention) It is an object of the present invention to propose a method for producing a semiconductor substrate which can meet the above-mentioned problems and requirements by using the above-mentioned bonding method.

Further, according to the present invention, Si having a crystallinity as excellent as that of a single crystal wafer is formed on a transparent glass substrate (light transmitting substrate).
It is an object of the present invention to propose a method for producing a semiconductor substrate which is excellent in terms of productivity, uniformity, controllability and cost in obtaining a crystal layer.

Further, the present invention aims to realize the advantages of the conventional SOI device and propose a method for manufacturing an applicable semiconductor substrate.

Further, according to the present invention, even when a large-scale integrated circuit having an SOI structure is manufactured, expensive SOS and SIMOX are used.
It is an object of the present invention to propose a method of manufacturing a semiconductor substrate which can be used as an alternative.

Another object of the present invention is to provide a method for selectively and chemically etching porous Si efficiently and uniformly without adversely affecting the semiconductor process and without etching non-porous Si. Is.

[0039]

Means for Solving the Problems The present invention, as means for solving the above problems, comprises a step of making a silicon substrate porous, and non-porous at a first temperature on the porous silicon substrate. Of a porous silicon single crystal layer, a step of bonding the surface of the non-porous silicon single crystal layer to a light-transmissive glass substrate, and the porous silicon of the bonded substrate by electroless wet chemical etching. A step of selectively etching the porous silicon to be removed, and a step of forming a single crystal silicon layer on the non-porous silicon single crystal layer at a second temperature higher than the first temperature by epitaxial growth. The present invention provides a method for producing a semiconductor substrate.

The method for epitaxially growing the single crystal silicon layer at the second temperature is a CVD method.

Further, a first layer is formed on the porous silicon substrate.
The total thickness of the non-porous silicon single crystal layer formed at the above temperature and the single crystal silicon layer formed at the second temperature is 100 μm or less.

Further, the non-porous silicon single crystal layer formed at the first temperature is characterized by being formed by epitaxial growth.

The non-porous silicon single crystal layer formed at the first temperature is selected from the bias sputtering method, the molecular beam epitaxial method, the plasma CVD method, the photo CVD method, the liquid phase growth method and the CVD method. It is formed by a method.

The second temperature is 900 ° C. or higher.

Further, it is characterized in that the etching step is carried out after the portions other than the porous silicon surface are covered with an etching preventing film.

[0046]

According to the present invention, before selective etching,
Growth temperature of non-porous silicon on a porous substrate (first
Temperature) and the single-crystal silicon growth temperature (second temperature) on non-porous silicon after selective etching, a silicon layer having a good single-crystal structure can be formed on the insulator.

The temperature control of the present invention will be described below.

According to observation with a transmission electron microscope, pores having an average diameter of about 600 angstroms are formed in the porous Si layer, and the density thereof is less than half that of single crystal Si. Nevertheless, single crystallinity is maintained, and it is also possible to epitaxially grow a single crystal Si layer on top of the porous layer.

However, if high temperature treatment is performed at this time, the porous Si may be altered, and the characteristics of the enhanced etching may change, and especially at 1000 ° C. or higher, rearrangement of internal pores may occur, resulting in enhanced etching. The characteristics of are impaired. Therefore, the non-porous silicon epitaxial growth of the Si layer on the porous silicon layer needs to be processed at a low temperature.

As such a low-temperature growth method, low-temperature growth such as molecular beam epitaxial growth, plasma CVD, photo CVD method, bias sputtering method, liquid phase growth method, etc. is suitable. Particularly, the bias sputtering method is 300 ° C. This is the most preferable because it enables the epitaxial growth without crystal defects from the low temperature (T.Ohmi, T.Ichikawa, H.Iw
abuchi, andT.Shibata, J.Appl.Phys.vol.66, pp4756-4
766, 1989).

However, in consideration of device formation, a high quality single crystal silicon layer is desired, but at present, the highest quality single crystal silicon layer is 9
It is formed by a CVD method at a substrate temperature of 00 ° C. or higher.

That is, the device region is preferably a single crystal silicon layer grown at a higher temperature by the CVD method than a single crystal silicon layer grown by a low temperature.

Therefore, low temperature growth is preferable for growing the single crystal Si layer on the porous silicon, and high temperature growth is preferable for forming the single crystal Si layer in the device region. It would be preferable to grow a single crystal in two temperature zones with a temperature of two.

Further, according to the present invention, by using the wet chemical etching solution which does not adversely affect the semiconductor process, the porous Si can be selectively chemically etched without etching the crystalline Si. .

In particular, the porous Si selective etching method of the present invention uses hydrofluoric acid (or buffered hydrofluoric acid ... BHF) or hydrofluoric acid (or abbreviated as BHF) which has no etching action on crystalline Si. BHF) with hydrogen peroxide solution, or hydrofluoric acid (or BHF) with alcohol, or hydrofluoric acid (or BHF)
The object of the present invention can be further achieved by using a mixed solution obtained by adding hydrogen peroxide water and alcohol as the selective etching solution.

Hydrogen peroxide in the selective wet chemical etching solution for porous Si of the present invention acts as an oxidant, and the reaction rate can be controlled by changing the ratio of hydrogen peroxide.

The alcohol in the selective wet chemical etching solution for porous Si according to the present invention acts as a surface-active agent and instantaneously removes the bubbles of the reaction product gas from the etching from the etching surface, so that the pores can be uniformly and efficiently porous. It is possible to selectively etch high quality Si. According to the present invention, using a solution used in a normal semiconductor process, crystalline Si is used.
The porous Si mixed in the same substrate can be selectively chemically etched.

Further, the etching selectivity can be enhanced by covering the surface other than the porous silicon surface to be etched with the etching prevention film and then etching.

As this etching prevention film, for example,
It can be formed by depositing 0.1 μm of Si ₃ N ₄ by the plasma CVD method, covering two bonded substrates, and removing only the nitride film on the porous substrate by reactive ion etching.

Further, as the etching prevention film, the same effect can be obtained by coating apiezon wax or electron wax, and only the porous Si substrate can be completely removed. [Embodiment Example] An embodiment example of the present invention will be described below with reference to the sectional process drawing of FIG.

First, as shown in FIG. 1 (a), a Si single crystal substrate 11 is prepared and all of it is made porous. Si
The substrate is made porous by an anodization method using an HF solution. This porous Si layer has a density of single crystal Si of 2.
Compared to 33 g / cm ³ , its density is 50%
~ 1.1% to 0.6g / cm by changing to 20%
It can be changed in the range of ³ .

The porous layer used in the present invention is easily formed on the P-type Si substrate for the following reasons.

Porous Si was prepared according to Uhril et al.
Discovered in the process of electropolishing of semiconductors in 1957 (A.Uhlir, Bell Syst.Tech.J., vol.35, 333 (195
6)).

Further, Unami et al.
, And reported that the anodic reaction of Si in HF solution requires holes, and the reaction is as follows (T. Unagami, J. Electrochem. Soc., vol.127, 476
(1980)).

Si + 2HF + (2-n) e ⁺ → SiF ₂ + 2H ⁺ + ne ^- SiF ₂ + 2HF → SiF ₄ + H ₂ SiF ₄ + 2HF → H ₂ SiF ₆ or Si + 4HF + (4-λ) e ⁺ → SiF ₄ + 4H ⁺ + λe ^- where _{SiF 4 + 2HF → H 2 SiF} 6, e + , e ^- represent a hole and an electron, respectively. Further, n and λ are the numbers of holes required for dissolving Si1 atom, respectively, and porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

From the above, in general, P-type Si containing holes is made porous, but N-type Si is not made porous. This selectivity in porosity has been demonstrated by Nagano et al. And Imai (Nagano, Nakajima, Anno, Onaka, Kajiwara, Technical Report of IEICE, vol.79, SSD7).
9-9549 (1979)), (K. Imai, Solid-State Electron
ics, vol.24,159 (1981)).

The density of the porous layer is reduced to less than half because a large amount of voids are formed inside.
As a result, the surface area is dramatically increased as compared with the volume, so that the chemical etching rate is significantly increased as compared with the etching rate of a normal single crystal layer.

Next, as shown in FIG. 1B, epitaxial growth is performed on the surface of the porous substrate by various low temperature growth methods to form the thin film non-porous silicon single crystal layer 12 at the first temperature. To do.

The first temperature needs to be a temperature at which the porous Si does not deteriorate so that the selective ratio of the porous Si layer and the non-porous silicon single crystal layer by the subsequent selective etching can be sufficiently obtained. If the crystal defects do not occur in the non-porous silicon single crystal layer formed on the porous Si, the temperature is high enough.

Next, as shown in FIG. 1C, a light transmissive substrate 13 is prepared, and the light transmissive substrate 13 is attached to the surface of the non-porous silicon single crystal layer 12 on the porous Si substrate 11. Put on.

After this, the entire porous Si substrate 11 is hydrofluoric acid (or buffered hydrofluoric acid ... hereinafter abbreviated as BHF), or hydrofluoric acid (or BHF) to which hydrogen peroxide solution is added, or Acid (or BHF) with alcohol added, or hydrofluoric acid (or BHF)
As a selective etching solution, a mixed solution of hydrogen peroxide solution and alcohol is added without stirring in the presence of alcohol, or by stirring while stirring in the absence of alcohol to give a porous structure. Only the Si layer 11 is electroless wet-chemically etched to form a thin non-porous silicon single crystal layer 12 on the light-transmissive substrate 13 (FIG. 1D).

Next, as shown in FIG. 1E, a high quality single crystal silicon layer 14 is formed on the non-porous silicon single crystal layer 12 by an epitaxial method at a second temperature.
The substrate temperature at this time does not need to be low, and is preferably higher than the first temperature and formed by a CVD method at 900 ° C. or higher.

FIG. 1 (f) shows a semiconductor substrate obtained by the present invention. That is, the single crystal Si layer 12 + 14 having the same crystallinity as that of the silicon wafer is flatly and uniformly thinned on the light transmissive substrate 13, and is formed in a large area over the entire wafer. The semiconductor substrate thus obtained can be suitably used from the viewpoint of producing an electronic element which is insulated and separated.

The selective etching method for electroless wet chemical etching of only porous Si according to the present invention will be described below.

In the present invention, hydrofluoric acid (or buffered hydrofluoric acid ... abbreviated as BHF hereinafter), hydrofluoric acid (or BHF) to which hydrogen peroxide solution is added, or hydrofluoric acid (or BHF) with alcohol Or a mixture of hydrogen peroxide and alcohol to hydrofluoric acid (or BHF) is used as a selective etching solution without stirring in the presence of alcohol, and in the absence of alcohol. Selective etching is performed by infiltrating while stirring.

FIG. 2 shows 49% of porous Si and single crystal Si.
The etching time dependence of the thicknesses of the porous Si and single crystal Si etched when infiltrated in a mixed solution of hydrofluoric acid, alcohol, and 30% hydrogen peroxide without stirring.

The porous Si is produced by anodizing single crystal Si, and an example of the conditions is shown below.

The porous S formed by anodization
The starting material for i is not limited to single crystal Si, but Si having other crystal structures is also possible.

Applied voltage: 2.6 (V) Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 2.4 ( Time) Thickness of porous Si: 300 (μm) Porosity: 56 (%) The porous Si prepared under the above conditions was 49 at room temperature.
After infiltration with a mixed solution of 10% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10: 6: 50) (white circles) without stirring, the decrease in the thickness of the porous Si was measured.

Porous Si was rapidly etched and 40
107 μm in minutes, and 244 after 80 minutes
The μm also had a high degree of surface property and was uniformly etched. The etching rate depends on the solution concentration and the temperature.

At this time, when hydrogen peroxide solution is added, the oxidation of silicon can be accelerated and the reaction rate can be increased as compared with the case where no addition is made. Further, by changing the ratio of hydrogen peroxide solution, The reaction rate can be controlled.

Further, 500 μm-thick non-porous Si was stirred at room temperature in a mixed solution (10: 6: 50) of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (black circles) without stirring. After infiltration, the reduction in thickness of the non-porous silicon was measured.

The non-porous silicon was etched by 100 angstroms or less even after 120 minutes.

At this time, if alcohol is added, the bubbles of the reaction product gas due to the etching can be instantly removed from the etching surface without stirring, and the porous Si can be uniformly and efficiently etched. .

Porous Si and non-porous Si after etching
The sample was washed with water, and its surface was microanalyzed with secondary ions. No impurities were detected.

The conditions of solution concentration and temperature are porous Si.
The etching rate and the etching selectivity between porous Si and non-porous Si are set within a range that does not practically hinder the manufacturing process.

FIGS. 3 to 9 are views showing the etching time dependence of the thicknesses of porous Si and single crystal Si by other etching solutions, respectively. FIG. 3 shows buffered hydrofluoric acid as an etching solution. Etching characteristics of porous and non-porous Si when a mixed solution of hydrogen peroxide water and alcohol is used.

FIG. 4 shows porous and non-porous Si when a mixed solution of hydrofluoric acid and hydrogen peroxide is used as an etching solution.
Etching characteristics.

FIG. 5 shows the etching characteristics of porous and non-porous Si when a mixed solution of hydrofluoric acid and alcohol is used as an etching solution.

FIG. 6 shows the etching characteristics of porous and non-porous Si when hydrofluoric acid was used as the etching solution.

FIG. 7 shows etching characteristics of porous and non-porous Si when a mixed solution of buffered hydrofluoric acid and alcohol is used as an etching solution.

FIG. 8 shows etching characteristics of porous and non-porous Si when a mixed solution of buffered hydrofluoric acid and hydrogen peroxide solution is used as an etching solution.

FIG. 9 shows the etching characteristics of porous and non-porous Si when buffered hydrofluoric acid was used as the etching solution.

The present invention will be described below with reference to specific examples.

[0095]

Example 1 First, a P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. The current density at this time is
It was 100 mA / cm ² . The porosification rate at this time was 8.4 μm / min. And the entire P-type (100) Si substrate with a thickness of 200 microns was made porous in 24 minutes.

Next, a non-porous single crystal silicon epitaxial layer was grown at a low temperature of 0.05 μm on the P-type (100) porous Si substrate by the bias sputtering method. The deposition conditions are as follows.

(Substrate surface cleaning conditions) RF frequency: 100 MHz High frequency power: 5 W Temperature: 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Cleaning time: 5 minutes Target DC bias: −5 V Substrate DC bias: +5 V (Deposition conditions) ) RF frequency: 100 MHz High frequency power: 100 W Temperature (first temperature): 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Growth time: 4 minutes Growth film thickness: 0.05 μm Target DC bias: −150 V Substrate DC bias + 10V Next, a fused silica glass substrate having the surface of this epitaxial layer optically polished and Si.
By superposing the bases and heating them in an oxygen atmosphere at 600 ° C. for 0.5 hour, the bases were firmly bonded.

Then, 0.1 μm of Si ₃ N ₄ was deposited as an etching prevention film by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was subjected to reactive ion etching. Remove by.

Then, the bonded substrates were mixed with each other by a mixed solution of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10:
The selective etching was performed at 6:50) without stirring.
After 65 minutes, only the non-porous silicon single crystal layer remained without being etched, and the porous Si substrate was selectively etched and completely removed by using the single crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low and was 50 angstroms or less even after 65 minutes, and the selectivity with respect to the etching rate of the porous layer reached 10 5 or more, Etching (several tens of angstroms) in the non-porous layer has a practically negligible film thickness reduction.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching preventive film, 0.05 μm of the fused silica glass substrate was removed. A single crystal Si layer having a thickness could be formed.

Then, a high quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the usual CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation with a transmission electron microscope, B
It was confirmed that new crystal defects were not introduced into the Si layer by the S method and the Si layer by the CVD method, and an SOI structure of about 1 μm thickness in which good crystallinity was maintained was formed.

On the other hand, regarding hole measurement and other electrical characteristics, no difference was observed from the characteristics of ordinary bulk silicon. (Example 2) First, a P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. Current density at this time is 100mA
Was / cm ² . The porosity rate at this time is 8.4μ.
m / min. And the entire P-type (100) Si substrate with a thickness of 200 microns was made porous in 24 minutes.

Next, MBE (Molecular Beam Epitaxy: Molecular) was formed on the P-type (100) porous Si substrate.
A Si epitaxial layer was grown at a low temperature of 0.1 micron by the Beam Epitaxy method. The deposition conditions are
It is as follows.

Temperature (first temperature): 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec Next, a fused silica glass substrate that has been optically polished is superposed on the surface of this epitaxial layer. 70 in an oxygen atmosphere
By heating at 0 ° C for 0.5 hours, both substrates
It was firmly joined.

Next, 0.1 μm of Si ₃ N ₄ was deposited as an etching prevention film by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was made reactive. It was removed by ion etching.

Then, the bonded substrates were mixed with BHF (36% ammonium fluoride and 4.5% hydrofluoric acid) 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide solution (10: 6). : 50), selective etching was performed without stirring. After 205 minutes, only the single crystal Si layer remains without being etched, and the porous Si substrate is selectively etched using the single crystal Si as an etch stop material.
It was completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 205 minutes, it was 50.
It is less than or equal to angstrom, and the selection ratio with respect to the etching rate of the porous layer reaches 10 5 or more.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching prevention film, the SiO ₂ substrate had a thickness of 0.1 μm. A single crystal Si layer was formed.

Then, a high-quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation with a transmission electron microscope, B
It was confirmed that new crystal defects were not introduced into the Si layer formed by the S method and the Si layer formed by the CVD method, and an SOI structure with a thickness of about 1 μm was formed in which good crystallinity was maintained.

On the other hand, regarding hole measurement and other electrical characteristics, no difference was observed from the characteristics of ordinary bulk silicon.

(Embodiment 3) First, a P-type (100) single crystal Si substrate having a thickness of 200 μm is put into HF of 50%.
Anodization was performed in the solution. The current density at this time was 100 mA / cm ² . The porosification rate at this time was 8.4 μm / min. And the entire P-type (100) Si substrate with a thickness of 200 microns was made porous in 24 minutes.

Next, a Si epitaxial layer was grown at a low temperature of 0.1 μm on the P-type (100) porous Si substrate by the plasma CVD method. The deposition conditions are as follows.

Gas: SiH ₄ High frequency power: 100 W Temperature (first temperature): 800 ° C. Pressure: 1 × 10 ^-2 Torr Growth rate: 2.5 nm / sec Next, the surface of this epitaxial layer is optically polished. The fused fused silica substrates prepared above were stacked and placed in a nitrogen atmosphere at 80
By heating at 0 ° C for 0.5 hours, both substrates
It was firmly joined.

Next, 0.1 μm of Si ₃ N ₄ was deposited as an etching prevention film by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was made reactive. It was removed by ion etching.

Then, the bonded substrates were selectively etched with a mixed solution (1: 5) of 49% hydrofluoric acid and 0% hydrogen peroxide while stirring. After 62 minutes, only the single crystal Si layer remains without being etched, and the single crystal Si is etched.
As a material for the stop, the porous Si substrate was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low and was 50 angstroms or less even after 62 minutes, and the selectivity with respect to the etching rate of the porous layer reached 10 5 or more, The etching amount (tens of angstroms) in the non-porous layer is a practically negligible reduction in film thickness.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching preventive film, a 0.1 μm film was formed on the fused silica glass substrate. A single crystal Si layer having a thickness could be formed.

Then, a high quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation with a transmission electron microscope, B
It was confirmed that new crystal defects were not introduced into the Si layer formed by the S method and the Si layer formed by the CVD method, and an SOI structure with a thickness of about 1 μm was formed in which good crystallinity was maintained.

On the other hand, the hole measurement and other electrical characteristics were not different from those of ordinary bulk silicon. Example 4 First, a P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. Current density at this time is 100mA
Was / cm ² . The porosity rate at this time is 8.4μ.
m / min. And the entire P-type (100) Si substrate with a thickness of 200 microns was made porous in 24 minutes.

Next, a Si epitaxial layer was grown at a low temperature of 0.5 μm on the P-type (100) porous Si substrate by a liquid phase growth method. The deposition conditions are as follows.

Solvent: Sn Growth temperature (first temperature): 900 ° C. Growth atmosphere: H ₂ Growth time: 5 minutes Next, the fused silica glass substrate and the Si substrate, which have been optically polished, are superposed on the surface of this epitaxial layer. Together, by heating at 900 ° C. for 0.5 hour in a nitrogen atmosphere, the two substrates were firmly bonded.

Next, 0.1 μm of Si ₃ N ₄ as an etching prevention film was deposited by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was made to be reactive. It was removed by ion etching.

Thereafter, the bonded substrates were selectively etched with a mixed solution of 49% hydrofluoric acid and alcohol (10: 1) without stirring. After 82 minutes, only the single crystal Si layer remains without being etched, and the single crystal Si is etched.
As a material for the stop, the porous Si substrate was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low and was 50 angstroms or less even after 82 minutes, and the selectivity with respect to the etching rate of the porous layer reached 10 5 or more, The etching amount (tens of angstroms) in the non-porous layer is a practically negligible reduction in film thickness.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching prevention film, the thickness of 0.5 μm was formed on the fused silica glass substrate. It was possible to form a single crystal Si layer having

Then, a high quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation with a transmission electron microscope, B
No new crystal defects were introduced into the Si layer formed by the S method and the Si layer formed by the CVD method, and it was confirmed that an SOI structure with a thickness of about 1.5 μm was formed in which good crystallinity was maintained. It was

On the other hand, regarding hole measurement and other electrical characteristics, no difference was observed from the characteristics of ordinary bulk silicon. Example 5 An n-type (10
0) A single crystal Si substrate was anodized in a 50% HF solution. The current density at this time is 100 mA / cm
^{Was 2} .

The rate of porosification at this time was 8.4 μm / m.
in. And an n-type (10
0) The entire Si substrate became porous in 24 minutes.

Then, a Si epitaxial layer of 0.5 is formed on the n-type (100) porous Si substrate by a low pressure CVD method.
Micron low temperature growth. The deposition conditions are as follows.

Source gas: SiH ₄ 800 sccm Carrier gas: H ₂ 150 1 / min Temperature (first temperature): 850 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 3.3 nm / sec Next, this epitaxial layer Optically polished fused silica glass substrates were overlaid on the surface of the
By heating at 0 ° C for 0.5 hours, both substrates
It was firmly joined.

Next, 0.1 μm of Si ₃ N ₄ was deposited as an etching prevention film by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was made to be reactive. It was removed by ion etching.

Then, the bonded substrates were selectively etched with 49% hydrofluoric acid with stirring. After 78 minutes,
Only the single crystal Si layer remains without being etched, and the single crystal S
Using i as the etch stop material, the porous Si substrate was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low and was 50 angstroms or less even after 78 minutes, and the selectivity with respect to the etching rate of the porous layer reached 10 5 or more, The etching amount (tens of angstroms) in the non-porous layer is a practically negligible reduction in film thickness.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching preventive film, a thickness of 0.5 μm was formed on the fused silica glass substrate. It was possible to form a single crystal Si layer having

Next, a high-quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation with a transmission electron microscope, B
No new crystal defects were introduced into the Si layer formed by the S method and the Si layer formed by the CVD method, and it was confirmed that an SOI structure with a thickness of about 1.5 μm was formed in which good crystallinity was maintained. It was

On the other hand, the hole measurement and other electrical characteristics were not different from those of ordinary bulk silicon. (Example 6) A P-type (10
0) A single crystal Si substrate was anodized in a 50% HF solution. The current density at this time is 100 mA / cm
^{Was 2} . The porosity rate at this time was 8.4 μm / m.
in. And a P-type (10
0) The entire Si substrate became porous in 24 minutes.

Next, a non-porous single crystal silicon epitaxial layer was grown at a low temperature of 0.05 micron on the P-type (100) porous Si substrate by the bias sputtering method.
The deposition conditions are as follows. (Substrate surface cleaning conditions) RF frequency: 100 MHz High frequency power: 5 W Temperature: 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Cleaning time: 5 minutes Target DC bias: −5 V Substrate DC bias: +5 V (Deposition conditions) RF frequency : 100 MHz high frequency power: 100 W Temperature (first temperature): 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Growth time: 4 minutes Growth film thickness: 0.05 μm Target DC bias: −150 V Substrate DC bias: +10 V Next Then, the fused silica glass substrate and the Si substrate, which have been optically polished, are superposed on the surface of this epitaxial layer and heated at 600 ° C. for 0.5 hours in an oxygen atmosphere to firmly bond the two substrates. It was

Then, 0.1 μm of Si ₃ N ₄ was deposited as an etching prevention film by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was subjected to reactive ion etching. Removed by.

Thereafter, the bonded substrates were selected with a mixed solution of buffered hydrofluoric acid (36% ammonium fluoride and 4.5% hydrofluoric acid mixed solution) and alcohol (10: 1) without stirring. Etched. After 275 minutes,
Only the non-porous silicon single crystal layer remained unetched, and the porous Si substrate was selectively etched and completely removed using single crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, and even after 275 minutes, the etching rate was 50.
It is less than or equal to angstrom, and the selection ratio with respect to the etching rate of the porous layer reaches 10 5 or more.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching preventing film, the thickness of 0.05 μm was formed on the fused silica glass substrate. It was possible to form a single crystal Si layer having

Next, a high-quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation by a transmission electron microscope, B
It was confirmed that new crystal defects were not introduced into the Si layer formed by the S method and the Si layer formed by the CVD method, and an SOI structure with a thickness of about 1 μm was formed in which good crystallinity was maintained.

On the other hand, regarding hole measurement and other electrical characteristics, there was no difference from the characteristics of ordinary bulk silicon. (Example 7) P-type (10
0) A single crystal Si substrate was anodized in a 50% HF solution. The current density at this time is 100 mA / cm
^{Was 2} . The porosity rate at this time was 8.4 μm / m.
in. And a P-type (1
The entire 00) Si substrate became porous in 24 minutes.

Next, a non-porous single crystal silicon epitaxial layer was grown at a low temperature of 0.05 micron on the P-type (100) porous Si substrate by the bias sputtering method.
The deposition conditions are as follows. (Substrate surface cleaning conditions) RF frequency: 100 MHz High frequency power: 5 W Temperature: 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Cleaning time: 5 minutes Target DC bias: −5 V Substrate DC bias: +5 V (Deposition conditions) RF frequency : 100 MHz high frequency power: 100 W Temperature (first temperature): 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Growth time: 4 minutes Growth film thickness: 0.05 μm Target DC bias: −150 V Substrate DC bias: +10 V Next Then, the fused silica glass substrate and the Si substrate, which were optically polished on the surface of this epitaxial layer, were superposed and heated in an oxygen atmosphere at 600 ° C. for 0.5 hour to firmly bond the two substrates. .

Then, 0.1 μm of Si ₃ N ₄ was deposited as an etching prevention film by the plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was subjected to reactive ion etching. Removed by.

Thereafter, the bonded substrates were mixed with buffered hydrofluoric acid (36% ammonium fluoride and 4.5% hydrofluoric acid mixed aqueous solution) and 30% hydrogen peroxide solution (1 :).
In step 5), selective etching was performed while stirring. After 190 minutes, only the non-porous silicon single crystal layer remained without being etched, and the porous Si substrate was selectively etched and completely removed by using the single crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, and was 50 even after 190 minutes.
It is less than or equal to angstrom, and the selection ratio with respect to the etching rate of the porous layer reaches 10 5 or more.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching preventive film, 0.05 μm of the fused silica glass substrate was removed. A single crystal Si layer having a thickness could be formed.

Next, a high-quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-sectional observation with a transmission electron microscope, B
It was confirmed that new crystal defects were not introduced into the Si layer by the S method and the Si layer by the CVD method, and an SOI structure of about 1 μm thickness in which good crystallinity was maintained was formed.

On the other hand, regarding hole measurement and other electrical characteristics, no difference was observed from the characteristics of ordinary bulk silicon. (Embodiment 8) P type (10
0) A single crystal Si substrate was anodized in a 50% HF solution. The current density at this time is 100 mA / cm
^{Was 2} . The porosity rate at this time was 8.4 μm / m.
in. And a P-type (1
The entire 00) Si substrate became porous in 24 minutes.

Next, a non-porous single crystal silicon epitaxial layer was grown at a low temperature of 0.05 micron on the P-type (100) porous Si substrate by the bias sputtering method. The deposition conditions are as follows. (Substrate surface cleaning conditions) RF frequency: 100 MHz High frequency power: 5 W Temperature: 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Cleaning time: 5 minutes Target DC bias: −5 V Substrate DC bias: +5 V (Deposition conditions) RF frequency : 100 MHz high frequency power: 100 W Temperature (first temperature): 380 ° C. Ar gas pressure: 15 × 10 ⁻³ Torr Growth time: 4 minutes Growth film thickness: 0.05 μm Target DC bias: −150 V Substrate DC bias: +10 V Next Then, the fused silica glass substrate and the Si substrate, which were optically polished on the surface of the epitaxial layer, were superposed and heated in an oxygen atmosphere at 600 ° C. for 0.5 hour, whereby the two substrates were firmly bonded. .

Next, 0.1 μm of Si ₃ N ₄ as an etching prevention film was deposited by plasma CVD method to cover the two bonded substrates, and only the nitride film on the porous substrate was subjected to reactive ion etching. Therefore, it was removed.

After that, the bonded substrates were selectively etched with buffered hydrofluoric acid (36% ammonium fluoride and 4.5% hydrofluoric acid mixed aqueous solution) with stirring. 25
After 8 minutes, only the non-porous silicon single crystal layer remained without being etched, and the porous Si substrate was selectively etched and completely removed by using the single crystal Si as an etch stop material.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 258 minutes.
It is less than or equal to angstrom, and the selection ratio with respect to the etching rate of the porous layer reaches 10 5 or more.

That is, the porous Si substrate having a thickness of 200 μm was removed, and after removing the Si ₃ N ₄ layer as the etching preventive film, a 0.05 μm film was formed on the fused silica glass substrate. A single crystal Si layer having a thickness could be formed.

Next, a high-quality epitaxial Si single crystal film was deposited to a thickness of 1 μm on the non-porous silicon single crystal by the ordinary CVD method. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 1000 sccm Carrier gas: H ₂ ... 230 1 / min Substrate temperature (second temperature): 1080 ° C. Pressure: 80 Torr Growth time: 2 min Further, Si ₃ N as an etching prevention film is used. The same effect can be obtained by coating with apiezon wax or electron wax instead of the _four layers, and only the porous Si substrate can be completely removed.

As a result of cross-section observation with a transmission electron microscope, B
It was confirmed that new crystal defects were not introduced into the Si layer formed by the S method and the Si layer formed by the CVD method, and an SOI structure with a thickness of about 1 μm was formed in which good crystallinity was maintained.

On the other hand, regarding hole measurement and other electrical characteristics, no difference was observed from the characteristics of ordinary bulk silicon.

[0175]

As described in detail above, according to the present invention,
The crystallinity on the light-transmissive substrate is as good as that of a single crystal wafer.
In obtaining the i crystal layer, there is an effect that an excellent method can be obtained in terms of productivity, uniformity, controllability, and economical efficiency.

Further, according to the present invention, it is possible to realize the advantages of the conventional SOI device and propose a method of manufacturing a semiconductor substrate which can be applied.

Further, according to the present invention, even when a large-scale integrated circuit having an SOI structure is manufactured, expensive SOS and SIM are used.
It is possible to propose a method for manufacturing a semiconductor substrate that can be a substitute for OX.

Further, according to the present invention, in the etching of porous Si, a wet chemical etching solution that does not adversely affect the semiconductor process can be used, and the etching of porous Si and non-porous Si can be performed. Since the selection ratio is 5 digits or more, a great effect can be obtained on controllability and productivity.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view for explaining a process of the present invention.

FIG. 2 shows porous and non-porous Si when a mixed solution of hydrofluoric acid, hydrogen peroxide and alcohol is used as an etching solution.
Etching characteristics.

FIG. 3 is an etching characteristic of porous and non-porous Si when a mixed solution of buffered hydrofluoric acid, hydrogen peroxide solution and alcohol is used as an etching solution.

FIG. 4 shows etching characteristics of porous and non-porous Si when a mixed solution of hydrofluoric acid and hydrogen peroxide solution is used as an etching solution.

FIG. 5 is an etching characteristic of porous and non-porous Si when a mixed solution of hydrofluoric acid and alcohol is used as an etching solution.

FIG. 6 shows the etching characteristics of porous and non-porous Si when hydrofluoric acid is used as an etching solution.

FIG. 7 shows etching characteristics of porous and non-porous Si when a mixed solution of buffered hydrofluoric acid and alcohol is used as an etching solution.

FIG. 8 shows porous and non-porous Si when a mixed solution of buffered hydrofluoric acid and hydrogen peroxide solution is used as an etching solution.
Etching characteristics.

FIG. 9 is an etching characteristic of porous and non-porous Si when buffered hydrofluoric acid is used as an etching solution.

[Explanation of symbols]

11 Porous Si substrate 12 Non-porous silicon single crystal layer 13 Light-transmissive glass substrate 14 Epitaxial Si single crystal layer

Claims (9)

[Claims] 1. A step of making a silicon substrate porous, a step of forming a non-porous silicon single crystal layer on the porous silicon substrate at a first temperature, and the non-porous silicon single crystal layer. Bonding the surface of the substrate to a light-transmissive glass substrate, a porous silicon selective etching step of removing the porous silicon of the bonded substrate by electroless wet chemical etching, and the non-porous silicon single crystal Forming a single crystal silicon layer on the layer at a second temperature higher than the first temperature by epitaxial growth. 2. The method for producing a semiconductor substrate according to claim 1, wherein the method for epitaxially growing the single crystal silicon layer at the second temperature is a CVD method. 3. The total thickness of the non-porous silicon single crystal layer formed at a first temperature and the single crystal silicon layer formed at the second temperature on the porous silicon substrate is 1
The method for producing a semiconductor substrate according to claim 1, which has a size of not more than 00 microns. 4. The method for producing a semiconductor substrate according to claim 1, wherein the non-porous silicon single crystal layer formed at the first temperature is formed by epitaxial growth. 5. The non-porous silicon single crystal layer formed at the first temperature is selected from a bias sputtering method, a molecular beam epitaxial method, a plasma CVD method, a photo CVD method, a liquid phase growth method and a CVD method. The method for manufacturing a semiconductor substrate according to claim 1, which is formed by a method. 6. The method for manufacturing a semiconductor substrate according to claim 1, wherein the second temperature is 900 ° C. or higher. 7. The method for producing a semiconductor substrate according to claim 1, wherein the step of making porous is anodization. 8. The method for producing a semiconductor substrate according to claim 7, wherein the anodization is performed in an HF solution. 9. The method for producing a semiconductor substrate according to claim 1, wherein the etching step is performed after the surface other than the porous silicon surface is covered with an etching preventing film.