JP3119384B2 - Semiconductor substrate and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a method for manufacturing the same, and more particularly, to a semiconductor substrate suitable for an electronic device or an integrated circuit formed on a single crystal semiconductor layer on a dielectric isolation or insulator. It relates to a manufacturing method.

[0002]

2. Description of the Related Art The formation of a single-crystal Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique, and has many advantages that cannot be attained by a bulk Si substrate for fabricating a normal Si integrated circuit. Much research has been done because devices using SOI technology have a. That is, by using the SOI technology, 1. Dielectric separation is easy and high integration is possible. 2. Excellent radiation resistance. 3. Higher speed due to reduced stray capacitance. 4. Well step can be omitted; 5. Latch-up can be prevented. Advantages such as the possibility of a fully depleted field-effect transistor by thinning can be obtained.

[0003] In order to realize many of the above advantages in device characteristics, researches have been made on a method of forming an SOI structure for several decades. The contents are summarized in, for example, the following documents. Special
Issue: “Single-crystal si
licon on non-single-cryst
al insulators "; edited by
G. FIG. W. Cullen, Journal of C
rystal Growth, volume63,
no 3, pp 429-590 (1983).

Also, SOS (silicon on sapphire), which is formed by heteroepitaxy of Si on a single-crystal sapphire substrate by CVD (chemical vapor deposition), has been known for a long time. However, a large amount of crystal defects due to the lattice mismatch between the Si layer and the underlying sapphire substrate, the incorporation of aluminum from the sapphire substrate into the Si layer, and above all, the high cost of the substrate The delay in area increase has hindered the spread of applications. In recent years, attempts have been made to realize an SOI structure without using a sapphire substrate. This attempt is roughly divided into the following two.

[0005] 1. After the surface of the Si single crystal substrate is oxidized, a window is opened to partially expose the Si substrate, and the portion is laterally epitaxially grown as a seed to form a Si single crystal layer on SiO ₂ . (In this case, a Si layer is deposited on SiO _2. ) The Si single crystal substrate itself is used as an active layer, and SiO ₂ is formed below the active layer (this method does not involve deposition of a Si layer).

[0006]

As means for realizing the above item 1, a method of directly growing a single crystal layer Si in a lateral direction by CVD, a method of depositing amorphous Si and performing a solid phase lateral epitaxial growth by a heat treatment. A method comprising: converging and irradiating an energy beam such as an electron beam or laser beam onto an amorphous or polycrystalline Si layer to grow a single crystal layer on SiO ₂ by melting and recrystallization; Then, a method of scanning the molten region in a band shape by a rod-shaped heater (Zone melting recrystallized).
zation) is known. Each of these methods has its advantages and disadvantages, but its controllability, productivity, uniformity,
It leaves a great deal of quality problems, and none has been commercialized yet. For example, the CVD method requires sacrificial oxidation to make a thin film flat, and the solid phase growth method has poor crystallinity. In the beam annealing method, a convergent beam is used.
There is a problem in the processing time by beam scanning, the degree of beam overlap, and the controllability such as focus adjustment. Of these, Zone M
Although the eluting recrystallization method is the most mature, and relatively large-scale integrated circuits have been prototyped, a large number of crystal defects such as sub-grain boundaries still remain. Not.

[0007] In the above-mentioned method 2 in which the Si substrate is not used as a seed for epitaxial growth, the following three kinds of methods can be mentioned.

[0008] 1. An oxide film is formed on a Si single crystal substrate having a V-shaped groove anisotropically etched on its surface, and a polycrystalline Si layer is deposited on the oxide film as thick as the Si substrate, and then polished from the back surface of the Si substrate. Thereby, a dielectrically separated Si single crystal region surrounded by V grooves is formed on the thick polycrystalline Si layer.
In this method, the crystallinity is good, but the polycrystalline S
There is a problem in terms of controllability and productivity in the process of depositing i several hundred microns thick and the process of polishing a single crystal Si substrate from the back surface to leave only the separated Si active layer.

[0009] 2. Simox (SIMOX: Sepe
ratio by ion implanted o
xygen) is a method of forming a SiO ₂ layer by ion implantation of oxygen into a Si single crystal substrate, and is the most mature method at present because of its good compatibility with the Si process. However, in order to form a SiO ₂ layer,
Oxygen ions must be implanted at 10 ¹⁸ ions / cm ² or more, but the implantation time is long, the productivity is not high, and the wafer cost is high. In addition, many crystal defects remain, and from an industrial point of view, the quality has not been sufficient to produce a minority carrier device.

[0010] 3. A method of forming an SOI structure by dielectric isolation by oxidation of porous Si. This method uses p-type Si
Proton ion implantation of an n-type Si layer on the surface of the single crystal substrate,
(Imai et al., J. Crystal Growth, vo.
163, 547 (1983)) or an island formed by epitaxial growth and patterning, and only the p-type Si substrate is made porous by anodizing in an HF solution so as to surround the Si layer from the surface. In this method, the n-type Si layer is dielectrically separated by accelerated oxidation. This method has a problem that the Si region to be separated is determined before the device process, which may limit the degree of freedom in device design.

In general, on a light-transmitting substrate represented by glass, reflecting the disorder of the crystal structure, it is generally only amorphous or a good polycrystalline layer. Cannot be created. This is due to the fact that the crystal structure of the substrate is amorphous.
A good single crystal layer cannot be obtained. The light transmissive substrate is important in forming a contact sensor as a light receiving element and a projection type liquid crystal image display device. In order to further increase the density, resolution, and definition of pixels (picture elements) of sensors and display devices, extremely high-performance driving elements are required. As a result, it is necessary that the element provided on the light-transmitting substrate be formed using a single crystal layer having excellent crystallinity.

[0012] Therefore, it is difficult to produce a driving element having required or required performance in amorphous Si or polycrystalline Si due to its crystal structure having many defects.

However, any of the above-described methods using a Si single crystal substrate is not suitable for the purpose of obtaining a high quality single crystal layer on a light transmitting substrate.

An object of the present invention is to propose a method of manufacturing a semiconductor substrate for manufacturing a semiconductor substrate which meets the above-mentioned problems and the above-mentioned requirements.

Another object of the present invention is to provide a method of manufacturing a semiconductor substrate which realizes the advantages of the conventional SOI structure and is applicable.

Another object of the present invention is to propose a method of manufacturing a semiconductor substrate which can be used in place of expensive SOS or SIMOX even when manufacturing a large-scale integrated circuit having an SOI structure.

The present invention is also directed to obtaining Si having excellent crystallinity and surface flatness on an insulating layer as well as a single crystal wafer.
It is an object of the present invention to propose a method for manufacturing a semiconductor substrate which is excellent in productivity, uniformity, controllability, and cost.

Further, the present invention is excellent in productivity, uniformity, controllability, and cost in obtaining Si having excellent crystallinity on a transparent substrate (light-transmitting substrate) as much as a single crystal wafer. It is an object to propose a method for manufacturing a semiconductor substrate.

[0019]

The first method for manufacturing a semiconductor substrate of the invention of the present invention SUMMARY OF] is a substrate having a non-porous monocrystalline semiconductor layer epitaxially grown on the porous monocrystalline semiconductor region, during the epitaxial growth Higher than the temperature of
The surface of the non-porous single-crystal semiconductor layer is flattened by performing a heat treatment in a reducing atmosphere at a temperature not higher than the melting point of the non-porous single-crystal semiconductor layer. A method for manufacturing a semiconductor substrate according to a second aspect of the present invention includes a step of preparing a first substrate having a porous single-crystal semiconductor layer and a non-porous single-crystal semiconductor layer, wherein the first substrate is reduced. Performing a heat treatment in an atmosphere at a temperature equal to or lower than a melting point of the non-porous single-crystal semiconductor layer; and connecting the heat-treated first substrate and second substrate via an insulating layer to the non-porous single-crystal semiconductor layer. A step of attaching a multilayer structure in which the crystalline semiconductor layer is located inside, and a step of removing the porous single-crystal semiconductor layer from the multilayer structure,
And characterized in that: A method for manufacturing a semiconductor substrate according to a third aspect of the present invention includes a step of preparing a first substrate having a porous single-crystal semiconductor layer and a non-porous single-crystal semiconductor layer, wherein the first substrate is reduced. Performing a heat treatment in an atmosphere at a temperature equal to or lower than a melting point of the non-porous single-crystal semiconductor layer; And a step of removing the porous single crystal semiconductor layer from the multilayer structure so as to obtain a multilayer structure in which the layers are located inside.

According to the present invention, an Si single crystal substrate which is excellent in economical efficiency and uniform over a large area and has extremely excellent crystallinity is used. To obtain a Si single crystal layer having extremely few defects on a substrate having an insulating layer on the surface or on a light transmitting substrate.

In particular, the present invention eliminates non-uniform bonding by performing a heat treatment in a reducing atmosphere to make the surface to be bonded to the second substrate flat and smooth like a wafer. A strong and uniform bonding is realized over the entire surface of the substrate.

Embodiment 1 A method for epitaxially growing a single crystal layer after making a Si substrate porous will be described.

As shown in FIG. 1A, first, a Si single crystal substrate 11 is prepared, and all or a single crystal substrate 11 shown in FIG.
A part is made porous as shown in FIG.

The Si substrate is made porous by an anodizing method using an HF solution. The porous Si layer, the monocrystalline Si as compared with the density of 2.33 g / cm ^3, the density of 1.1~0.6g / cm ³ by changing the density of HF solution concentration to 50 to 20% Range. This porous layer is easily formed on a p-type Si substrate for the following reasons. According to observation with a transmission electron microscope, the porous Si layer has holes having an average diameter of about 50 to 600 angstroms.

[0025] Porous Si is manufactured by Uhlir et al.
It was discovered during the research process of electropolishing of semiconductors in 56 (A. Uhril, Bell Syst. Tech.
J. , Vol 35, p. 333 (1956)). In addition, Unagami et al. Studied the dissolution reaction of Si in anodization and reported that the anodic reaction of Si in an HF solution requires holes, and the reaction is as follows (T Unagi: J. Electroc-hem.
c. , Vol. 127, p. 476 (1980)).

Si + 2HF + (2-n) e ⁺ → Si
_{^{F 2 + 2H + + ne -}} SiF 2 + 2HF → SiF 4 + H 2 SiF 4 + 2HF → H 2 SiF 6 or, Si + 4HF + (4- λ) e + → SiF 4 + 4H + +
λe ^- SiF ₄ + 2HF → H ₂ SiF ₆

[0027] Here, e ⁺ and, e ^- respectively represent a positive hole and an electron. Further, n and λ are the number of holes required for dissolving one atom of silicon, respectively, and n> 2 or
It is stated that porous silicon is formed when the condition of λ> 4 is satisfied.

From the above, p-type silicon having holes is easily made porous. In making this porous,
The selectivity has been demonstrated by Nagano et al. And Imai (Nagano, Nakajima, Anno, Onaka, Kajiwara; IEICE Technical Report, vol 79, SSD 79-9549 (197)
9), K. Imai; Solid-State Elec
electronics vol 24,159 (198
1)). As described above, p-type silicon having holes is easily made porous, and p-type silicon can be selectively made porous.

On the other hand, it has been reported that high-concentration n-type silicon also becomes porous (RP Holmstorm, IJ.
Y. Chi Appl. Phys. Lett. Vo
l. 42, 386 (1983)), and it is important to select a substrate that can realize porosity regardless of p and n.

Subsequently, epitaxial growth is performed on the porous substrate surface by various growth methods to form the thin film single crystal layer 12.

According to observation with a transmission electron microscope, pores having an average diameter of about 600 angstroms are formed in the porous Si layer, and the density thereof is less than half that of single crystal Si. Nevertheless, single crystallinity is maintained, and it is also possible to epitaxially grow a single crystal Si layer on top of the porous layer. However, 1000 ° C
In the above epitaxial growth, rearrangement of internal holes occurs, and the characteristics of the accelerated etching are impaired. For this reason,
For the epitaxial growth of the Si layer, low-temperature growth such as molecular beam epitaxial growth, plasma CVD, thermal CVD, optical CVD, bias sputtering, and liquid phase growth is preferable.

Further, in the above-described epitaxial growth on porous Si, the porous Si has a structural property, so that strain generated during heteroepitaxial growth can be relaxed to suppress generation of defects. .

As shown in FIGS. 1 (a) and 4 (a), when epitaxial growth is performed on a porous material, the surface of the thin film single crystal layer is roughened depending on the shape of the porous material, and a second substrate described later is used. In some cases, the thin film single crystal layer is locally peeled off due to a heat treatment step or an etching step even if the thin film single crystal layer is not suitable for bonding.

In the present invention, after a thin film single crystal layer is formed on a porous material, the substrate on which the thin film single crystal layer has been formed is subjected to a heat treatment in a reducing atmosphere, as shown in FIGS. 1 (b) and 4 (b). As shown, the surface of the thin film single crystal silicon layer is flattened.

The present inventors have studied in detail the cause of the bonding defect and have found that one of the causes is the roughening of the bonding surface. As a result of examining a method using heat treatment for the removal of minute roughness on the surface of the thin film single crystal, the heat treatment in a reducing atmosphere was performed at a temperature equal to or lower than that of the device process without reducing the film thickness. It has been found that the roughness of the silicon single crystal surface can be removed. Here, the reducing atmosphere is
For example, an atmosphere containing hydrogen or a hydrogen atmosphere can be given. However, it is not limited to this. When the change in surface roughness due to heat treatment was observed in detail using a high-resolution scanning electron microscope or atomic force microscope while changing the atmosphere, the surface irregularities before heat treatment were reduced by heat treatment in a reducing atmosphere. It has been found that a single-crystal thin layer having a flat surface can be obtained. Moreover, when the surface roughness is removed by polishing or the like, the thickness of the single crystal layer may be distributed in the plane in some cases. However, in the case of the heat treatment in a reducing atmosphere of the present invention, minute unevenness is generated. Is removed, but the film thickness distribution does not change.

Observation of the fine structure of the surface of the non-porous silicon single crystal layer shows that the height is several nm to several tens nm, and several nm.
From several hundred nm period may be observed,
It was found that by performing the heat treatment in a reducing atmosphere, a level surface having a height difference of at most several nm or less and a flat surface as small as a single crystal silicon wafer having a thickness of at most 2 nm can be obtained if the conditions are adjusted. This phenomenon is considered to be a surface reconstruction rather than an etching. That is, in the rough surface, there are countless ridge-like portions having high surface energy, and many surfaces having higher plane orientations are exposed on the surface as compared with the plane orientation of the crystal layer. The surface energy of the region is higher than the surface energy in the plane orientation of the surface of the first substrate. In a heat treatment in a reducing atmosphere, for example, a natural oxide film on the surface is removed by a heat treatment in a hydrogen atmosphere due to a reducing action of hydrogen, and is constantly removed and does not adhere again during the heat treatment, so that the energy barrier for the movement of surface Si atoms is lowered. It is considered that Si atoms excited by thermal energy move to form a flat surface with low surface energy.

As a result, in a nitrogen atmosphere or a rare gas atmosphere, the surface is sufficiently flattened even at a temperature of 1200 ° C. or less so that the surface is not flattened. The flattening temperature according to the present invention depends on the gas composition, pressure, etc., but it is effective at about 300 ° C. or higher but not higher than the melting point, more preferably at 500 ° C. or higher, especially 1200 ° C. or lower. The flattening is promoted at a higher pressure as the pressure is higher as the reducing property is higher. However, the pressure is generally equal to or lower than the atmospheric pressure, and more preferably equal to or lower than 200 Torr.

Further, this phenomenon starts when heat treatment is performed with the surface being clean. When a natural oxide film is thickly formed on the surface, the progress of this phenomenon occurs before the heat treatment. Is etched or removed by dilute hydrofluoric acid or the like, so that the start of surface flattening is accelerated.

As shown in FIGS. 1 (c) and 4 (c), as the substrate, for example, a substrate having an insulating layer disposed on the surface of a base material such as a silicon substrate, or a light-transmitting substrate represented by glass 13 is prepared, and the surface of the single crystal Si layer on the porous Si substrate is adhered to the surface of the base.

Prior to bonding, an interface between the single crystal silicon layer and the insulating layer may be formed in advance by forming an oxide layer on the surface of the single crystal Si layer on the porous Si. The oxide layer plays an important role in making a device. That is, the interface level generated by the underlying interface of the Si active layer can be lower at the underlying interface formed by oxidizing the single crystal silicon layer than at the bonding interface, especially at the glass interface. By separating from the active layer, a level that may be generated at the bonding interface can be kept away, so that the characteristics of the electronic device are significantly improved. Further, an oxide layer may be formed on the surface of the single crystal Si layer on the porous Si, and may be bonded to an arbitrary substrate such as a Si substrate.

Thereafter, the entire porous Si substrate 15 is removed by chemical etching, and as shown in FIG.
The thin single-crystal silicon layer is formed on a substrate having an insulating layer on its surface or on a light-transmitting substrate while remaining.
Prior to the etching, an etching prevention film is formed as necessary. For example, a Si ₃ N ₄ layer is deposited, the whole of the two bonded substrates is covered, and the Si ₃ N ₄ layer on the surface of the porous silicon substrate is removed. Apiezon wax may be used instead of the Si ₃ N ₄ layer as another etching prevention film.

Since the porous layer has a large amount of voids formed therein, the density decreases to less than half. as a result,
Since the surface area is dramatically increased as compared to the volume, the chemical etching rate is significantly increased as compared with the etching rate of a normal single crystal layer.

The method for etching porous Si is as follows. Etch porous Si with aqueous NaOH solution (G. Bonchil, R. Herino, K. Barr)
la, and j. C. Pfister, J.M. Ele
trochem. Soc. , Vol. 130, no.
7, 1611 (1983)). 2. Etch porous Si with an etchant capable of etching single crystal Si. It has been known.

In the above method 2, an etching solution of a hydrofluoric / nitric acid system is usually used. The etching process of Si at this time is as follows: Si + 2O → SiO ₂ (10) SiO ₂ + 4HF → SiF ₄ + H ₂ O (11) as shown in, Si is oxidized by nitric acid, and transformed into SiO _2, the etching of Si proceeds by etching the SiO ₂ with hydrofluoric acid.

Similarly, as a method for etching crystalline Si, there are an ethylenediamine-based KOH-based hydrazine-based method and the like in addition to the above-mentioned hydrofluoric-nitric acid-based etchant.

An important method for selectively etching porous Si which is particularly effective in the present invention is to use hydrofluoric acid or buffered hydrofluoric acid having no etching effect on crystalline Si. In this etching, hydrogen peroxide acting as an oxidizing agent may be further added. Hydrogen peroxide acts as an oxidizing agent, and the reaction rate can be controlled by changing the ratio of hydrogen peroxide. Further, an alcohol acting as a surfactant may be added. Alcohol acts as a surface active agent, instantaneously removes bubbles of a reaction product gas from the etching surface, and enables uniform and efficient selective etching of porous Si.

When the porous Si is formed only on a part of the substrate as in the steps shown in FIGS. 4A to 4C, grinding, which is usually used in the Si wafer manufacturing step, is performed until the porous layer is exposed. After removing the non-porous Si layer on the back surface side of the substrate on which the porous layer has been formed by polishing, etching with a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, or a combination thereof (FIG. 4D) 4), the porous silicon is removed by the above-described chemical etching, and as shown in FIG. 4E, a single-crystal silicon layer thinned on a substrate having an insulating layer on its surface or on a light-transmitting substrate. Are formed.

FIGS. 1D and 4E show a semiconductor substrate obtained by the present invention. That is, a single-crystal Si layer 12 having a crystallinity equivalent to that of a silicon wafer is uniformly thinned on a substrate having an insulating layer on the surface or a light-transmitting substrate 13, and a large area is provided over the entire wafer. It is formed.

The semiconductor substrate thus obtained can be suitably used from the viewpoint of producing an insulated electronic element.

Embodiment 2 Hereinafter, a method for manufacturing a semiconductor substrate according to the present invention will be described in detail with reference to the drawings.

FIGS. 3A to 3E are process diagrams for explaining a method of manufacturing a semiconductor substrate according to the present invention, which are shown as schematic cross-sectional views in each process.

First, as shown in FIG. 3A, a low impurity concentration layer 32 is formed by epitaxial growth using various thin film growth methods. Alternatively, protons are ion-implanted into the surface of the p-type Si single-crystal substrate 31 to form the n-type single-crystal layer 32.

Next, as shown in FIG.
The single crystal substrate 31 is transformed from the rear surface into porous Si33 by an anodizing method using an HF solution. This porous S
The i-layer is changed in density from 1.1 to 0.6 g / cm ³ by changing the density of the HF solution to 50 to 20% compared to the density of single crystal Si of 2.33 g / cm ^3. Can be done. This porous layer, as described above,
Formed on a p-type substrate.

Thereafter, in the same manner as in the first embodiment, the substrate having the non-porous single-crystal silicon layer is heat-treated in a reducing atmosphere to improve the surface roughness (FIG. 3).
(C)) As shown in FIG. 3 (d), a substrate 34 having an insulating layer on its surface is prepared, and a single crystal S on a porous Si substrate is prepared.
The second substrate 34 is attached to the surface of the i-layer or the oxidized surface of the single-crystal Si layer. Further, an oxide layer may be formed on the surface of the single crystal Si layer on the porous Si, and may be bonded to an arbitrary substrate such as a Si substrate.

As shown in FIG. 3 (e), porous S
The entire porosity of the i-substrate 33 is removed by etching, and a thin single-crystal silicon layer is formed and left on a substrate having an insulating layer on the surface.

FIG. 3E shows a semiconductor substrate obtained by the present invention as shown in FIG. That is, a single-crystal Si layer 32 having a crystallinity equivalent to that of a silicon wafer is uniformly thinned on a substrate having an insulating layer on its surface or on a light-transmitting substrate 34, and formed over a large area over the entire wafer. Is done.

The semiconductor substrate thus obtained can be suitably used from the viewpoint of producing an insulated electronic device.

The above is a method in which an n-type layer is formed before making the substrate porous, and thereafter only the p-type substrate is selectively made porous by anodizing.

[0059]

The present invention will be described below with reference to specific examples.

(Example 1) A p-type (100) single crystal Si substrate having a thickness of 600 microns was anodized in a 50% HF solution for 20 minutes. The current density at this time was 12 mA / cm ² . At this time, the rate of making porous is 1.1 μm / min. The p-type (100) Si substrate having a thickness of 600 microns was made porous by about 20 μm.

CV is applied on the p-type (100) porous Si substrate.
By the D method, a Si epitaxial layer was grown by 2 μm. The deposition conditions are as follows.

Temperature: 950 ° C. Pressure: 80 Torr Gas: SiH ₂ Cl ₂ / H ₂ ; 0.5 / 180 (l / mi)
n. ) Growth rate: 0.33um / sec

Thereafter, in a hydrogen atmosphere, at 950 deg.
Heat treatment was performed at 80 Torr. The flatness of the surface of this sample was evaluated by an atomic force microscope. As a result, the surface roughness was as good as 1.5 nm with a roughness of 20 nm before hydrogen treatment.

Next, the surface of this epitaxial layer was
nm. A single crystal silicon substrate was superposed on the thermal oxide film and heated at 1000 ° C. for 2 hours in a nitrogen atmosphere, whereby both substrates were firmly joined.

Thereafter, the nonporous silicon substrate region was removed by grinding the porous substrate side from the back surface, exposing the porous layer. Thereafter, the bonded substrates are selectively etched without stirring with a mixed solution of hydrofluoric acid, alcohol and aqueous hydrogen peroxide (10: 6: 50). After 20 minutes, only the single crystal Si layer remained without being etched, and the porous Si substrate was selectively etched using the single crystal Si as a material for the etch stop, and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, and was 40
The selectivity with the etching rate of the porous layer reaches about 10 times or more, and the etching amount (several tens of angstroms) in the non-porous layer is a practically negligible decrease in film thickness. That is, the porous Si substrate having a thickness of 200 microns is removed,
0.5 on a silicon substrate having a silicon oxide layer on the surface
A single-crystal Si layer having a thickness of μm could be formed uniformly without any loss of the single-crystal Si layer. When the heat treatment in hydrogen was not performed, the number of unbonded areas was as large as 50 pieces / cm ^2, but was drastically reduced to 0.5 / cm ² .

As a result of observation of a cross section by a transmission electron microscope, no new crystal defects were introduced into the Si layer.
It was confirmed that good crystallinity was maintained.

(Example 2) A p-type (100) single crystal Si substrate having a thickness of 200 microns was anodized in a 50% HF solution. The current density at this time is 11
It was 0 mA / cm ² . The porosity rate at this time is
8.7 μm / min. The entire p-type (100) Si substrate having a thickness of 200 microns was made porous in 23 minutes.

The MB was placed on the p-type (100) porous Si substrate.
E (Molecular Beam Epitaxy: Molecular Beam)
The Si epitaxial layer was grown at a low temperature of 0.5 μm by the (M Epitaxy) method. The deposition conditions are as follows.

Temperature: 700 ° C. Pressure: 5 × 10 ⁻⁸ Torr Growth rate: 0.1 nm / sec

Thereafter, in a hydrogen atmosphere, at 950 deg.
Heat treatment was performed at 80 Torr. The flatness of the surface of this sample was evaluated by an atomic force microscope. As a result, the roughness of the surface was as good as 1.5 nm when the roughness before hydrogen treatment was 15 nm.

Next, the surface of this epitaxial layer was
0 nm was thermally oxidized. A single crystal silicon substrate is superposed on the thermal oxide film by a thermal oxidation method,
By heating at 2 ° C. for 2 hours, both substrates were firmly joined.

[0086] Si ₃ N ₄ is reduced to 0.
1 μm is deposited, and the two bonded substrates are covered,
Only the nitride film on the porous substrate is removed by reactive ion etching.

After that, the bonded substrates were mixed with a mixed solution of buffered hydrofluoric acid, alcohol and hydrogen peroxide solution (10:
6:50), selective etching is performed without stirring.
After 204 minutes, only the single crystal Si layer remains without being etched, and the single crystal Si is used as an etch stop material.
The porous Si substrate was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, and the etching rate was 4 minutes even after 204 minutes.
The selectivity with respect to the etching rate of the porous layer reaches about 10 times or more, and the etching amount (several tens of angstroms) in the non-porous layer is a film thickness reduction that can be ignored in practical use. That is, the porous Si substrate having a thickness of 200 microns is removed, and after the Si ₃ N ₄ layer is removed, the silicon substrate having a silicon oxide layer on the surface has a thickness of 0.5 μm. A single-crystal Si layer was formed with almost no loss.

As a result of observation of a cross section with a transmission electron microscope, no new crystal defects were introduced into the Si layer.
It was confirmed that good crystallinity was maintained.

Example 3 A p-type (100) single crystal Si substrate having a thickness of 200 microns was anodized in a 50% HF solution. The current density at this time is 11
It was 0 mA / cm ² . The porosity rate at this time is
8.7 μm / min. The entire p-type (100) Si substrate having a thickness of 200 microns was made porous in 23 minutes.

A 5 μm low-temperature Si epitaxial layer was grown on the p-type (100) porous Si substrate by plasma CVD. The deposition conditions are as follows.

Gas: SiH ₄ High frequency power: 120 W Temperature: 800 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 2.7 nm / sec

Thereafter, in a hydrogen atmosphere, 1000 deg.
The heat treatment was performed at 760 Torr at a temperature of 760 Torr. The flatness of the surface of this sample was evaluated by an atomic force microscope. As a result, the roughness of the surface became good, with a roughness of 25 nm before hydrogen treatment being 1.6 nm.

Next, the surface of this epitaxial layer was
nm. An optically polished fused silica substrate is superimposed on the thermal oxide film,
By heating at 400 ° C. for 20 hours in an oxygen atmosphere, both substrates were firmly joined.

Thereafter, the bonded substrates are selectively etched while being stirred with a mixed solution (1: 5) of hydrofluoric acid and hydrogen peroxide solution. After 62 minutes, only the single-crystal Si layer remained without being etched, and the porous Si substrate was selectively etched using the single-crystal Si as a material for the etch stop and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 62 minutes.
The selectivity with the etching rate of the porous layer reaches about 10 times or more, and the etching amount (several tens of angstroms) in the non-porous layer is a practically negligible decrease in film thickness. That is, the porous Si substrate having a thickness of 200 microns is removed,
A single-crystal Si layer having a thickness of 5 μm was uniformly formed on the fused quartz substrate without any loss of the single-crystal Si layer.

As a result of observation of a cross section by a transmission electron microscope, no new crystal defects were introduced into the Si layer.
It was confirmed that good crystallinity was maintained.

Example 4 A p-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. The current density at this time is 11
It was 0 mA / cm ² . The porosity rate at this time is
8.7 μm / min. The entire p-type (100) Si substrate having a thickness of 200 microns was made porous in 23 minutes.

CV was applied on the p-type (100) porous Si substrate.
By the method D, a Si epitaxial layer was grown at a low temperature of 1 micron. The deposition conditions are as follows.

Gas: SiH ₄ (0.6 l / min), H ₂
(100 l / min) Temperature: 850 ° C. Pressure: 40 Torr Growth rate: 0.3 μm / min

Thereafter, in a hydrogen atmosphere, 900 deg.
Heat treatment was performed at 10 Torr. When the flatness of the surface of this sample was evaluated by an atomic force microscope, the roughness of the surface was as good as 1.6 nm with a roughness of 18 nm before the hydrogen treatment.

Next, the surface of this epitaxial layer was
nm. Optical polishing was performed on the thermal oxide film.
A glass substrate having a softening point near 00 ° C. was overlaid and heated at 450 ° C. for 0.5 hour in an oxygen atmosphere, whereby both substrates were firmly joined.

Then, the bonded substrates were mixed with a mixed solution of buffered hydrofluoric acid, alcohol and aqueous hydrogen peroxide (10:
6:50), selective etching is performed without stirring.
After 204 minutes, only the single crystal Si layer remains without being etched, and the single crystal Si is used as an etch stop material.
The porous Si substrate was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 204 minutes.
The selectivity with respect to the etching rate of the porous layer reaches about 10 times or more, and the etching amount (several tens of angstroms) in the non-porous layer is a film thickness reduction that can be ignored in practical use. That is, the porous Si substrate having a thickness of 200 microns is removed,
Single crystal S having a thickness of 1 μm on a low softening point glass substrate
The i-layer could be formed uniformly without any loss of single-crystal Si.

As a result of observation of a cross section with a transmission electron microscope, no new crystal defects were introduced into the Si layer.
It was confirmed that good crystallinity was maintained.

(Example 5) A p-type (100) single-crystal Si substrate having a thickness of 525 microns was anodized in a 50% HF solution for 20 minutes. The current density at this time was 12 mA / cm ² . At this time, the rate of making porous is 1.1 μm / min. The p-type (100) Si substrate having a thickness of 525 microns was made porous by 20 μm.

The porous substrate is placed in an oxygen atmosphere for 3 hours.
Heat treatment was performed at 00 ° C. for 1 hour.

On the p-type (100) porous Si substrate, a Si epitaxial layer was grown at a low temperature of 5.0 μm by bias sputtering. The deposition conditions are as follows.

RF frequency: 100 MHz High frequency power: 600 W Temperature: 300 ° C. Ar gas pressure: 8 × 10 ⁻³ Torr Growth time: 120 minutes Target DC bias: −200 V Substrate DC bias: +10 V

Thereafter, in a hydrogen atmosphere, 900 deg.
Heat treatment was performed at 10 Torr. When the flatness of the surface of this sample was evaluated by an atomic force microscope, the roughness of the surface was as good as 1.4 nm with a roughness of 13 nm before the hydrogen treatment.

Next, a 500 nm silicon oxide layer was formed on the surface of the epitaxial layer by a thermal oxidation method. An Si substrate is superimposed on the thermal oxide film, and is placed in a nitrogen atmosphere for 1 hour.
By heating at 000 ° C. for 2 hours, both substrates are
Strongly joined.

Thereafter, the nonporous silicon substrate region was removed by grinding the porous substrate side from the back surface, exposing the porous layer.

Thereafter, the bonded substrate was mixed with a mixed solution of buffered hydrofluoric acid, alcohol and hydrogen peroxide solution (10:
6:50), selective etching is performed without stirring.
After 20 minutes, only the single crystal Si layer remained without being etched, and the porous Si substrate was selectively etched using the single crystal Si as a material for the etch stop, and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 204 minutes.
The selectivity with respect to the etching rate of the porous layer reaches about 10 times or more, and the etching amount (several tens of angstroms) in the non-porous layer is a film thickness reduction that can be ignored in practical use. That is, the porous Si substrate having a thickness of 200 microns is removed, and a 0.7 nm oxide layer is formed on the Si substrate via a 500 nm oxide layer.
A single-crystal Si layer having a thickness of 5 μm was formed without any omission.

As a result of observation of a cross section with a transmission electron microscope, no new crystal defects were introduced into the Si layer.
It was confirmed that good crystallinity was maintained.

(Example 6) A p-type (100) single crystal Si substrate having a thickness of 600 microns was anodized in a 50% HF solution. The current density at this time is 14
mA / cm ² . At this time, the rate of making porous is as follows.
3 μm / min. The p-type (100) Si substrate having a thickness of 600 μm was made porous to 20 μm.

A 10 μm low-temperature Si epitaxial layer was grown on the p-type (100) porous Si substrate by a liquid phase growth method. The growth conditions are as follows.

Solvent: Sn Growth temperature: 900 ° C. Growth atmosphere: H ₂ Growth time: 20 minutes

Thereafter, in a hydrogen atmosphere, at 950 deg.
Heat treatment was performed at 80 Torr. The flatness of the surface of this sample was evaluated by an atomic force microscope. As a result, the roughness of the surface was as good as 1.8 nm with a roughness of 30 nm before hydrogen treatment.

On the surface of the Si epitaxial layer, 1 μm
The single-crystal silicon substrates on which the silicon oxide layers were formed were superimposed and heated in a nitrogen atmosphere at 700 ° C. for 5 hours, whereby both substrates were firmly joined.

Thereafter, the nonporous silicon substrate region was removed by grinding the porous substrate side from the back surface, exposing the porous layer.

Thereafter, the bonded substrate was mixed with a mixed solution of buffered hydrofluoric acid, alcohol and aqueous hydrogen peroxide (10:
6:50), selective etching is performed without stirring.
After 20 minutes, only the single crystal Si layer remained without being etched, and the porous Si substrate was selectively etched using the single crystal Si as a material for the etch stop, and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 20 minutes.
Angstrom or less, the selectivity with respect to the etching rate of the porous layer reaches more than ten-fiveth power, and the etching amount (several tens of angstroms) of the non-porous layer is a film thickness decrease that can be ignored in practical use. That is, the porous S
The i-substrate was removed, and a single-crystal Si layer having a thickness of 10 μm was formed on the silicon substrate having the participation layer on the surface without any omission.

As a result of observation of a cross section with a transmission electron microscope, no new crystal defects were introduced into the Si layer.
It was confirmed that good crystallinity was maintained.

Example 7 An n-type Si layer was formed to a thickness of 1 μm on the surface of a p-type (100) Si substrate having a thickness of 200 μm by ion implantation of protons. The H ⁺ implantation dose was 5 × 10 ¹⁵ (ions / cm ² ). This substrate was anodized in a 50% HF solution.
The current density at this time was 100 mA / cm ² . At this time, the rate of making porous is 8.4 μm / min. And
The entire p-type (100) Si substrate having a thickness of 200 microns was made porous in 24 minutes. As described above, in this anodization, only the p-type (100) Si substrate was made porous and the n-type Si layer did not change.

Thereafter, in a hydrogen atmosphere, at 950 deg.
Heat treatment was performed at 80 Torr. When the flatness of the surface of this sample was evaluated by an atomic force microscope, the roughness of the surface was as good as 1.1 nm with a roughness of 13 nm before the hydrogen treatment.

Next, the surface of the n-type single crystal layer is
Thermally oxidized. An optically polished fused silica glass substrate is superimposed on the thermal oxide film, and is placed at 800 ° C. in an oxygen atmosphere.
By heating for 0.5 hour, both substrates were firmly joined.

0.1 μm of Si ₃ N ₄ is formed by a low pressure CVD method.
Then, the two substrates that have been deposited and adhered are covered, and only the nitride film on the porous substrate is removed by reactive ion etching. After that, the bonded substrates were mixed with a mixed solution of buffered hydrofluoric acid, alcohol and hydrogen peroxide solution (10:
6:50), selective etching is performed without stirring.
After 204 minutes, only the single crystal Si layer remains without being etched, and the single crystal Si is used as an etch stop material.
The porous Si substrate was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution was extremely low, even after 204 minutes.
The selectivity with respect to the etching rate of the porous layer reaches about 10 times or more, and the etching amount (several tens of angstroms) in the non-porous layer is a film thickness reduction that can be ignored in practical use. That is, the porous Si substrate having a thickness of 200 μm is removed, and after removing the Si ₃ N ₄ layer, a single-crystal Si layer having a thickness of 1.0 μm is formed on the fused quartz glass substrate. Was uniformly formed without any partial omission.

The same effect can also be obtained when apiesone wax or electron wax is applied instead of the Si ₃ N ₄ layer, and only the porous Si substrate can be completely removed.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

[0119]

As described in detail above, according to the present invention,
It is possible to propose a method of manufacturing a semiconductor substrate for manufacturing a semiconductor substrate which can meet the above-mentioned problems and the above-mentioned requirements.

According to the present invention, a substrate having an insulating layer on the surface or a light-transmissive insulator substrate represented by glass is formed on a single-crystal wafer having crystallinity and surface flatness.
Productivity, uniformity,
An excellent method in terms of controllability and economy can be provided.

In particular, according to the present invention, since the surface of the single-crystal silicon thin layer can be flattened, the yield of the single-crystal silicon thin layer having a rough surface can be easily and uniformly formed with the second substrate. It is possible to bond well. In addition, since the surface of the single-crystal silicon thin layer can be flattened without reducing the thickness of the single-crystal silicon thin layer such as polishing or etching, the film of the single-crystal silicon thin layer can be formed in the substrate plane. Variation in thickness can be reduced.

Further, according to the present invention, it is possible to realize the advantages of the conventional SOI device and propose a method of manufacturing a semiconductor substrate which can be applied.

According to the present invention, even when a large-scale integrated circuit having an SOI structure is manufactured, an expensive SOS or SIM is required.
It is possible to propose a method for manufacturing a semiconductor substrate which can be substituted for OX.

According to the present invention, a high-quality single-crystal Si substrate is used as a starting material, and a single-crystal layer is left only on the surface, and the lower Si substrate is chemically removed to form a light-transmissive insulator substrate. As described in detail in the embodiment, it is possible to perform many processes in a short time, and there is a great improvement in productivity and economic efficiency.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining a process of the present invention.

FIG. 2 is a graph showing etching characteristics of porous and non-porous Si.

FIG. 3 is a schematic diagram for explaining a process of the present invention.

FIG. 4 is a schematic diagram for explaining a process of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Substrate 12 Non-porous Si single crystal layer 13 Substrate 14 Silicon oxide film 15 Porous silicon 16 Rough surface 17 Flat surface 31 p-type Si single crystal substrate 32 Low impurity concentration layer or n-type single crystal layer 33 Porosity Porous silicon 34 Base 35 Rough surface 36 Flat surface 41 Substrate 42 Non-porous Si single crystal layer 43 Base 44 Silicon oxide film 45 Porous silicon 46 Rough surface 47 Flat surface

Continuation of front page (56) References JP-A-3-42818 (JP, A) JP-A-6-123098 (JP, A) JP-A-1-183825 (JP, A) JP-A-2-24851 (JP, A) , A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H01L 21/304, 21/306, 21/308 H01L 21/02

Claims (40)

(57) [Claims] The method according to claim 1] substrate having a non-porous monocrystalline semiconductor layer epitaxially grown on the porous monocrystalline semiconductor region, at a temperature higher than the temperature during the epitaxial growth
There are, and the by heat treatment in a non-porous below the melting point temperature of the single crystal semiconductor layer reducing atmosphere, the semiconductor substrate, characterized by flattening the surface of said non-porous monocrystalline semiconductor layer Production method. Surface wherein said prior performing the heat treatment non-porous monocrystalline semiconductor layer has irregularities having a period of a few hundred nm from the height and number nm to several tens nm from several nm, the heat treatment 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the height difference of the surface is set to 2 nm or less. 3. The method according to claim 1, wherein the reducing atmosphere is a hydrogen atmosphere or an atmosphere containing hydrogen. 4. The method for manufacturing a semiconductor substrate according to claim 1, wherein the heat treatment is performed under a pressure lower than the atmospheric pressure. 5. The method according to claim 4, wherein the heat treatment is performed under a pressure of 200 Torr or less. 6. The method according to claim 1, wherein the heat treatment is performed at a temperature of 300 ° C. or higher. 7. The method according to claim 6, wherein the heat treatment is performed at a temperature of 500 ° C. or higher. 8. The method for manufacturing a semiconductor substrate according to claim 1, wherein the heat treatment is performed at a temperature of 1200 ° C. or less. 9. The semiconductor device according to claim 1, wherein the porous single crystal semiconductor region and the non-porous single crystal semiconductor layer are made of single crystal silicon.
9. The method for manufacturing a semiconductor substrate according to any one of items 1 to 8. 10. A step of preparing a first substrate having a porous single-crystal semiconductor layer and a non-porous single-crystal semiconductor layer, wherein the first substrate is placed in a reducing atmosphere under the non-porous single-crystal semiconductor layer. A step of heat-treating at a temperature equal to or lower than the melting point of the crystalline semiconductor layer; A method for manufacturing a semiconductor substrate, comprising: a step of bonding to obtain a body; and a step of removing the porous single-crystal semiconductor layer from the multilayer structure. 11. The method according to claim 10, wherein the second substrate comprises a silicon substrate. 12. The method according to claim 10, wherein the second substrate and the insulating layer are formed by oxidizing a surface of a silicon substrate. 13. The first substrate and the insulating layer are formed by oxidizing a surface of the non-porous single-crystal semiconductor layer of a substrate having a porous single-crystal semiconductor layer and a non-porous single-crystal semiconductor layer. The method for manufacturing a semiconductor substrate according to claim 10, which is formed. 14. The insulating layer according to claim 1, wherein the insulating layer comprises a first insulating layer and a second insulating layer.
Of made of an insulating layer, the first substrate and the first insulating layer, the substrate having a porous monocrystalline semiconductor layer and a nonporous single crystal semiconductor layer, the surface of the non-porous monocrystalline semiconductor layer The method of manufacturing a semiconductor substrate according to claim 10, wherein the second substrate and the second insulating layer are formed by oxidizing, and the second substrate and the second insulating layer are formed by oxidizing a surface of a silicon substrate. 15. A step of preparing a first substrate having a porous single-crystal semiconductor layer and a non-porous single-crystal semiconductor layer, wherein the first substrate is placed in a reducing atmosphere under the non-porous single-crystal semiconductor layer. A step of performing a heat treatment at a temperature equal to or lower than the melting point of the crystalline semiconductor layer, the heat-treated first substrate and the light-transmissive second substrate,
Bonding the non-porous single-crystal semiconductor layer so that a multilayer structure located inside is obtained, and removing the porous single-crystal semiconductor layer from the multi-layer structure. Of manufacturing a semiconductor substrate. 16. The method according to claim 15, wherein the second substrate is a quartz substrate. 17. The method according to claim 15, wherein the second substrate is a glass substrate. 18. The semiconductor device according to claim 10, wherein said porous single-crystal semiconductor layer and said non-porous single-crystal semiconductor layer are made of silicon.
8. The method for manufacturing a semiconductor substrate according to any one of 7. 19. The method according to claim 10, wherein the thickness of the non-porous single-crystal semiconductor layer is 50 μm or less. 20. The bonding step according to claim 10, wherein the bonding step includes a heating treatment in an oxygen atmosphere or a nitrogen atmosphere.
10. The method for manufacturing a semiconductor substrate according to any one of the above items 9. 21. The method according to claim 10, wherein the non-porous single-crystal semiconductor layer is formed on the porous single-crystal semiconductor layer by an epitaxial growth method. 22. The non-porous single crystal semiconductor layer is formed by a molecular beam epitaxial growth method, a plasma CVD method, or a thermal CVD method.
22. A film formed by a method selected from the group consisting of a CVD method, a photo CVD method, a bias sputtering method, and a liquid phase growth method.
3. The method for manufacturing a semiconductor substrate according to item 1. 23. The porous single crystal semiconductor layer of the first substrate is formed by making at least a part of a substrate made of a non-porous single crystal semiconductor porous.
23. The method of manufacturing a semiconductor substrate according to any one of items 22 to 22. 24. The porous single-crystal semiconductor layer of the first substrate is formed by partially making a substrate made of a non-porous single-crystal semiconductor porous, and after the bonding step, a porous single-crystal semiconductor layer is formed. Before removing the single crystal semiconductor layer, the first
24. The method for manufacturing a semiconductor substrate according to claim 23, further comprising a step of removing a region of the substrate that has not been made porous. 25. The method of manufacturing a semiconductor substrate according to claim 24, wherein a region of the first substrate that remains without being made porous is removed by polishing or grinding. 26. The first substrate, wherein one surface side is n
24. The method for manufacturing a semiconductor substrate according to claim 23, wherein the semiconductor substrate is formed by making a p-type region of a silicon substrate having a mold and the other surface side p-type. 27. The method for manufacturing a semiconductor substrate according to claim 23, wherein said porous layer is formed by anodization. 28. The method according to claim 28, further comprising:
The method for manufacturing a semiconductor substrate according to claim 10, wherein a surface of the non-porous single crystal semiconductor layer is washed with hydrofluoric acid. 29. An epitaxial growth of a single crystal semiconductor layer from a non-porous single crystal semiconductor layer of a multilayer structure after removing the porous single crystal semiconductor layer.
29. The method for manufacturing a semiconductor substrate according to any one of items 28. 30. The removal of the porous single crystal semiconductor layer,
The method for manufacturing a semiconductor substrate according to claim 10, wherein the method is performed by etching. 31. The method according to claim 30, wherein an aqueous solution containing hydrofluoric acid is used as the etchant for the etching. Surface 32. The prior performing the heat treatment non-porous monocrystalline semiconductor layer has irregularities having a period of a few hundred nm from the height and number nm to several tens nm from several nm, the heat treatment 32. The method of manufacturing a semiconductor substrate according to claim 10, wherein the height difference of the surface is set to 2 nm or less. 33. The method for manufacturing a semiconductor substrate according to claim 10, wherein the reducing atmosphere is a hydrogen atmosphere or an atmosphere containing hydrogen. 34. The method for manufacturing a semiconductor substrate according to claim 10, wherein the heat treatment is performed at a pressure lower than the atmospheric pressure. 35. The method according to claim 34, wherein the heat treatment is performed under a pressure of 200 Torr or less. 36. The method for manufacturing a semiconductor substrate according to claim 10, wherein the heat treatment is performed at a temperature of 300 ° C. or higher. 37. The method according to claim 36, wherein the heat treatment is performed at a temperature of 500 ° C. or higher. 38. The method for manufacturing a semiconductor substrate according to claim 10, wherein the heat treatment is performed at a temperature of 1200 ° C. or lower. 39. The non-porous material prior to the heat treatment.
A process for removing an oxide film on the surface of a single crystal semiconductor layer;
16. The method for manufacturing a semiconductor substrate according to claim 1, 10, or 15. 40. A semiconductor substrate produced by the method according to any one of the claims 1 to 3 9.