JPH0535915B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a serial bus interface circuit, and more particularly to a serial bus interface circuit built into a microcomputer.

[Prior art] In recent years, microcomputers, especially ROM,
Many devices include multiple single-chip microcomputers with built-in RAM.

In this case, serial transfer is used to transfer data between microcomputers in order to reduce the number of wiring inside the device or on a printed circuit board.

Furthermore, the use of serial transfer methods for sending and receiving data to and from the outside of the device is increasing for the same reason, and along with improvements in the processing speed of microcomputers themselves, most modern microcomputers now use serial bus interfaces. Equipped with a circuit.

FIG. 4 is a block diagram of a conventional example of a serial bus interface circuit. This circuit consists of a shift register 1, a serial output buffer 2, a shift clock selection circuit 3 that selects either internal clock A or external clock as shift clock B, a serial data input terminal SI, a serial data output terminal SO, and a shift clock selection circuit 3 that selects either internal clock A or external clock as shift clock B. - Consists of clock input/output terminal SCK.

FIG. 5 is a block diagram of another conventional example of a serial bus interface circuit. This circuit is a 1-wire/2-wire circuit that enables serial data input/output to be realized with a single terminal in the circuit shown in Figure 4.
A line transfer switching circuit 4 is provided, and the serial data output terminal SO is used as a serial data input/output terminal.
It can be used as SIO.

FIG. 6 is a circuit diagram showing an example of the 1-wire/2-wire transfer switching circuit 4. In FIG.

The operation of the serial bus interface circuit shown in FIG. 5 will now be described.

(1) When using this circuit in a system where the serial input and serial output have independent data 2-wire serial buses.

In this case, mode register MR2 is set to "0" level, shift clock selection circuit 3 selects either the internal or external clock as shift clock B, and serial data input terminal SI is connected to the input data bus. Connect the output data bus to the input/output terminal SIO, and connect the shift clock bus to the shift clock input/output terminal SCK. In this state, the data set in shift register 1 is sequentially output from the input/output terminal SIO in synchronization with shift clock B, and during reception, data is sequentially input from the serial data input terminal SI. , stored in shift register 1.

(2) When using this circuit in a system with a 1-wire serial data bus.

In this case, mode register MR2 is set to “1”.
level, and connect the serial data bus pulled up to the positive potential VDD via a resistor to the input/output terminal SIO. in this case,
Since the P channel transistor Tr1 is cut off, the input/output terminal SIO becomes an input/output terminal having an N channel open drain output. Therefore, the serial
By setting the data output signal D to the "1" level, the serial data input/output bus is set to the "1" level and becomes an initial state before starting data transfer. After this, by executing the serial transfer instruction, the same serial
Data transfer is performed.

[Problem that the invention seeks to solve]

In recent years, processing in devices with built-in microcomputers has become complex and diverse, and it has become necessary to transfer data between multiple microcomputers within the same device or in connection with external devices. Furthermore, in the serial transfer method, there are several types of formats, and it has become necessary to process them with a single microcomputer.

In the former case, in conventional serial bus interface circuits, many slave side microcomputers are connected to the transmitting serial bus or receiving serial bus connected to the master side microcomputer, so one In the latter case, in order to process different serial transfer formats with one microcomputer, two or more serial bus interfaces are required. It is necessary to use a microcomputer with a built-in face circuit, or to build an external switching circuit and use the microcomputer's general-purpose output port to perform switching control. This forced a decline in efficiency.

[Means for solving problems]

The serial bus interface circuit of the present invention includes first and second serial data input/output terminals for inputting and outputting serial data, a shift register in which serial data is stored, and a first input/output terminal for inputting and outputting serial data. Once the mode is set, the first and second
When the serial data input/output terminals of the first serial data input/output terminal and the data input terminal of the shift register are connected to the data input terminal and the output terminal of the shift register, respectively, and the second mode is set, the first serial data input/output terminal and the data input terminal of the shift register are connected. Leave the end unconnected and connect the second serial
When the data input/output terminal is connected to the data input terminal of the shift register and the data input terminal, and the third mode is set, the second serial data input/output terminal and the data output terminal of the shift register are connected to the non-connected state. It has a connection switching circuit that connects the first serial data input/output terminal to a data input terminal and a data output terminal of the shift register.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the serial bus interface circuit of the present invention.

This embodiment includes a shift register 1, a serial output buffer 2, a shift clock selection circuit 3, serial data input/output terminals SIO1, SIO2, a shift clock input/output terminal SCK, a 1-wire/2-wire transfer switching circuit 4, It consists of a serial transfer terminal switching circuit 5.

FIG. 2 is a circuit diagram of a specific example of the portions shown in FIG. 1 excluding the shift register 1 and serial output buffer 2. A mode register MR1 provided in the serial transfer terminal switching circuit 5 controls transfer gates T1, T2, T3, and T4.
Mode register MR3 in shift clock selection circuit 3 selects a shift clock.

When mode registers MR1 and MR2 are both set to "0", serial data input/output terminal SIO1 is used as the serial data input terminal, and serial data input/output terminal SIO2 is used as the serial data output terminal, respectively. 1
input terminal, connected to serial output buffer 2,
This serial bus interface circuit is
It operates in accordance with the conventional three-wire serial bus: shift clock bus, serial data input bus, and serial data output bus. Here, if only mode register MR2 is set to "1", shift data input/output terminal SIO1 and the data input terminal of shift register 1 are disconnected, and shift data input/output terminal SIO2 becomes shift
The data input terminal of register 1 is connected to serial output buffer 2, and this serial bus interface circuit is connected to the shift clock bus.
It performs operations compatible with a two-wire serial bus with two serial data buses. The above is the same operation as the conventional circuit shown in FIG.

Next, when mode register MR1 is set to "1" and mode register MR2 is set to "0", shift data input/output terminal SIO2 and serial output buffer 2 are disconnected, and shift data input/output Terminal SIO1 is connected to the data input terminal of shift register 1 and serial output buffer 2, and this serial bus interface circuit is a two-wire system consisting of a shift clock bus and a serial data bus. Performs operations compatible with the standard serial bus.

FIG. 3 is a diagram showing, as an applied example, an example of serial data transfer between a master side microcomputer MS equipped with the circuit of this embodiment and slave side microcomputers SL1 to SL4.

Now, slave side microcomputer SL1,
When performing data transfer between SL2 and the master side microcomputer MS, the mode register
Set MR1 to “1”. As a result, the shift register input/output circuits of the slave side microcomputers SL1 and SL2 are connected to the serial data input/output terminal SIO1, making it possible to input and output serial data. On the other hand, the serial data input/output terminal
Since SIO2 is in a high impedance state,
Serial data bus F has pull-up resistor R2
This holds the "1" level and enters a non-transfer state.
In addition, the slave side microcomputer SL3,
When performing data transfer with SL4, by setting moderester MR1 to "0", the selection is opposite to the above, and serial data transfer via serial data input/output terminal SIO2 becomes possible. .

〔Effect of the invention〕

As explained above, when the present invention is used in a system having a two-wire serial bus, the serial data input terminal, which is an unused terminal in conventional circuits, can be used as a serial data input/output terminal. , the serial data bus can be divided into two, which reduces the load capacity of one bus, enables high-speed transfer processing, and also makes it easier to use different serial bus transfer formats within the same system. This can also be realized by making each of them correspond to two separate serial data buses, which has the effect of improving cost efficiency and microcomputer terminal usage efficiency.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the serial bus interface circuit of the present invention, FIG. 2 is a circuit diagram showing the circuit example of FIG. 1, and FIG. 3 is a block diagram of the serial bus interface circuit of FIG. Figures 4 and 5 are block diagrams of conventional serial bus interface circuits, and Figure 6 shows 1-wire and 2-wire transfer in Figure 5. 4 is a circuit diagram showing an example of a switching circuit 4. FIG. 1...Shift register, 2...Serial output buffer, 3...Shift clock switching circuit, 4
...1-wire/2-wire transfer switching circuit, 5... Serial transfer terminal switching circuit, SCK... Shift clock input/output terminal, SIO1, SIO2... Serial data input/output terminal, MR1 to MR3... Mode register , Tr1...P channel transistor, Tr2
...N-channel transistor, T1 to T4...
Transfer gate, VDD...Positive potential, GND
...Earth potential, A...Internal clock, B...Shift clock, C...Serial data input signal, D...Serial data output signal, E, F...
...Serial data bus, G...Shift clock bus, MS...Master side microcomputer, SL1 to SL4...Slave side microcomputer.

Claims (1)

[Scope of Claims] 1. A serial bus interface circuit installed in a microcomputer, comprising first and second serial data input/output terminals for inputting and outputting serial data; When the first mode is set externally, the first,
When the second serial data input/output terminal is connected to the data input terminal and output terminal of the shift register, respectively, and the second mode is set, the first serial data input/output terminal and the shift register When the third mode is set by disconnecting the data input terminal and connecting the second serial data input/output terminal to the data input terminal and data output terminal of the shift register, the second serial data input/output terminal is connected to the data input terminal and data output terminal of the shift register. A serial device having a connection switching circuit that disconnects the data input/output terminal from the data output terminal of the shift register and connects the first serial data input/output terminal to the data input terminal and data output terminal of the shift register.・Bus interface circuit.