JPH0535810A - Circuit diagram generation system - Google Patents

Abstract

PURPOSE:To facilitate tracing of the necessary part of a circuit diagram by automatically generating the required part of the circuit diagram out of the entire circuit diagram. CONSTITUTION:An input means 2 inputting the information of the entire circuit diagram, a signal designation means 3 designating a signal name included in the required part of the circuit, a network deletion means 4 deleting the network equivalent to non-designated signal names, a symbol deletion means 5 deleting the symbol of the deleted connection, a circuit diagram generation means 8 generating circuit diagram information from logic connection information for the designated part only, and an output means 6 outputting the circuit diagram, are included.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit diagram generation system,
In particular, it relates to a method of generating a circuit diagram corresponding to a circuit having only a designated portion.

[0002]

2. Description of the Related Art Conventionally, when a circuit diagram of a designated portion is generated, a desired circuit diagram is obtained by tracing only that portion on the circuit diagram or manually deleting an unnecessary portion on the circuit diagram editor. Trying to get.

[0003]

In the above-mentioned conventional circuit diagram generating method, the circuit of the designated portion is not separated, so that it is difficult to trace the circuit, and it is enormous to try to separate the circuit of only the designated portion. There was a drawback that it required a lot of man-hours.

[0004]

The circuit diagram generation method of the present invention comprises an input means for inputting the entire connection information, a signal name designating means for designating a signal name included in a part of a required circuit, A net deleting means for deleting a net corresponding to an unspecified signal name, a symbol deleting means for deleting a symbol with no connection, and a circuit diagram generating means for generating circuit diagram information from logical connection information of only a designated portion. And a circuit diagram generating method characterized by including an output means for outputting a circuit diagram.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

In FIG. 1, the input means 2 is the logical connection information 1
Enter. The signal name designating means 3 designates the signal name of the signal included in the circuit of the portion where tracing is required, and passes it to the net deleting means 4.

The net deleting means 4 deletes a net having an unspecified signal name from the input logical connection information 1. The symbol deleting means 5 deletes the symbols having no connection.

The circuit diagram generating means 8 is conventionally known and generates circuit diagram information from logical connection information.
The output means 7 outputs the above result as the logic circuit diagram information 7.

2, FIG. 3, FIG. 4, and FIG. 5 show changes in the logic circuit diagram in this embodiment.

FIG. 2 is a logic circuit diagram of the initial circuit.
2 is a logic circuit diagram in which a net having a signal name of CIKT ... Is deleted from FIG. 2, FIG. 4 is a logic circuit diagram in which unestablished symbols are deleted, and FIG. 5 is a final logic circuit diagram.

[0012]

As described above, the present invention has the effect of facilitating the trace of the circuit diagram of the necessary portion by automatically generating the circuit diagram of only the designated portion of the entire circuit diagram. .

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 shows an example of an original logic circuit diagram for showing changes in the logic circuit diagram in the embodiment shown in FIG.

FIG. 3 shows a change from the logic circuit diagram shown in FIG.

FIG. 4 shows a change from the logic circuit diagram shown in FIG.

5 shows a change from the logic circuit diagram shown in FIG.

[Explanation of symbols]

 1 Logic Circuit Diagram Information 2 Input Means 3 Signal Name Designating Means 4 Connection Deleting Means 5 Symbol Deleting Means 6 Output Means 7 Logic Circuit Diagram Information 8 Compressing Means

Claims (1)

Claims: 1. Input means for inputting overall connection information; signal name designating means for designating a signal name included in a part of a required circuit; and undesignated signal names. A net deleting means for deleting the corresponding net, a symbol deleting means for deleting a symbol that has lost connection, a circuit diagram generating means for generating circuit diagram information from the logical connection information of only the designated part, and an output for outputting the circuit diagram. And a circuit diagram generation method including means.