JPH0535809A - Circuit diagram generation system - Google Patents

Abstract

PURPOSE:To facilitate tracing of the necessary part of a circuit diagram by automatically generating the required part of the circuit diagram out of the entire circuit diagram. CONSTITUTION:An input means 2 inputting the information of the entire circuit diagram, a signal designation means 3 designating a signal name included in the required part of the circuit, a connection deletion means 4 deleting the connection equivalent to non-designated signal names in the circuit diagram, a symbol deletion means 5 deleting the symbol of the deleted connection, a compression means 8 compressing the circuit diagram information into a vacant area resulted from the deletion, and an output means 6 outputting the circuit diagram information for the designated part only, are included.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit diagram generation system,
In particular, it relates to a method of generating a circuit diagram corresponding to a circuit having only a designated portion.

[0002]

2. Description of the Related Art Conventionally, when a circuit diagram of a designated portion is generated, a desired circuit is traced on the circuit diagram or by manually deleting an unnecessary portion on the circuit diagram editor. I am trying to get a figure.

[0003]

In the above-mentioned conventional circuit diagram generating method, the circuit of the designated portion is not separated, so that it is difficult to trace the circuit, and it is enormous to try to separate the circuit of only the designated portion. It was decided that it would take a lot of man-hours.

[0004]

The circuit diagram generation method of the present invention comprises an input means for inputting the whole circuit diagram information, and a signal name designating means for designating a signal name included in a part of a required circuit. , The connection deletion means for deleting the connection on the circuit diagram corresponding to the unspecified signal name, the connection deletion means for deleting the symbol with no connection, and the circuit diagram information is compressed into the empty area of the deleted result. The circuit diagram generating means is characterized in that it includes a compressing means for filling in and a outputting means for outputting the circuit diagram information of only the designation section.

[0005]

The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

In FIG. 1, the input means 2 inputs the logic circuit diagram information 1. The signal name designating means 3 designates the signal name of the signal included in the circuit of the portion where the trace is required, and passes it to the connection deleting means 4.

The connection deletion means 4 deletes the connection corresponding to the unspecified signal name from the input logic circuit diagram information 1. The symbol deleting means 5 deletes the symbols having no connection.

The compression means 8 embeds other symbols and connections in the empty area formed by the deleted connections and symbols. The output means 7 outputs the above result as the logic circuit diagram information 7.

2, FIG. 3, FIG. 4, and FIG. 5 show changes in the logic circuit diagram in this embodiment.

FIG. 2 is a logic circuit diagram of the initial circuit.
2 is a logic circuit diagram in which a connection not corresponding to the signal name CLKI ... Is deleted from FIG. 2, FIG. 4 is a logic circuit diagram in which unconnected symbols are deleted, and FIG. 5 is logic circuit diagram information as a result of compression. is there.

[0012]

As described above, the present invention has an effect of facilitating tracing of a circuit diagram of a necessary portion by automatically generating a circuit diagram of only a designated portion in the entire circuit diagram.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 shows an example of an original logic circuit diagram for showing changes in the logic circuit diagram in the embodiment shown in FIG.

FIG. 3 shows a change from the logic circuit diagram shown in FIG.

FIG. 4 shows a change from the logic circuit diagram shown in FIG.

5 shows a change from the logic circuit diagram shown in FIG.

[Explanation of symbols]

 1 Logic Circuit Diagram Information 2 Input Means 3 Signal Name Designating Means 4 Connection Deleting Means 5 Symbol Deleting Means 6 Output Means 7 Compressing Means

Claims (1)

Claims: 1. Input means for inputting overall circuit diagram information; signal name designating means for designating a signal name included in a part of a required circuit; and undesignated signal name. The connection deletion means for deleting the connection on the circuit diagram corresponding to the above, the connection deletion means for deleting the symbols with no connection, and the compression means for compressing and filling the circuit diagram information in the empty area of the deleted result, And a circuit diagram generating means for outputting circuit diagram information of only a designated portion.