JPH0535212A - Liquid crystal driving method - Google Patents
Liquid crystal driving methodInfo
- Publication number
- JPH0535212A JPH0535212A JP18854191A JP18854191A JPH0535212A JP H0535212 A JPH0535212 A JP H0535212A JP 18854191 A JP18854191 A JP 18854191A JP 18854191 A JP18854191 A JP 18854191A JP H0535212 A JPH0535212 A JP H0535212A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- synchronizing signal
- vertical
- period
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は主に情報端末機器等のデ
ィスプレイとして使用する、単純マトリクスタイプの画
面分割のない液晶駆動方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a simple matrix type liquid crystal driving method without screen division, which is mainly used as a display for information terminal equipment and the like.
【0002】[0002]
【従来の技術】従来の液晶駆動方法の一実施例について
以下図面を参照しながら説明する。2. Description of the Related Art An embodiment of a conventional liquid crystal driving method will be described below with reference to the drawings.
【0003】(図1)は液晶の駆動回路構成を示す一例
である。同図において、1はパソコン等の情報端末機器
であり、CRT用のクロック信号、デ−タ信号、水平同
期信号、垂直同期信号を取り出し、コントロ−ル回路2
に入力する。コントロ−ル回路2はCRT用のクロック
信号、デ−タ信号、水平同期信号、垂直同期信号を、そ
れぞれ、液晶駆動用のクロック信号、デ−タ信号、水平
同期信号、垂直同期信号に変換する回路であって、液晶
駆動に必要な前記以外の信号、すなわち、液晶を交流駆
動するための制御信号もこの回路で作成する。3は液晶
駆動用の電源回路であり、この出力電圧とコントロ−ル
回路2の出力信号をセグメント側ドライバ−回路4と走
査側ドライバ−回路5に接続し、それぞれのドライバ−
回路の出力を液晶パネル6に接続する。なお、液晶パネ
ル6は640列480行の画面分割のない一画面構成の
単純マトリクスタイプ液晶パネルである。FIG. 1 is an example showing a liquid crystal drive circuit configuration. In the figure, reference numeral 1 is an information terminal device such as a personal computer, which takes out a clock signal, a data signal, a horizontal synchronizing signal and a vertical synchronizing signal for a CRT and controls the control circuit 2.
To enter. The control circuit 2 converts the CRT clock signal, data signal, horizontal synchronizing signal, and vertical synchronizing signal into a liquid crystal driving clock signal, data signal, horizontal synchronizing signal, and vertical synchronizing signal, respectively. A circuit other than the above signals necessary for driving the liquid crystal, that is, a control signal for AC driving the liquid crystal is also generated by this circuit. Reference numeral 3 is a power supply circuit for driving the liquid crystal, and this output voltage and the output signal of the control circuit 2 are connected to a segment side driver circuit 4 and a scanning side driver circuit 5, respectively.
The output of the circuit is connected to the liquid crystal panel 6. The liquid crystal panel 6 is a simple matrix type liquid crystal panel having a single screen configuration of 640 columns and 480 rows without screen division.
【0004】(図2)は(図1)に示した液晶駆動回路
の動作波形図である。同図において、(a)VS、
(b)D,(c)HSは、それぞれ、情報端末機器1か
らコントロ−ル回路2に出力するCRT用の垂直同期信
号、デ−タ、水平同期信号であり、一垂直同期期間に水
平同期信号は520個含まれる。520個のうち480
個は有効デ−タ期間(図2ではB期間)に出力され、残
り40個は垂直帰線消去期間中(図2ではA期間)に出
力される。(d)LVS、(e)LD、(f)LHS
は、それぞれ、コントロ−ル回路2から出力される一画
面構成の液晶パネル6を駆動するための垂直同期信号、
デ−タ、水平同期信号であり、やはり、一垂直同期期間
に水平同期信号が520個含まれ、そのうち、有効デ−
タ期間(図2ではD期間)に480個、垂直帰線消去期
間(図2ではC期間)に40個含まれる。(g)は液晶
パネル6の各液晶画素の両端間に印加される電圧波形例
であり、垂直帰線消去期間中も各液晶画素には電圧が印
加される。FIG. 2 is an operation waveform diagram of the liquid crystal drive circuit shown in FIG. In the figure, (a) VS,
(B) D and (c) HS are a CRT vertical synchronizing signal, data, and horizontal synchronizing signal output from the information terminal device 1 to the control circuit 2, respectively, and are horizontal synchronizing during one vertical synchronizing period. 520 signals are included. 480 out of 520
The 40 pieces are output during the valid data period (B period in FIG. 2), and the remaining 40 pieces are output during the vertical blanking period (A period in FIG. 2). (D) LVS, (e) LD, (f) LHS
Is a vertical synchronizing signal for driving the liquid crystal panel 6 having a single screen output from the control circuit 2,
Data and horizontal sync signals. Again, 520 horizontal sync signals are included in one vertical sync period, of which valid data is valid.
480 in the data period (D period in FIG. 2) and 40 in the vertical blanking period (C period in FIG. 2). (G) is an example of a voltage waveform applied across both ends of each liquid crystal pixel of the liquid crystal panel 6, and a voltage is applied to each liquid crystal pixel even during the vertical blanking period.
【0005】[0005]
【発明が解決しようとする課題】単純マトリクスタイプ
の一般的な液晶駆動法である電圧平均化法で液晶パネル
6を駆動する場合、選択画素電圧と非選択画素電圧の比
の最大値αmax が液晶パネル6のコントラストを決定す
る指標のひとつとなり、αmax が大きいほうがコントラ
ストの高い表示が得られる。When the liquid crystal panel 6 is driven by the voltage averaging method, which is a general liquid crystal driving method of the simple matrix type, the maximum value αmax of the ratio of the selected pixel voltage and the non-selected pixel voltage is the liquid crystal. It becomes one of the indexes for determining the contrast of the panel 6, and the larger the αmax is, the higher the contrast can be obtained.
【0006】(図2)(g)に示すような電圧波形で
は、液晶パネル6の選択画素電圧と非選択画素電圧の比
の最大値αmax は、1/520デュ−ティ−駆動の値、
すなわち、αmax =1.0448となる。しかしなが
ら、本従来例では液晶パネル6は640列480行であ
るので、αmax は1/480デュ−ティ−駆動の値、す
なわち、αmax =1.0467程度が望ましいが、実際
には1/520デュ−ティ−駆動のために、コントラス
トの低い表示となっているという課題があった。In the voltage waveform as shown in FIG. 2G, the maximum value αmax of the ratio of the selected pixel voltage to the non-selected pixel voltage of the liquid crystal panel 6 is 1/520 duty drive value,
That is, αmax = 1.0448. However, in this conventional example, since the liquid crystal panel 6 has 640 columns and 480 rows, it is desirable that αmax is a 1/480 duty drive value, that is, αmax = 1.0467, but 1/520 duty is actually used. There is a problem that the display is low in contrast due to the tee driving.
【0007】本発明は前記課題を解決した液晶駆動方法
を提供することを目的とする。It is an object of the present invention to provide a liquid crystal driving method that solves the above problems.
【0008】[0008]
【課題を解決するための手段】前記課題を解決するため
本発明は、一画面構成の単純マトリクスタイプ液晶パネ
ルに接続されたセグメント側ドライバ−回路と走査側ド
ライバ−回路、および、前記2種類のドライバ−回路に
接続されたコントロ−ル回路と液晶駆動用の電源回路か
ら構成され、前記コントロ−ル回路はCRT用のクロッ
ク信号、デ−タ信号、水平同期信号、垂直同期信号を液
晶用のクロック信号、デ−タ信号、水平同期信号、垂直
同期信号に変換するとともに液晶駆動に必要な前記以外
の制御信号も発生する回路であって、前記コントロ−ル
回路からの垂直帰線消去期間中液晶パネルの各画素の両
端に同一電圧を印加するようにしたものである。In order to solve the above problems, the present invention provides a segment side driver circuit and a scan side driver circuit connected to a simple matrix type liquid crystal panel having a single screen structure, and the above two types. It is composed of a control circuit connected to a driver circuit and a power supply circuit for driving the liquid crystal, and the control circuit supplies a clock signal for CRT, a data signal, a horizontal synchronizing signal and a vertical synchronizing signal for the liquid crystal. A circuit for converting into a clock signal, a data signal, a horizontal synchronizing signal, and a vertical synchronizing signal, and also generating a control signal other than those mentioned above necessary for driving the liquid crystal, during the vertical blanking period from the control circuit. The same voltage is applied to both ends of each pixel of the liquid crystal panel.
【0009】[0009]
【作用】前記した構成により本発明は、垂直帰線消去期
間中各液晶画素の両端間に電圧は印加しないので、一垂
直同期期間に水平同期信号が520個含まれていても、
1/480デュ−ティ−駆動相当のコントラストを得る
ことが可能となる。According to the above-described structure, the present invention does not apply a voltage across each liquid crystal pixel during the vertical blanking period, so that even if 520 horizontal synchronizing signals are included in one vertical synchronizing period,
It is possible to obtain a contrast equivalent to 1/480 duty drive.
【0010】[0010]
【実施例】本発明の一実施例の液晶駆動方法について、
以下図面を参照しながら説明する。EXAMPLE A liquid crystal driving method according to an example of the present invention,
Hereinafter, description will be given with reference to the drawings.
【0011】本発明の回路構成図は従来例と同じく(図
1)により示されるので、詳細な説明は省略する。従来
例と異なるところは、コントロ−ル回路2はCRT用の
クロック信号、デ−タ信号、水平同期信号、垂直同期信
号を、それぞれ、液晶駆動用のクロック信号、デ−タ信
号、水平同期信号、垂直同期信号に変換するとともに、
液晶を交流駆動するための制御信号と垂直帰線消去期間
を示す信号を出力し、セグメント側ドライバ−回路4、
走査側ドライバ−回路5に、それぞれ、入力する点であ
る。The circuit configuration diagram of the present invention is the same as that of the conventional example (FIG. 1), and a detailed description thereof will be omitted. The difference from the conventional example is that the control circuit 2 supplies a clock signal, a data signal, a horizontal synchronizing signal, and a vertical synchronizing signal for a CRT to a liquid crystal driving clock signal, a data signal, and a horizontal synchronizing signal, respectively. , While converting to vertical sync signal,
It outputs a control signal for AC driving the liquid crystal and a signal indicating the vertical blanking period, and the segment side driver circuit 4,
This is a point to be inputted to each of the scanning side driver circuits 5.
【0012】(図3)は(図1)に示す本発明の一実施
例の動作波形図を示す。同図において、(a)VS、
(b)D,(c)HSは、それぞれ、情報端末機器1か
らコントロ−ル回路2に出力するCRT用の垂直同期信
号、デ−タ、水平同期信号であり、一垂直同期期間に水
平同期信号は520個含まれる。520個のうち480
個は有効デ−タ期間(図3ではB期間)に出力され、残
り40個は垂直帰線消去期間中(図3ではA期間)に出
力される。(d)LVS、(e)LD、(f)LHS
は、それぞれ、コントロ−ル回路2から出力される一画
面構成の液晶パネル6を駆動するための垂直同期信号、
デ−タ、水平同期信号であり、やはり、一垂直同期期間
に水平同期信号が520個含まれ、そのうち、有効デ−
タ期間(図3ではD期間)に480個、垂直帰線消去期
間(図3ではC期間)に40個含まれる。(g)DOF
FはLVSの垂直帰線消去期間を示す信号であり、この
信号を入力することにより、セグメント側および走査側
ドライバ−回路4、5の出力電圧をLVSの垂直帰線消
去期間中、同一電圧とする。その結果垂直帰線消去期間
中液晶パネル6の各画素の両端間には電圧が印加しなく
なる。セグメント側および走査側ドライバ−回路4、5
の出力電圧を同一電圧とする具体的な手段は、たとえ
ば、セグメント側ドライバ−回路4としてTI社製TM
S57207を使用し、走査側ドライバ−回路5とし
て、同じくTI社製TMS57202を使用すれば両ド
ライバ−の出力電圧を同一電圧とする回路が内蔵されて
いる。(h)は(g)DOFFを使用した場合、液晶パ
ネル6の各液晶画素の両端間に印加される電圧波形の一
例であり、垂直帰線消去期間中は各液晶画素の両端間に
は電圧は印加されない。FIG. 3 shows an operation waveform diagram of one embodiment of the present invention shown in FIG. In the figure, (a) VS,
(B) D and (c) HS are a CRT vertical synchronizing signal, data, and horizontal synchronizing signal output from the information terminal device 1 to the control circuit 2, respectively, and are horizontal synchronizing during one vertical synchronizing period. 520 signals are included. 480 out of 520
The 40 pieces are output during the valid data period (B period in FIG. 3), and the remaining 40 pieces are output during the vertical blanking period (A period in FIG. 3). (D) LVS, (e) LD, (f) LHS
Is a vertical synchronizing signal for driving the liquid crystal panel 6 having a single screen output from the control circuit 2,
Data and horizontal sync signals. Again, 520 horizontal sync signals are included in one vertical sync period, of which valid data is valid.
480 in the data period (D period in FIG. 3) and 40 in the vertical blanking period (C period in FIG. 3). (G) DOF
F is a signal indicating the vertical blanking period of LVS. By inputting this signal, the output voltage of the driver circuits 4, 5 on the segment side and the scanning side becomes the same voltage during the vertical blanking period of LVS. To do. As a result, no voltage is applied across the pixels of the liquid crystal panel 6 during the vertical blanking period. Segment side and scan side drivers-circuits 4, 5
A specific means for making the output voltage of the same voltage the same is, for example, as the segment side driver circuit 4 TM manufactured by TI
If S57207 is used and TMS57202 manufactured by TI is also used as the scanning side driver circuit 5, a circuit for making the output voltage of both drivers the same voltage is built in. (H) is an example of a voltage waveform applied between both ends of each liquid crystal pixel of the liquid crystal panel 6 when (g) DOFF is used, and a voltage is applied between both ends of each liquid crystal pixel during the vertical blanking period. Is not applied.
【0013】以上のような回路構成で駆動すれば、液晶
パネル6の選択画素電圧と非選択画素電圧の比の最大値
αmax は1/480デュ−ティ−と同等の値αmax =
1.0467となり、コントラストの高い駆動が可能と
なる。When driven by the circuit configuration as described above, the maximum value αmax of the ratio between the selected pixel voltage and the non-selected pixel voltage of the liquid crystal panel 6 is a value equal to 1/480 duty αmax =
Since it becomes 1.0467, driving with high contrast becomes possible.
【0014】なお本実施例では、セグメント側および走
査側ドライバ−回路4、5の出力電圧をLVSの垂直帰
線消去期間中、同一電圧とする手段として、TI社製ド
ライバ−回路を用いて説明したが、同等の機能をもつド
ライバ−回路ならばいずれのものでもよい。In this embodiment, a driver circuit manufactured by TI is used as a means for keeping the output voltages of the segment side and scan side driver circuits 4 and 5 at the same voltage during the vertical retrace blanking period of LVS. However, any driver circuit having an equivalent function may be used.
【0015】さらに本実施例では、液晶パネル6として
640×480ドットのパネルを用い、一垂直同期期間
に520個の水平同期信号を含む場合について説明した
が、液晶パネル6として640×400ドットのパネル
を用い、一垂直同期期間に401個以上の水平同期信号
を含む場合についても同等の効果が得られることは言う
までもない。Further, in this embodiment, a case has been described in which a 640 × 480 dot panel is used as the liquid crystal panel 6, and 520 horizontal synchronizing signals are included in one vertical synchronizing period, but the liquid crystal panel 6 has 640 × 400 dot. It is needless to say that the same effect can be obtained when using a panel and including 401 or more horizontal synchronizing signals in one vertical synchronizing period.
【0016】[0016]
【発明の効果】以上説明したように本発明によれば、液
晶駆動用の垂直同期信号LVSの消去期間中、各液晶画
素の両端に印加される電圧を同一電圧とするので一垂直
同期期間が520個の水平同期信号で構成されていて
も、1/480デュ−ティ−と同等のコントラストを持
った液晶表示が可能となり、液晶パネルの表示品質の向
上に大きな効果がある。As described above, according to the present invention, during the erasing period of the vertical synchronizing signal LVS for driving the liquid crystal, the voltage applied to both ends of each liquid crystal pixel is the same voltage, so that one vertical synchronizing period is provided. Even with 520 horizontal sync signals, a liquid crystal display with a contrast equivalent to 1/480 duty can be realized, which is very effective in improving the display quality of the liquid crystal panel.
【図1】本発明の一実施例の液晶駆動方法の回路構成図
である。FIG. 1 is a circuit configuration diagram of a liquid crystal driving method according to an embodiment of the present invention.
【図2】従来の液晶駆動方法による各部の電圧波形図で
ある。FIG. 2 is a voltage waveform diagram of each part according to a conventional liquid crystal driving method.
【図3】本発明の液晶駆動方法による各部の電圧波形図
である。FIG. 3 is a voltage waveform diagram of each part according to the liquid crystal driving method of the present invention.
1 情報端末機器 2 コントロ−ラ回路 3 電源回路 4 セグメント側ドライバ−回路 5 走査側ドライバ−回路 6 液晶パネル 1 information terminal equipment 2 controller circuit 3 power supply circuit 4 segment side driver-circuit 5 scanning side driver-circuit 6 liquid crystal panel
Claims (1)
ネルに接続されたセグメント側ドライバ−回路と走査側
ドライバ−回路、および、前記2種類のドライバ−回路
に接続されたコントロ−ル回路と液晶駆動用の電源回路
から構成され、前記コントロ−ル回路はCRT用のクロ
ック信号、デ−タ信号、水平同期信号、垂直同期信号を
液晶用のクロック信号、デ−タ信号、水平同期信号、垂
直同期信号に変換するとともに液晶駆動に必要な前記以
外の制御信号も発生する回路であって、前記コントロ−
ル回路からの垂直帰線消去期間中液晶パネルの各画素の
両端に同一電圧を印加することを特徴とする液晶駆動方
法。Claim: What is claimed is: 1. A segment-side driver circuit and a scanning-side driver circuit connected to a simple matrix type liquid crystal panel having a single screen structure, and a controller connected to the two types of driver circuits. A control circuit and a liquid crystal driving power supply circuit, and the control circuit supplies a CRT clock signal, a data signal, a horizontal synchronizing signal and a vertical synchronizing signal to the liquid crystal clock signal, a data signal, A circuit for converting into a horizontal synchronizing signal and a vertical synchronizing signal and also generating a control signal other than the above which is necessary for driving a liquid crystal.
A method for driving a liquid crystal, characterized in that the same voltage is applied to both ends of each pixel of the liquid crystal panel during a vertical blanking period from the circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18854191A JPH0535212A (en) | 1991-07-29 | 1991-07-29 | Liquid crystal driving method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18854191A JPH0535212A (en) | 1991-07-29 | 1991-07-29 | Liquid crystal driving method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0535212A true JPH0535212A (en) | 1993-02-12 |
Family
ID=16225515
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18854191A Pending JPH0535212A (en) | 1991-07-29 | 1991-07-29 | Liquid crystal driving method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0535212A (en) |
-
1991
- 1991-07-29 JP JP18854191A patent/JPH0535212A/en active Pending
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