JPH0534915B2 - - Google Patents

Info

Publication number
JPH0534915B2
JPH0534915B2 JP59084347A JP8434784A JPH0534915B2 JP H0534915 B2 JPH0534915 B2 JP H0534915B2 JP 59084347 A JP59084347 A JP 59084347A JP 8434784 A JP8434784 A JP 8434784A JP H0534915 B2 JPH0534915 B2 JP H0534915B2
Authority
JP
Japan
Prior art keywords
signal
semiconductor element
terminal
rotational position
chopping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59084347A
Other languages
Japanese (ja)
Other versions
JPS60226791A (en
Inventor
Koji Hamaoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Refrigeration Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Refrigeration Co filed Critical Matsushita Refrigeration Co
Priority to JP59084347A priority Critical patent/JPS60226791A/en
Publication of JPS60226791A publication Critical patent/JPS60226791A/en
Publication of JPH0534915B2 publication Critical patent/JPH0534915B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P6/00Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
    • H02P6/14Electronic commutators

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体素子によつて固定子巻線の電流
を転流する形式の無整流子直流電動機に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a commutatorless DC motor in which current in a stator winding is commutated by a semiconductor element.

従来例の構成とその問題点 一般に無整流子直流電動機は複数個の固定子巻
線を有し、これに流れる駆動電流を回転位置信号
に基づいて転流することにより回転を持続する。
そして、無整流子直流電動機の速度制御は、通常
その固定子巻線に流れる電流を周期的に断続し、
等価的に電圧を変化することにより行なわれてい
た。その代表的な方式を第1図〜第3図において
説明する。第1図においてQ1〜Q6はコミテータ
用制御素子としてのコミテータトランジスタ(以
下コミテータ・トランジスタなる記載は省略し、
トランジスタと呼ぶ)である。そして、トランジ
スタQ1,Q3,Q5により第1半導体素子群を、ト
ランジスタQ2,Q4,Q6により第2半導体素子群
を形成している。L1〜L3は固定子巻線、D1〜D6
はスパイク抑圧ダイオードである。第2図は第1
図の回路の駆動回路である。1は回転位置検出回
路で、2〜7はその各々の回転位置信号である。
8は信号発生回路でチヨツピング信号9を発生す
る。10〜12はAND回路でそれぞれ前記回転
位置信号2,4,6と前記チヨツピング信号9と
の論理積をとる。13〜18はベースドライブ信
号で各々トランジスタQ1〜Q6をドライブする。
上記構成において各部の信号例を第3図を参考に
説明する。例えば0〜π/3の区間ではベースド
ライブ信号18及び13がHレベルになつている
のでトランジスタQ6及びQ1がONになり電流はト
ランジスタQ1→固定子巻線L1→固定子巻線L3
トランジスタQ6と流れる。ここでベースドライ
ブ信号13はチヨツピングされているので、ベー
スドライブ信号13がLレベルになつた時に前記
電流が断となる。以下π/3〜2πまでの区間も
同様に転流及びチヨツピングをくり返す。かくし
てチヨツピング信号9のHレベルとLレベルの時
間比、すなわちデユーテイを変えることにより、
等価的に前記固定子巻線L1〜L3に加わる電圧を
変化することができ、それにより電動機の回転速
度を変えることができる。
Conventional Structure and Problems Generally, a commutatorless DC motor has a plurality of stator windings, and maintains rotation by commutating the drive current flowing through the stator windings based on a rotational position signal.
The speed control of a non-commutated DC motor is usually carried out by periodically intermittent current flowing through the stator winding.
This was done by equivalently changing the voltage. A typical method thereof will be explained with reference to FIGS. 1 to 3. In FIG. 1, Q 1 to Q 6 are commutator transistors (hereinafter, the description of commutator transistors will be omitted) as commutator control elements.
(called a transistor). The transistors Q 1 , Q 3 , and Q 5 form a first semiconductor element group, and the transistors Q 2 , Q 4 , and Q 6 form a second semiconductor element group. L 1 ~ L 3 are stator windings, D 1 ~ D 6
is a spike suppression diode. Figure 2 is the first
This is a drive circuit for the circuit shown in the figure. 1 is a rotational position detection circuit, and 2 to 7 are respective rotational position signals.
8 is a signal generating circuit which generates a chopping signal 9; Reference numerals 10 to 12 are AND circuits which perform the logical product of the rotational position signals 2, 4, and 6 and the chopping signal 9, respectively. Base drive signals 13 to 18 drive transistors Q 1 to Q 6 , respectively.
Examples of signals of each part in the above configuration will be explained with reference to FIG. For example, in the interval from 0 to π/3, the base drive signals 18 and 13 are at H level, so transistors Q 6 and Q 1 are turned on, and the current flows from transistor Q 1 to stator winding L 1 to stator winding. L 3
Flows with transistor Q 6 . Since the base drive signal 13 is stopped here, the current is cut off when the base drive signal 13 becomes L level. Commutation and chopping are repeated in the same manner in the following section from π/3 to 2π. Thus, by changing the time ratio between the H level and L level of the chopping signal 9, that is, the duty,
Equivalently, the voltage applied to the stator windings L 1 to L 3 can be changed, thereby changing the rotational speed of the motor.

従来例は以上のような構成になつていたため、
チヨツピングする側のトランジスタがOFFにな
つている時でも反対側のトランジスタはONとな
つているためにベース電流が流れたままであり、
前記ベース電流による損失を有するという欠点を
有していた。またチヨツピングする側のトランジ
スタの方がスイツチング損失が大きく負担がかか
りすぎるという欠点をも有していた。
The conventional example had the above configuration, so
Even when the transistor on the chopping side is OFF, the transistor on the opposite side is ON, so the base current continues to flow.
This has the drawback of having a loss due to the base current. Another drawback is that the transistor on the chopping side suffers from a large switching loss and is burdened with too much burden.

発明の目的 そこで本発明はチヨツピングがOFFの時に他
方のトランジスタに流れるベース電流による損失
を少なくし、かつスイツチング損失も全てのトラ
ンジスタに平等にかかるようにすることを目的と
する。
Purpose of the Invention It is therefore an object of the present invention to reduce the loss due to the base current flowing to the other transistor when switching is OFF, and to apply the switching loss equally to all transistors.

発明の構成 この目的を達成するために本発明は回転子の位
置に応じて回転位置信号を発生する回転位置検出
手段と、チヨツピング信号を発生する信号発生手
段と、前記チヨツピング信号の位相を遅らせ位相
遅れチヨツピング信号を発生する遅延手段と、前
記チヨツピング信号に応じて前記回転位置信号を
チヨツピングする第1信号合成手段と、前記位相
遅れチヨツピング信号に応じて前記回転位置信号
をチヨツピングする第2信号合成手段とを有し、
第1半導体素子群の第3端子に前記第1信号合成
手段からの出力を供給し、第2半導体素子群の第
3端子に前記第2信号合成手段からの出力信号を
供給することにより第1半導体素子群がON/
OFFする時には第2半導体素子群も位相を遅ら
せてON/OFFするようにしたものである。
Structure of the Invention In order to achieve this object, the present invention comprises: a rotational position detection means for generating a rotational position signal according to the position of a rotor; a signal generation means for generating a stepping signal; a delay means for generating a delayed chopping signal; a first signal synthesis means for chopping the rotational position signal according to the stepping signal; and a second signal synthesis means for chopping the rotational position signal according to the phase-lag chopping signal. and has
By supplying the output from the first signal synthesizing means to the third terminal of the first semiconductor element group, and supplying the output signal from the second signal synthesizing means to the third terminal of the second semiconductor element group, the first Semiconductor element group is ON/
When turning OFF, the second semiconductor element group is also turned ON/OFF by delaying the phase.

実施例の説明 以下本発明の一実施例を添付図面において説明
するが従来と同一構成については同一番号を付し
てその詳細な説明を省略する。
DESCRIPTION OF THE EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings, but components that are the same as those of the prior art will be designated by the same reference numerals and detailed explanations thereof will be omitted.

図において、19は位置検出回路で位置検出信
号20〜25を発生する。26は信号発生回路で
ありチヨツピング信号27を発生する。28は遅
延回路であり前記チヨツピング信号27が入力さ
れ、位相遅れチヨツピング信号29を発生する。
30〜35は論理積回路であり、前記論理積回路
30,32,34はそれぞれ前記位置検出信号2
0,22,24と前記チヨツピング信号27とが
入力されている。また前記論理回路31,33,
35はそれぞれ前記位置検出信号21,23,2
5と前記位相遅れチヨツピング信号29とが入力
されている。前記論理積回路30〜35の各々の
出力36〜41はそれぞれトランジスタQ1〜Q6
をドライブする信号である。
In the figure, 19 is a position detection circuit which generates position detection signals 20-25. Reference numeral 26 denotes a signal generating circuit which generates a chopping signal 27. Reference numeral 28 denotes a delay circuit to which the stepping signal 27 is input and generates a phase-delayed jumping signal 29.
30 to 35 are AND circuits, and the AND circuits 30, 32, and 34 each receive the position detection signal 2.
0, 22, 24 and the above-mentioned chopping signal 27 are input. Further, the logic circuits 31, 33,
35 are the position detection signals 21, 23, 2, respectively.
5 and the phase delayed chopping signal 29 are input. Outputs 36-41 of the AND circuits 30-35 are transistors Q1 - Q6, respectively.
This is the signal that drives the

次に各々の信号36〜41がどのように出るの
かを第6図を参考に0〜π/3間でのふるまいを
説明する。0〜π/3間ではトランジスタQ6
Q1がONとなるように位置検出信号25,20が
出力される。更に信号41,36は各々信号2
9,27でチヨツピングされるため第6図に示す
ように信号41が信号36より立ち上がりで角度
1、立ち下がり角度2だけ遅れるような信号が
発生する。以下信号37〜40でも同様にくり返
される。前記信号36〜41は前記位置検出信号
20〜25により動いているので電動機の回転子
を回転させることができる。また前記チヨツピン
グ信号27と前記位相遅れチヨツピング信号29
によつて前記信号36〜41をチヨツピングして
いるので、チヨツピング信号のON/OFF区間比
を変えることにより容易に回転子の回転速度を変
えることができる。次にチヨツピングをしている
時の詳細な説明を第6図に従つて説明する。いま
トランジスタQ1とトランジスタQ6が前記位置検
出信号によつてONされる状態になつていたと仮
定する。この時前記チヨツピング信号27、前記
位相遅れチヨツピング信号29がONとなるよう
な信号を送つて来た場合に前記信号36,41は
出力される。前記信号36が第7図aのように時
刻t0でONになり、時刻t3でOFFになつたとする
と、前記信号41は第7図bのように時刻t1
ONになり時刻t3でOFFになる。これに伴ないト
ランジスタQ1及びトランジスタQ6のコレクタ=
エミツタ間電圧VCE1,VCE6は各々第7図c及びd
に示すような波形となる。ここでトランジスタ
Q1及びトランジスタQ6のコレクタ電流ICはトラ
ンジスタQ1及びトランジスタQ6が共にONとなつ
た時に流れるものであるから第7図eに示すよう
な波形となる。そしてトランジスタQ1及びトラ
ンジスタQ6のコレクタ損失PC1,PC6は各々トラ
ンジスタQ1,Q6のコレクタ=エミツタ間電圧
VCE1,VCE6とコレクタ電流ICの積を取つたもので
あるから第7図f及びgに示すような波形とな
る。この図からも明らかなように各々のコレクタ
損失のピークはトランジスタQ1では時刻t1〜t2
にトランジスタQ2では時刻t3〜t4間にあり、ほぼ
均等に損失が分配されている。従つて本実施例に
おいてはチヨツピングがOFFの時に他方のトラ
ンジスタに流れるベース電流による損失を少なく
しかつスイツチング損失を全てのトランジスタに
平等にかかるという効果が得られる。
Next, how each of the signals 36 to 41 is output will be explained with reference to FIG. 6 in terms of behavior between 0 and π/3. Between 0 and π/3, the transistor Q 6 ,
Position detection signals 25 and 20 are output so that Q1 is turned ON. Further, signals 41 and 36 are each signal 2
9 and 27, the angle of signal 41 rises from signal 36 as shown in Figure 6.
1 , a signal is generated that is delayed by a falling angle of 2 . The same process is repeated for signals 37-40. Since the signals 36 to 41 are moved by the position detection signals 20 to 25, the rotor of the electric motor can be rotated. In addition, the stepping signal 27 and the phase-delayed stepping signal 29
Since the signals 36 to 41 are stepped by , the rotational speed of the rotor can be easily changed by changing the ON/OFF section ratio of the stepping signals. Next, a detailed explanation of the process of jumping will be explained with reference to FIG. Assume that transistor Q 1 and transistor Q 6 are now turned on by the position detection signal. At this time, when a signal is sent that turns on the stepping signal 27 and the phase-delayed stepping signal 29, the signals 36 and 41 are output. If the signal 36 turns ON at time t 0 and turns OFF at time t 3 as shown in FIG. 7a, the signal 41 turns ON at time t 1 as shown in FIG. 7b.
It turns ON and turns OFF at time t3 . Accordingly, the collectors of transistor Q 1 and transistor Q 6 =
The emitter voltages V CE1 and V CE6 are shown in Figure 7 c and d, respectively.
The waveform will be as shown in . transistor here
Since the collector current I C of Q 1 and transistor Q 6 flows when both transistor Q 1 and transistor Q 6 are turned on, it has a waveform as shown in FIG. 7e. The collector losses P C1 and P C6 of transistor Q 1 and transistor Q 6 are the collector-emitter voltage of transistors Q 1 and Q 6 , respectively.
Since it is the product of V CE1 , V CE6 and collector current I C , the waveforms are as shown in FIG. 7f and g. As is clear from this figure, the peak of each collector loss is between time t 1 and t 2 for transistor Q 1 and between time t 3 and t 4 for transistor Q 2 , and the losses are distributed almost evenly. . Therefore, in this embodiment, it is possible to reduce the loss due to the base current flowing to the other transistor when stepping is OFF, and to apply the switching loss equally to all transistors.

発明の効果 以上の説明から明らかなように本発明は回転子
の位置に応じて回転位置信号を発生する回転位置
検出手段と、チヨツピング信号を発生する信号発
生手段と前記チヨツピング信号の位相を遅らせ位
相遅れチヨツピング信号を発生する遅延手段と、
前記チヨツピング信号に応じて前記回転位置信号
をチヨツピングする第1信号合成手段と、前記位
相遅れチヨツピング信号に応じて前記回転位置信
号をチヨツピングする第2信号合成手段とを有
し、第1半導体素子群の第3端子に前記第1信号
合成手段からの出力を供給し、第2半導体素子群
の第3端子に前記第2信号合成手段からの出力信
号を供給することにより第1半導体素子群が
ON/OFFする時には第2半導体素子群も位相を
遅らせてON/OFFするようにしたものであるか
ら、第1半導体素子群がOFFした時第2半導体
素子群も位相を遅らせてOFFさせるため、OFF
時の半導体に流れる電流による損失がなくなり、
かつスイツチング損失の負担が片側の半導体素子
群のみにかからず全ての半導体素子群に平等にか
かるようになるという効果が得られるものであ
る。
Effects of the Invention As is clear from the above description, the present invention provides a rotational position detection means for generating a rotational position signal according to the position of the rotor, a signal generation means for generating a stepping signal, and a phase detection means for delaying the phase of the stepping signal. delay means for generating a delayed chopping signal;
a first signal synthesizing means for chopping the rotational position signal in response to the stepping signal; and a second signal synthesizing means for chopping the rotational position signal in response to the phase-delayed chopping signal; By supplying the output from the first signal synthesizing means to the third terminal of the second semiconductor element group and supplying the output signal from the second signal synthesizing means to the third terminal of the second semiconductor element group, the first semiconductor element group
When turning ON/OFF, the second semiconductor element group is also turned ON/OFF with a delay in phase, so when the first semiconductor element group is turned OFF, the second semiconductor element group is also turned OFF with a delay in phase. OFF
Loss due to current flowing through the semiconductor is eliminated,
Moreover, the effect that the burden of switching loss is not applied only to one semiconductor element group but is applied equally to all semiconductor element groups can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は無整流子直流電動機のパワー回路図、
第2図は従来の駆動回路図、第3図は従来の駆動
回路における動作図、第4図は本発明の無整流子
直流電動機のパワー回路図、第5図は同第4図の
駆動回路図、第6図は同第5図の動作図、第7図
は同第4図のチヨツピング時の動作図である。 Q1……トランジスタ、Q2……トランジスタ、
Q3……トランジスタ、Q4……トランジスタ、Q5
……トランジスタ、Q6……トランジスタ、19
……回転位置検出回路(回転位置検出手段)、2
6……信号発生回路(信号発生手段)、28……
遅延回路(遅延手段)、30,32,34……論
理積回路(第1信号合成手段)、31,33,3
5……論理積回路(第2信号合成手段)。
Figure 1 is a power circuit diagram of a non-commutated DC motor.
Fig. 2 is a conventional drive circuit diagram, Fig. 3 is an operation diagram of the conventional drive circuit, Fig. 4 is a power circuit diagram of the commutatorless DC motor of the present invention, and Fig. 5 is the drive circuit of Fig. 4. 6 is an operational diagram of FIG. 5, and FIG. 7 is an operational diagram of FIG. 4 during chopping. Q 1 ...transistor, Q 2 ...transistor,
Q 3 ...transistor, Q 4 ...transistor, Q 5
...Transistor, Q 6 ...Transistor, 19
...Rotational position detection circuit (rotational position detection means), 2
6... Signal generation circuit (signal generation means), 28...
Delay circuit (delay means), 30, 32, 34...AND circuit (first signal synthesis means), 31, 33, 3
5...AND circuit (second signal synthesis means).

Claims (1)

【特許請求の範囲】[Claims] 1 直流電源と、複数個の永久磁石より成る回転
子と、1端が共通に接続され前記回転子に誘導的
に結合された複数個の固定子巻線と、前記回転子
の位置に応じて回転位置信号を発生する回転位置
検出手段と、チヨツピング信号を発生する信号発
生手段と、前記チヨツピング信号の位相を遅らせ
位相遅れチヨツピング信号を発生する遅延手段
と、前記回転位置検出手段と前記信号発生手段と
に接続され前記チヨツピング信号に応じて前記回
転位置信号をチヨツピングする第1信号合成手段
と、前記回転位置検出手段と前記遅延手段とに接
続され前記位相遅れチヨツピング信号に応じて前
記回転位置信号をチヨツピングする第2信号合成
手段と、第1端子がそれぞれ前記固定子巻線の
各々の他端に接続され第2端子が前記直流電源の
1端に接続された第1半導体素子群と、第1端子
前記直流電源の他端に接続され第2端子が前記第
1半導体素子群の各第1端子にそれぞれ接続され
た第2半導体素子群と、前記第1及び第2半導体
素子群の各々の第1端子と第2端子との間に接続
された整流子群と、前記第1半導体素子群の各々
の第3端子に前記第1信号合成手段からの出力信
号を供給する手段と、前記第2半導体素子群の
各々の第3端子に前記第2信号合成手段からの出
力信号を供給する手段とを有する無整流子直流電
動機。
1. A DC power source, a rotor consisting of a plurality of permanent magnets, a plurality of stator windings having one end commonly connected and inductively coupled to the rotor, and a rotor according to the position of the rotor. a rotational position detection means for generating a rotational position signal; a signal generation means for generating a stepping signal; a delay means for delaying the phase of the stepping signal and generating a phase-delayed chopping signal; the rotational position detection means; and the signal generation means. a first signal synthesizing means connected to said rotational position detecting means and said delay means for chopping said rotational position signal in accordance with said stepping signal; a second signal synthesizing means for chopping; a first semiconductor element group each having a first terminal connected to the other end of each of the stator windings and a second terminal connected to one end of the DC power supply; a second semiconductor element group having a terminal connected to the other end of the DC power supply and a second terminal connected to each first terminal of the first semiconductor element group; and a first semiconductor element group of each of the first and second semiconductor element groups. a commutator group connected between a first terminal and a second terminal; means for supplying an output signal from the first signal synthesizing means to a third terminal of each of the first semiconductor element groups; and means for supplying an output signal from the second signal synthesizing means to a third terminal of each of the semiconductor element groups.
JP59084347A 1984-04-25 1984-04-25 Commutatorless dc motor Granted JPS60226791A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59084347A JPS60226791A (en) 1984-04-25 1984-04-25 Commutatorless dc motor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59084347A JPS60226791A (en) 1984-04-25 1984-04-25 Commutatorless dc motor

Publications (2)

Publication Number Publication Date
JPS60226791A JPS60226791A (en) 1985-11-12
JPH0534915B2 true JPH0534915B2 (en) 1993-05-25

Family

ID=13827977

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59084347A Granted JPS60226791A (en) 1984-04-25 1984-04-25 Commutatorless dc motor

Country Status (1)

Country Link
JP (1) JPS60226791A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2886533A1 (en) 2009-08-31 2015-06-24 Evonik Degussa GmbH Use of Organophosphorus compounds based on tetraphenol (TP)-substituted structures

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1107444B1 (en) * 1999-12-06 2007-10-03 Matsushita Electric Industrial Co., Ltd. Motor and disk drive apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2886533A1 (en) 2009-08-31 2015-06-24 Evonik Degussa GmbH Use of Organophosphorus compounds based on tetraphenol (TP)-substituted structures

Also Published As

Publication number Publication date
JPS60226791A (en) 1985-11-12

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