JPH05347299A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH05347299A JPH05347299A JP15507492A JP15507492A JPH05347299A JP H05347299 A JPH05347299 A JP H05347299A JP 15507492 A JP15507492 A JP 15507492A JP 15507492 A JP15507492 A JP 15507492A JP H05347299 A JPH05347299 A JP H05347299A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor device
- oxide film
- diamond
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Formation Of Insulating Films (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置のパッシベイ
ション膜に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a passivation film for a semiconductor device.
【０００２】[0002]
【従来の技術】従来、半導体装置のパッシベイション膜
としては、シリコン酸化膜、シリコン窒化膜及びシリコ
ン酸化膜とシリコン窒化膜の多層膜が用いられるのが通
例であった。2. Description of the Related Art Conventionally, a silicon oxide film, a silicon nitride film, and a multilayer film of a silicon oxide film and a silicon nitride film are usually used as a passivation film of a semiconductor device.
【０００３】[0003]
【発明が解決しようとする課題】しかし、上記従来技術
によると、絶縁耐圧が低く、界面準位密度も大きく、と
りわけ放熱特性が悪いと云う課題があった。However, according to the above-mentioned prior art, there are problems that the withstand voltage is low, the interface state density is high, and the heat dissipation characteristic is particularly bad.
【０００４】本発明は、かかる従来技術の課題を解決
し、絶縁耐圧が高く、界面準位密度も小さく、とりわけ
放熱特性が良い半導体装置のパッシベイション膜を提供
する事を目的とする。An object of the present invention is to solve the problems of the prior art and to provide a passivation film for a semiconductor device having a high withstand voltage, a low interface state density, and particularly good heat dissipation characteristics.
【０００５】[0005]
【課題を解決するための手段】上記課題を解決する為
に、本発明は半導体装置に関し、（１） 半導体表面に
ダイアモンド膜を形成する手段を取る事、及び（２）
半導体表面に酸化膜を形成し、該酸化膜表面にダイアモ
ンド膜を形成する手段を取る事、及び（３） 半導体表
面に酸化膜が形成し、該酸化膜表面に窒化膜を形成し、
該窒化膜表面にダイアモンド膜を形成する手段を取る
事、等の手段を取る。In order to solve the above-mentioned problems, the present invention relates to a semiconductor device, which comprises (1) a means for forming a diamond film on a semiconductor surface, and (2)
Forming an oxide film on the semiconductor surface and forming a diamond film on the oxide film surface, and (3) forming an oxide film on the semiconductor surface and forming a nitride film on the oxide film surface,
Means such as forming a diamond film on the surface of the nitride film are taken.
【０００６】[0006]
【作用】ダイアモンドは、比抵抗が０．６Ｅ１３ｏｈｍ
・ｃｍの絶縁体であり、ドーパントを含まない限り半導
体として扱は無くても良く、且つシリコン等の半導体と
同じく、結晶構造はダイアモンド構造であり、ダイアモ
ンド膜と半導体膜の接合面はストイッキオメトリーの良
好な状態を現出でき、為に、界面準位密度も小さくする
事が出来る作用が有ると共に、ダイアモンドは銅よりも
熱伝導が良好で有り、半導体装置表面にダイアモンド膜
を形成する事により、半導体装置の熱放散を改善出来る
作用が有る。[Function] Diamond has a specific resistance of 0.6E13 ohm.
-Since it is an insulator of cm, it does not have to be treated as a semiconductor unless it contains a dopant, and like a semiconductor such as silicon, the crystal structure is a diamond structure, and the bonding surface between the diamond film and the semiconductor film is stoichiometric. It has the effect that the good state of the metric can be revealed, and therefore the interface state density can be made small, and diamond has better thermal conductivity than copper, and it is necessary to form a diamond film on the surface of the semiconductor device. This has the effect of improving the heat dissipation of the semiconductor device.
【０００７】[0007]
【実施例】以下、実施例により本発明を詳述する。EXAMPLES The present invention will be described in detail below with reference to examples.
【０００８】図１は本発明の一実施例を示す半導体装置
の要部の断面図である。すなわち、シリコンや炭化シリ
コンから成る半導体基板１０１の表面にはソース拡散領
域１０２、ドレイン拡散領域１０３が形成されると共
に、炭化水素ガスのプラズマＣＶＤ法により０．１ミク
ロン厚以下のゲート絶縁膜及び０．５ミクロン厚程度の
フィールド絶縁膜と成るダイアモンド膜１０５及び１０
４を形成し、前記ゲート絶縁膜と成るダイアモンド膜１
０５上にはゲート電極と成る電極１０６が形成されて成
りＭＯＳ型ＦＥＴを構成して成る。本例の場合、ダイア
モンド膜と半導体表面との間の界面準位密度はきわめて
小さく、１０9／ｃｍ2以下と成る。又、ダイアモンド膜
を半導体基板１０１の裏面に形成しても放熱特性は尚改
善される。図２は本発明の他の実施例を示す半導体装置
の要部の断面図である。すなわち、シリコンや炭化シリ
コンから成る半導体基板２０１の表面にはソース拡散領
域２０２、ドレイン拡散領域２０３が形成されると共
に、熱酸化によるシリコン酸化膜から成る０．１ミクロ
ン厚以下のゲート酸化膜及び０．５ミクロン厚程度のフ
ィールド酸化膜と成る酸化膜２０５及び２０４が形成さ
れ、前記ゲート絶縁膜と成る酸化膜２０５上にはゲート
電極と成る電極２０６が形成されて成りＭＯＳ型ＦＥＴ
を構成して成り、前記フィールド酸化膜と成る酸化膜２
０４と前記ゲート電極と成る電極２０６を含む半導体装
置表面には炭化水素ガスのプラズマＣＶＤ法によ０．１
ミクロン厚ないし１ミクロン厚程度のダイアモンド膜２
０７を形成し、該ダイアモンド膜２０７はアルゴン・ス
パッタエッチングやイオン・エッチング等によりホト・
エッチングされてコンタクト穴開け等の加工が成される
て成る。FIG. 1 is a sectional view of a main part of a semiconductor device showing an embodiment of the present invention. That is, a source diffusion region 102 and a drain diffusion region 103 are formed on the surface of a semiconductor substrate 101 made of silicon or silicon carbide, and a gate insulating film having a thickness of 0.1 μm or less and 0 or less are formed by a plasma CVD method of a hydrocarbon gas. Diamond films 105 and 10 to be field insulating films having a thickness of about 5 μm
Diamond film 1 which forms 4 and becomes the gate insulating film
An electrode 106 to be a gate electrode is formed on 05 to form a MOS type FET. In the case of this example, the interface state density between the diamond film and the semiconductor surface is extremely small and is 10 9 / cm 2 or less. Further, even if the diamond film is formed on the back surface of the semiconductor substrate 101, the heat dissipation characteristic is still improved. FIG. 2 is a sectional view of a main part of a semiconductor device showing another embodiment of the present invention. That is, a source diffusion region 202 and a drain diffusion region 203 are formed on the surface of a semiconductor substrate 201 made of silicon or silicon carbide, and a silicon oxide film formed by thermal oxidation and having a thickness of 0.1 μm or less and a gate oxide film of 0 μm or less. A MOS type FET is formed by forming oxide films 205 and 204, each of which is a field oxide film of about 0.5 μm thick, and an electrode 206, which is a gate electrode, on the oxide film 205, which is the gate insulating film.
And an oxide film 2 which constitutes the field oxide film.
04 and an electrode 206 serving as the gate electrode on the surface of the semiconductor device by a hydrocarbon gas plasma CVD method.
Diamond film with a thickness of about 1 to 1 micron
07 is formed, and the diamond film 207 is formed by photo-etching by argon sputter etching or ion etching.
It is formed by etching and processing such as contact hole drilling.
【０００９】図３は本発明のその他の実施例を示す半導
体装置の要部の断面図である。すなわち、シリコンや炭
化シリコンから成る半導体基板３０１の表面にはソース
拡散領域３０２、ドレイン拡散領域３０３が形成される
と共に、熱酸化によるシリコン酸化膜から成る０．１ミ
クロン厚以下のゲート酸化膜及び０．５ミクロン厚程度
のフィールド酸化膜と成る酸化膜３０５及び３０４が形
成され、前記ゲート絶縁膜と成る酸化膜３０５上にはゲ
ート電極と成る電極３０６が形成されて成りＭＯＳ型Ｆ
ＥＴを構成して成り、前記フィールド酸化膜と成る酸化
膜３０４と前記ゲート電極と成る電極３０６を含む半導
体装置表面にはプラズマＣＶＤ法によ１ミクロン厚程度
のシリコン窒化膜から成る窒化膜３０７を形成し、該窒
化膜３０７はプラズマ・エッチング等によりホト・エッ
チングされてコンタクト穴開け等の加工が成され、更に
表面にはダイアモンド膜３０８が形成されて成り、該ダ
イアモンド膜３０８はアルゴン・スパッタエッチングや
イオン・エッチング等によりホト・エッチングされてコ
ンタクト穴開け等の加工が成される。FIG. 3 is a sectional view of a main portion of a semiconductor device showing another embodiment of the present invention. That is, the source diffusion region 302 and the drain diffusion region 303 are formed on the surface of the semiconductor substrate 301 made of silicon or silicon carbide, and the gate oxide film of 0. A MOS type F is formed by forming oxide films 305 and 304 to be a field oxide film having a thickness of about 0.5 μm, and forming an electrode 306 to be a gate electrode on the oxide film 305 to be the gate insulating film.
A nitride film 307 made of a silicon nitride film having a thickness of about 1 micron is formed by plasma CVD on the surface of the semiconductor device including the oxide film 304 serving as the field oxide film and the electrode 306 serving as the gate electrode. The nitride film 307 is photo-etched by plasma etching or the like to be subjected to processing such as contact hole drilling, and a diamond film 308 is further formed on the surface. The diamond film 308 is argon sputter-etched. And photo-etching by ion etching or the like, and processing such as contact hole drilling is performed.
【００１０】尚、本発明は電極配線表面にダイアモンド
膜を形成する場合にも適用出来、皿には半導体装置から
延在せるリード線やリード・フレーム等の表面にダイア
モンド膜を形成する場合にも適用する事が出来る。The present invention can also be applied to the case where a diamond film is formed on the surface of electrode wiring, and the case where a diamond film is formed on the surface of a lead wire or a lead frame extending from a semiconductor device on a dish. It can be applied.
【００１１】[0011]
【発明の効果】本発明により、絶縁耐圧が高く、界面準
位密度も小さく、とりわけ放熱特性が良い半導体装置の
パッシベイション膜を提供する事が出来る効果が有る。According to the present invention, it is possible to provide a passivation film for a semiconductor device having a high withstand voltage, a low interface state density, and particularly good heat dissipation characteristics.
【図１】 本発明の一実施例を示す半導体装置の要部の
断面図である。FIG. 1 is a sectional view of a main part of a semiconductor device showing an embodiment of the present invention.
【図２】 本発明の他の実施例を示す半導体装置の要部
の断面図である。FIG. 2 is a sectional view of a main portion of a semiconductor device showing another embodiment of the present invention.
【図３】 本発明のその他の実施例を示す半導体装置の
要部の断面図である。FIG. 3 is a sectional view of a main portion of a semiconductor device showing another embodiment of the present invention.
１０１、２０１、３０１・・・半導体基板 １０２、２０２、３０２・・・ソース拡散領域 １０３、２０３、３０３・・・ドレイン拡散領域 １０４、１０５、２０７、３０８・・・ダイアモンド膜 １０６、２０６、３０６・・・電極 ２０４、３０４・・・酸化膜 ３０７・・・窒化膜 101, 201, 301 ... Semiconductor substrate 102, 202, 302 ... Source diffusion region 103, 203, 303 ... Drain diffusion region 104, 105, 207, 308 ... Diamond film 106, 206, 306. ..Electrodes 204, 304 ... Oxide film 307 ... Nitride film
Claims (3)
れて成る事を特徴とする半導体装置。1. A semiconductor device characterized in that a diamond film is formed on a semiconductor surface.
化膜表面にはダイアモンド膜が形成されて成る事を特徴
とする半導体装置。2. A semiconductor device comprising an oxide film formed on the surface of a semiconductor and a diamond film formed on the surface of the oxide film.
化膜表面には窒化膜が形成され、該窒化膜表面にはダイ
アモンド膜が形成されて成る事を特徴とする半導体装
置。3. A semiconductor device comprising an oxide film formed on a semiconductor surface, a nitride film formed on the oxide film surface, and a diamond film formed on the nitride film surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15507492A JPH05347299A (en) | 1992-06-15 | 1992-06-15 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15507492A JPH05347299A (en) | 1992-06-15 | 1992-06-15 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05347299A true JPH05347299A (en) | 1993-12-27 |
Family
ID=15598088
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15507492A Pending JPH05347299A (en) | 1992-06-15 | 1992-06-15 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05347299A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6271594B1 (en) | 1997-05-29 | 2001-08-07 | Nec Corporation | Semiconductor device and method of manufacturing the same |
| JP2002524860A (en) * | 1998-08-28 | 2002-08-06 | クリー インコーポレイテッド | Stacked dielectric in silicon carbide semiconductor structure |
| JP2021034546A (en) * | 2019-08-23 | 2021-03-01 | 富士通株式会社 | Semiconductor device, method of manufacturing semiconductor device, and electronic device |
-
1992
- 1992-06-15 JP JP15507492A patent/JPH05347299A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6271594B1 (en) | 1997-05-29 | 2001-08-07 | Nec Corporation | Semiconductor device and method of manufacturing the same |
| US6274417B1 (en) | 1997-05-29 | 2001-08-14 | Nec Corporation | Method of forming a semiconductor device |
| JP2002524860A (en) * | 1998-08-28 | 2002-08-06 | クリー インコーポレイテッド | Stacked dielectric in silicon carbide semiconductor structure |
| JP5021860B2 (en) * | 1998-08-28 | 2012-09-12 | クリー インコーポレイテッド | Multilayer dielectrics in silicon carbide semiconductor structures |
| JP2021034546A (en) * | 2019-08-23 | 2021-03-01 | 富士通株式会社 | Semiconductor device, method of manufacturing semiconductor device, and electronic device |
| US11923447B2 (en) | 2019-08-23 | 2024-03-05 | Fujitsu Limited | Semiconductor device, method of manufacturing semiconductor device, and electronic device |
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