JPH05343811A - Semiconductor light-emitting element and its manufacture - Google Patents

Abstract

PURPOSE:To reduce the leakage current of an element and to enhance the light-emitting efficiency and the modulation characteristic of the element by a method wherein a current-blocking layer is constituted of the following: a low-concentration p-type semiconductor layer with which the side face of at least a light-emitting region is covered; and a high-resistance semiconductor layer which is formed at its outside and which is provided with a deep donor level or a deep acceptor level. CONSTITUTION:A current-blocking layer 10 is formed as a three-layer structure which is composed of a p<-> type InP layer 11, a Ti-doped InP layer 12 and an Fe-doped InP layer 13. In the Ti-doped semi-insulating InP layer 12, Ti acts as a hole trap; in the Fe-doped semi-insulating InP layer 13, Fe acts as an electron trap. As a result, the p<-> type InP layer 11 acts as a barrier which restrains carriers from being injected, and the Ti-doped InP layer 12 and the Fe-doped InP layer 13 act for restraining a recombination current by means of the double injection of electrons and holes. Thereby, it is possible to reduce a leakage current which flows by bypassing the outside of an active layer 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor technology, and further to a semiconductor light emitting device having an embedded current blocking layer and a method for manufacturing the same.

[0002]

2. Description of the Related Art In a semiconductor light emitting device using a high resistance semiconductor layer as a current blocking layer, parasitic capacitance of a portion other than a pn junction which becomes a light emitting region is reduced, so that a CR time constant of the device is reduced and high speed is achieved. Since it can be modulated, research and development have been actively conducted in recent years. Moreover, the high resistance semiconductor layer as the current blocking layer can be formed by the vapor phase growth method, and improvement in mass productivity can be expected. Therefore, attempts have been made to apply a semiconductor laser using a high-resistance semiconductor layer as a buried current blocking layer to a light source for optical communication that requires high-speed modulation characteristics.

FIG. 7 shows a conventional example of a semiconductor laser using a high resistance semiconductor layer as a buried type current block layer. In the semiconductor laser shown in FIG. 7, on the n-type InP substrate 1, an n-type InP clad layer 2, an InGaAsP active layer 3, a p-type InP clad layer 4 and a p-type InGaA are provided.
A light emitting region having a double-heterojunction structure composed of the sP contact layer 5 and having a mesa cross-section is formed linearly in a direction orthogonal to the paper surface, and a current blocking layer 10 made of high-resistance InP is buried and grown on both sides of the light-emitting region. Has been converted. Most of the upper surface of the element is covered with an insulating film 6 such as silicon oxide, and a contact port 6a is formed in the insulating film 6 corresponding to the mesa type light emitting region, and a p-type ohmic electrode 7 is interposed. The p-type electrode 8 is the contact layer 5 described above.
Is formed so as to contact with. InP substrate 1
An n-type electrode 9 is formed on the back surface of the.

In the semiconductor laser, leak current is prevented by using semi-insulating InP doped with Fe (iron) as the high resistance semiconductor layer forming the current blocking layer 10.

[0005]

However, the present inventor has revealed that the above-mentioned conventional semiconductor laser has the following problems.

That is, Fe-doped semi-insulating In
In P, Fe acts as an electron trap because it forms a deep acceptor level in the forbidden band of InP. On the other hand, in the semiconductor laser of FIG. 7, focusing on the sectional structure along the arrow A, the current block layer 10 made of Fe-doped InP is interposed between the p-type InP clad layer 4 and the n-type InP clad layer 2. Therefore, p / SI / n (p
Type semiconductor / semi-insulating semiconductor / n-type semiconductor) structure.

Therefore, when an AC voltage is applied across the p / SI / n structure, the n-type InP clad layer 2 to F
The electrons injected into the e-doped InP are captured by the Fe electron trap, and the Fe-doped IP is introduced from the p-type InP cladding layer 4.
The holes injected into the nP are recombined with the electrons already trapped in the Fe electron trap, and the current blocking layer 10
The recombination current will flow into. As a result, in the semiconductor laser of FIG. 7, when the drive current is increased, the leakage current of the current block layer 10 due to the recombination current becomes remarkable, which causes a decrease in luminous efficiency and a saturation of light output. Becomes

Further, conventionally, in the step of forming the mesa type light emitting region, side etching progresses particularly when the active layer 3 is etched, and a groove-like step 21 is generated. When the step 21 is present, in the step of vapor-depositing the Fe-doped InP layer outside the mesa-shaped light emitting region after the etching, the atoms forming the corners of the clad layers 2 and 4 are heated in the temperature rising process immediately before the start of growth. (In, P) moves to the inner part of the step part 21 by mass transfer and is deposited, the step part 21 is filled, and then the Fe-doped InP layer 10 is grown by vapor phase growth. At this time, the n-type clad layer 2 and the p-type clad layer 4
Since the impurities therein are also taken into the solid phase growth layer 22 at the inner part of the step portion, the solid phase growth layer 22 becomes n-type when the concentration of the n-type cladding layer 2 is higher, for example. Therefore, it has been found that there is a problem that a leak current flows from the p-type cladding layer 4 to the n-type cladding layer 2 through the solid phase growth layer 22.

The present invention has been made in view of the above problems, and in a semiconductor light emitting device having a buried type current block layer made of a high resistance semiconductor layer, leakage current is reduced and luminous efficiency is improved. And improving the modulation characteristics.

[0010]

To achieve the above object, the present invention has a p-type and n-type clad layer on a semiconductor substrate and an active layer sandwiched between these clad layers. In a semiconductor light emitting device in which a light emitting region including the light emitting region is formed in a mesa shape in cross section, and a high resistance semiconductor serving as a current blocking layer is embedded outside the light emitting region, the current blocking layer covers at least a side surface of the light emitting region. And a high-resistance semiconductor layer having a deep donor level or a high-resistance semiconductor layer having a deep acceptor level formed so as to cover the outside of the low-concentration p-type semiconductor layer. I did it.

Further, in the step of burying and growing the semiconductor to be the current blocking layer, a temperature in a range in which the semiconductor does not grow on the insulating film mask is selected as a growth temperature, and a p-type impurity is added in a temperature rising process immediately before the start of growth. Introducing a dopant gas containing the same, making the solid-phase growth layer that grows in the step portion on the side surface of the light emitting region by mass transfer at a temperature lower than the above growth temperature to p-type, and then performing embedded growth of a high-resistance semiconductor. did.

[0012]

According to the above means, the low-concentration P-type semiconductor / semi-insulating semiconductor / low-concentration P-type semiconductor structure is interposed outside the active layer and between the n-type cladding layer and the p-type cladding layer. The low-concentration P-type semiconductor layer serves as a barrier for blocking the injection of carriers and can suppress the leak current flowing around the outside of the active layer. At the same time, the solid phase growth layer formed by mass transfer in the inner part of the step portion generated by the side etching of the side surface of the mesa-shaped light emitting region is made p-type, so that the leakage current near the side surface of the active layer can also be prevented. ..

[0013]

EXAMPLES Examples of application of the present invention to a semiconductor laser using an InP-based material will be described below. FIG. 1 is a sectional view of a semiconductor laser according to this embodiment, FIG. 2 is an enlarged view of a main part thereof, and FIGS. 3 to 6 are sectional views showing a manufacturing process in order of steps.

In this example, first, a sulfur-doped n-type InP substrate 1 processed so that the (100) plane was the main surface was doped with sulfur by metal organic chemical vapor deposition to have an electron concentration of 1 × 10 ^18. cm- ³ of n-type InP clad layer 2 of 1 μm
And an InGaAsP active layer 3 having a bandgap of emission wavelength of 1.5 μm is epitaxially grown thereon to a thickness of 0.12 μm. Subsequently, zinc-doped p-type InP clad layer 4 having a hole concentration of 8 × 10 ¹⁷ cm ⁻³
To a thickness of 1.5 μm, and a p-type InGaAsP contact layer 5 having a hole concentration of 1 × 10 ¹⁹ cm ⁻³ doped with zinc is epitaxially grown thereon to a thickness of 1.5 μm (FIG. 3).

Next, a silicon oxide film is formed on the contact layer 5 by the CVD method or the like, and the width of 2.5 μm is formed along the <011> direction (the direction orthogonal to the plane of the drawing) by the photolithography technique. Linear silicon oxide film 3
Form 0. Then, with the silicon oxide film 30 as a mask, the InGaAsP mixed crystal uses an etchant composed of a mixed solution of sulfuric acid and hydrogen peroxide solution, and the InP selectively and chemically alternates by using a mixed solution of hydrochloric acid and phosphoric acid. By etching, the clad layer 2, the active layer 3, the clad layer 4 and the contact layer 5 are etched to form a light emitting region 20 having a height of 3.7 μm and a mesa-shaped cross section with substantially vertical sidewalls. During this selective etching,
Since the side etching proceeds at different speeds depending on each layer, both ends of the silicon oxide film 30 project like eaves,
A groove-like step portion 21 is formed in the active layer 3 portion (FIG. 4).

After that, in order to fill both sides of the mesa type light emitting region 20 with a semiconductor, the substrate 1 is put into a MOCVD apparatus to heat the substrate and raise the temperature, and then epitaxial growth of InP is started. At this time, the growth temperature is set to 580 to 65
By setting an appropriate value of 0 ° C. (for example, 610 ° C.), it is possible to prevent InP from growing on the silicon oxide film 30 used as the etching mask.

Further, in this embodiment, P
A source gas of a group V element such as H ₃ is introduced into the growth chamber to maintain the vapor pressure of the group V element at a dissociation pressure or higher, thereby preventing the group V element from dissociating from the substrate. Immediately before the temperature of the substrate 1 reaches a temperature of 400 ° C. at which InP mass transfer starts, Zn (C ₂ H ₅ ) ₂ that is a P-type dopant gas is introduced.
The concentration of the dopant gas in the growth gas is such that the surface concentration by vapor phase diffusion at the growth temperature is, for example, 5 × 10 5.
^The growth gas is introduced after a certain period of time (for example, 10 minutes) in order to stabilize the temperature of the substrate at the growth temperature while limiting the hole concentration to ¹⁷ cm- ³ or less. In the meantime, the corners 2a of the InP clad layers 2 and 4,
In and P atoms move from 4a toward the inner part of the step portion 21 of the active layer 3 by mass transfer to be deposited, and the InP solid-phase growth layer 22 is formed in the inner part of the step portion 21. At this time, since Zn (C ₂ H ₅ ) ₂ is introduced into the growth chamber, even if n-type impurities are supplied from the highly-doped InP cladding layer 2, the InP solid-phase growth layer 22 is p-type. It becomes a type semiconductor layer (FIG. 5).

When InP to be a current blocking layer is buried and grown on both sides of the mesa type light emitting region 20, TMIn (trimethylindium) and PH ₃ are used as a growth gas.
Supply (phosphine). Zn (C ₂ H ₅ ) ₂ is continuously introduced as a dopant gas until the InP layer grows to a thickness (0.12 μm) or more of the active layer 3. As a result, a thin p- layer covering both sides of the mesa-shaped light emitting region is formed.
The type InP layer 11 is formed. This p-type InP layer 11
Is preferably thicker than the thickness of the active layer 3 (1 μm in the embodiment) in order to completely fill the step portion 21 and not more than a thickness (3000 Å) at which a through current does not flow. Therefore, in this embodiment, the p − -type InP layer 11 has 2000 Å
At the time of the growth, the dopant gas is changed to Zn (C ₂ H ₅ )
_The gas containing Ti (titanium) is switched from ₂ to grow the Ti-doped InP layer 12. Ti-doped InP layer 12
At a thickness of about 1.6 μm, the dopant gas is switched from a gas containing Ti to a gas containing Fe, until the same height as that of the mesa-shaped light emitting region 20 is reached.
The doped InP layer 13 is grown (FIG. 6).

After that, the silicon oxide film 3 used as a mask
0 is removed with a hydrofluoric acid-based etching solution, and then an insulating film 6 such as silicon oxide is deposited on the mesa type light emitting region 20 and the Fe-doped InP layer 13, and the insulating film 6 is covered with the mesa type light emitting region 20. After forming the contact opening 6a corresponding to, the p-type ohmic electrode 7 and the p-type electrode 8 are further formed thereon. Further, the n-type electrode 9 is formed on the back surface of the InP substrate 1. As a result, a semiconductor laser having the structure shown in FIG. 1 is completed.

In the semiconductor laser of FIG. 1, the current blocking layer 10 is a p-type InP layer 11 and Ti-doped InP.
Since it has a three-layer structure of the layer 12 and the Fe-doped InP layer 13, focusing on the cross section taken along the line BB in FIG. 2 showing the enlarged structure, the p-type InP cladding layer 4 and the n-type In
P / p- / SI / p- / n (p
Type semiconductor / p-type semiconductor / Ti-doped semi-insulating semiconductor /
There is a p-type semiconductor / n-type semiconductor) structure. Also, A
Focusing on the cross section along the line -A, between the p-type InP clad layer 4 and the n-type InP clad layer 2, p / p- / S
I / SI / SI / p- / n (p-type semiconductor / p-type semiconductor /
There is a Ti-doped semi-insulating semiconductor / Fe-doped semi-insulating semiconductor / Ti-doped semi-insulating semiconductor / p-type semiconductor / n-type semiconductor) structure.

Here, the Ti-doped semi-insulating InP layer 12
Ti acts as a hole trap, and Fe acts as an electron trap in the Fe-doped semi-insulating InP layer 13. Therefore, the p − -type InP layer 11 serves as a barrier that blocks carrier injection, and the Ti-doped InP layer 1
2 and the Fe-doped InP layer 13 serve to suppress recombination current due to double injection of electrons and holes. As a result, the leak current flowing around the outside of the active layer 4 can be significantly reduced. Further, since the solid phase growth layer 22 formed by mass transfer in the inner part of the step portion 21 generated by the side etching of the side surface of the mesa-shaped light emitting region 20 is made p-type, it passes through the solid phase growth layer 22 and becomes p-type. The current flowing from the n-type InP clad layer 4 to the n-type InP clad layer 2 can be suppressed, and the leak current near the side surface of the active layer 4 can be prevented. Further, in the semiconductor laser of the example, since the current blocking layer has a three-layer structure, the total parasitic capacitance can be set to several pF or less, so that it can be used as a light source for optical communication of several gigabit class per second. It is possible.

In the above embodiment, the current blocking layer 1
0 is a p-type InP layer 11, a Ti-doped InP layer 12, F
Although the three-layer structure of the e-doped InP layer 13 is used, p-type In
A two-layer structure of the P layer 11 and the Ti-doped InP layer 12 or a two-layer structure of the p − type InP layer 11 and the Fe-doped InP layer 13 may be used. Such a structure can be easily realized only by changing the supply control of the growth gas in the process of the above embodiment. Further, in the above embodiment, the p − -type InP layer 11 is formed by Zn doping and the InP layer 13 is formed by Ti doping. However, instead of Zn, Cd (cadmium) or Mg (magnesium) is used instead of Ti. May be doped with Co (cobalt) or V (vanadium).

Further, in the above embodiment, the one applied to the semiconductor laser has been described, but the present invention is an edge emitting type light emitting diode, a surface emitting type light emitting diode or the like as long as it is a light emitting element having a buried type current block layer. Can be applied to. Further, in the embodiment, the same material as the clad layer is used as the semiconductor material for the buried growth,
The material is not necessarily the same as that of the clad layer as long as it is a semiconductor having a band gap width and a refractive index smaller than that of the semiconductor material of the active layer and capable of being grown without lattice mismatch with the substrate.

[0024]

As described above, the present invention has a p-type clad layer, an n-type clad layer, and an active layer sandwiched between these clad layers on a semiconductor substrate, and a light emitting region including the active layer is provided. In a semiconductor light emitting device which is formed in a mesa shape in cross section and in which a high resistance semiconductor to be a current blocking layer is embedded outside the light emitting region, the current blocking layer is coated with a low concentration p that covers at least a side surface of the light emitting region. Type semiconductor layer and a high resistance semiconductor layer having a deep donor level or a high resistance semiconductor layer having a deep acceptor level formed so as to cover the outside of the low concentration p-type semiconductor layer. Therefore, at least the low-concentration P-type semiconductor / semi-insulating semiconductor / low-concentration P-type semiconductor structure is interposed outside the active layer and between the n-type cladding layer and the p-type cladding layer. Therefore, the low-concentration P-type semiconductor layer serves as a barrier for preventing the injection of carriers, and it is possible to suppress the leak current flowing around the outside of the active layer, thereby improving the luminous efficiency and the modulation characteristic. ..

Further, in the step of burying and growing the semiconductor to become the current blocking layer, a temperature in a range in which the semiconductor does not grow on the insulating film mask is selected as a growth temperature, and a p-type impurity is added in a temperature raising process immediately before the start of growth. A dopant gas containing the same is introduced, and the solid-phase growth layer that grows in the step portion on the side surface of the light emitting region by mass transfer at a temperature lower than the above growth temperature is made to be p-type, and then embedded growth of the high resistance semiconductor is performed. Therefore, the current flowing from the p-type InP clad layer 4 to the n-type InP clad layer 2 can be suppressed, and the leak current near the side surface of the active layer can also be prevented.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing an embodiment in which the present invention is applied to a semiconductor laser.

FIG. 2 is an enlarged cross-sectional view showing an enlarged main part of a semiconductor laser according to an example.

FIG. 3 is a sectional view showing a first step of a manufacturing process of the semiconductor laser according to the example.

FIG. 4 is a sectional view showing a second step of the manufacturing process of the semiconductor laser according to the example.

FIG. 5 is a cross-sectional view showing a third step of the manufacturing process of the semiconductor laser according to the example.

FIG. 6 is a cross-sectional view showing a fourth step of the manufacturing process of the semiconductor laser according to the example.

FIG. 7 is a sectional view showing an example of a conventional semiconductor laser.

[Explanation of symbols]

 1 InP substrate 2 n-type InP clad layer 3 InGaAsP active layer 4 p-type InP clad layer 5 InGaAsP contact layer 6 insulating film 7 ohmic electrode 8 p-type electrode 9 n-type electrode 10 current blocking layer 11 p-type InP layer (low concentration) Semiconductor layer) 12 Ti-doped InP layer (high-resistance semiconductor layer) 13 Fe-doped InP layer (high-resistance semiconductor layer) 20 Mesa type light emitting region 21 Step portion 22 Solid phase growth layer

Claims (3)

[Claims] 1. A p-type cladding layer and n on a semiconductor substrate.
A type clad layer and an active layer sandwiched between these clad layers, a light emitting region including the active layer is formed in a mesa cross section, and a high resistance semiconductor to be a current blocking layer is embedded outside the light emitting region. In the semiconductor light emitting device, the current blocking layer has a low concentration p-type semiconductor layer covering at least the side surface of the light emitting region, and the low concentration p layer.
A semiconductor light emitting device comprising a high resistance semiconductor layer having a deep donor level or a high resistance semiconductor layer having a deep acceptor level formed so as to cover the outside of the type semiconductor layer. 2. The current blocking layer comprises a low-concentration p-type semiconductor layer covering at least a side surface of the light-emitting region, and a deep donor level formed so as to cover the outside of the low-concentration p-type semiconductor layer. 2. The semiconductor light emitting device according to claim 1, comprising a high resistance semiconductor layer having the high resistance semiconductor layer and a high resistance semiconductor layer having a deep acceptor level formed so as to cover the outside of the high resistance semiconductor layer. 3. A p-type cladding layer and n on a semiconductor substrate.
A step of laminating and growing a type clad layer and an active layer sandwiched between these clad layers; a step of selectively etching this laminated growth film using an insulating film as a mask to form a light emitting region having a cross-section mesa shape; In the method for manufacturing a semiconductor light emitting device, which comprises a step of burying a semiconductor outside the light emitting region, the step of burying a semiconductor to be the current blocking layer is performed at a temperature within a range where a semiconductor does not grow on the insulating film mask. The temperature is selected, a dopant gas containing p-type impurities is introduced in the temperature rising process immediately before the start of growth, and a solid phase growth layer that grows on the stepped portion on the side surface of the light emitting region by mass transfer at a temperature lower than the above growth temperature is formed. A method for manufacturing a semiconductor light emitting device, characterized in that a high resistance semiconductor is buried and grown after being made p-type.