JPH05343344A - Ion implanting method for manufacture of semiconductor device - Google Patents

Ion implanting method for manufacture of semiconductor device

Info

Publication number
JPH05343344A
JPH05343344A JP15230692A JP15230692A JPH05343344A JP H05343344 A JPH05343344 A JP H05343344A JP 15230692 A JP15230692 A JP 15230692A JP 15230692 A JP15230692 A JP 15230692A JP H05343344 A JPH05343344 A JP H05343344A
Authority
JP
Japan
Prior art keywords
axis
channeling
semiconductor substrate
ion
ion implantation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15230692A
Other languages
Japanese (ja)
Inventor
Masaaki Shimada
昌明 島田
Hiroya Mori
浩也 森
Yuji Koseki
祐司 小関
Muneyuki Matsumoto
宗之 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP15230692A priority Critical patent/JPH05343344A/en
Publication of JPH05343344A publication Critical patent/JPH05343344A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent channeling uniformly as an entire semiconductor substrate without necessity of complicated steps by forming a direction of a crystal face on a surface of the substrate previously on a surface in which the channeling bardly occurs in the case of ion implanting, or ion implanting from a direction in which the channeling bardly occurs. CONSTITUTION:A semiconductor substrate 1 (100) is inclined 3 deg. to 9 deg. toward two directions of <0, 1, 1> axis (X-axis) and <0, -1, 1> axis (Y-axis) perpendicular to <1, 0, 0> axis (Z-axis) perpendicular to the surface of the substrate 1. Further, impurities are ion implanted from a direction in which a difference of inclining angles of the <0, 1, 1> axis direction and the <0, -1, 1> axis direction is 3 deg. or more. Thus, when the ion implantation is conducted by a method for inclining 3 to 9 deg., a channel region becomes minimum to an incident direction of an ion beam, and hence channeling hardly occurs. Thus, channeling can be prevented uniformly as the entire substrate effectively without necessity of complicated steps.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、半導体装置の製造に
おける不純物拡散などで用いられる半導体基板へのイオ
ン注入方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for implanting ions into a semiconductor substrate used for impurity diffusion in the manufacture of semiconductor devices.

【0002】[0002]

【従来の技術】半導体装置で用いられる半導体基板は、
単結晶材料(例えばシリコン)が多く使用されている。
2. Description of the Related Art Semiconductor substrates used in semiconductor devices are
Single crystal materials (eg silicon) are often used.

【0003】単結晶シリコンは、原子が規則的に配列し
ており、立方位面すなわち<1,0,0>,<1,1,
0>,<1,1,1>軸方向などに原子の存在しない領
域「チャネル」が存在する。
In single crystal silicon, atoms are regularly arranged, and the orientation planes, that is, <1,0,0>, <1,1,
There is a region “channel” where atoms do not exist in the 0>, <1, 1, 1> axis directions.

【0004】一方、半導体装置を製造する過程で不純物
拡散層を形成する場合、イオン注入法が一般に用いられ
ている。しかしながら、このイオン注入法で、半導体基
板表面に垂直な方向で不純物を注入すると、不純物原子
は、Si原子との衝突によるエネルギー損失を受けず
に、原子配列間の前記チャネルを深い位置まで進入す
る。すなわちチャネリング現象が生ずる。
On the other hand, when forming an impurity diffusion layer in the process of manufacturing a semiconductor device, an ion implantation method is generally used. However, when impurities are implanted in the direction perpendicular to the surface of the semiconductor substrate by this ion implantation method, the impurity atoms enter the channel between the atomic arrangements to a deep position without undergoing energy loss due to collision with Si atoms. .. That is, a channeling phenomenon occurs.

【0005】従来、このチャネリング現象を防止する方
法として、以下の方法が考えられている。
Conventionally, the following method has been considered as a method for preventing this channeling phenomenon.

【0006】(1)半導体基板をイオンビームに対し、
わずかに傾斜した方向からイオン注入を行う方法。
(1) The semiconductor substrate for the ion beam
Ion implantation from a slightly inclined direction.

【0007】(2)非晶質の酸化膜を半導体基板表面に
形成し、これを介してイオン注入を行う方法。
(2) A method of forming an amorphous oxide film on the surface of a semiconductor substrate and performing ion implantation through the film.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、従来の
方法のうち、前記(1)の方法では、チャネリング防止
効果が不十分で確実に防止することは出来ない。特に深
い拡散層(ウェル層など)を得たい場合、イオン注入の
加速エネルギーを大きくする必要があり、その様な場合
ほとんど効果がない。
However, among the conventional methods, the method (1) is insufficient in the effect of preventing channeling and cannot be reliably prevented. Particularly when it is desired to obtain a deep diffusion layer (well layer, etc.), it is necessary to increase the acceleration energy of ion implantation, and in such a case, there is almost no effect.

【0009】また、前記(2)の方法では、チャネリン
グ防止効果は高いが、わざわざ非晶質の酸化膜を形成し
なければならず、工程が煩雑となる問題があった。
Further, although the method (2) has a high effect of preventing channeling, it has the problem that the process is complicated because an amorphous oxide film has to be formed.

【0010】本発明は、以上述べたチャネリングを確実
に防止し、かつ、煩雑な工程を必要としない半導体基板
及びイオン注入方法を提供することを目的とする。
It is an object of the present invention to provide a semiconductor substrate and an ion implantation method that reliably prevent the above-mentioned channeling and do not require complicated steps.

【0011】[0011]

【課題を解決するための手段】前記目的のため本発明
は、(100)面の半導体基板面に垂直な<1,0,0
>軸(座標で言えばz軸)方向に直交する<0,1,1
>軸(x軸)と<0,−1,1>軸(y軸)又は、<
0,−1,−1>軸と<0,−1,1>軸、又は<0,
−1,−1>軸と<0,1,−1>軸、又は<0,1,
1>軸と<0,1,−1>軸のどれか2方向に対して3
°から9°傾斜し、かつ、それぞれの傾斜角度の差が3
°以上ある方向でイオン注入を行うようにするか、もし
くは、半導体基板の面方位を(100)面から、上記イ
オン注入方向を満足するように、傾斜させるようにした
ものである。
For the above-mentioned purpose, the present invention is directed to <1,0,0 perpendicular to the (100) plane of the semiconductor substrate.
<0,1,1 orthogonal to the> axis (z axis in terms of coordinates)
> Axis (x-axis) and <0, -1,1> axis (y-axis) or <
0, -1, -1> axis and <0, -1, 1> axis, or <0,
-1, -1> axis and <0, 1, -1> axis, or <0, 1,
3 for any one of the 1> axis and the <0,1, -1> axis
Inclination from 9 ° to 9 °, and the difference in each inclination angle is 3
The ion implantation is performed in a certain direction or more, or the plane orientation of the semiconductor substrate is tilted from the (100) plane so as to satisfy the ion implantation direction.

【0012】[0012]

【作用】前述のように本発明は、イオン注入を行うと
き、半導体基板表面の結晶面方位を、予めチャネリング
を起し難い面とするか、もしくは、チャネリングを起し
難い方向からイオン注入を行うようにしたので、煩雑な
工程を必要とせず、効果的にかつ、半導体基板全体とし
て均一にチャネリングを防止することが出来、トランジ
スタの特性(特にしきい値電圧)を安定にすることが出
来る。
As described above, according to the present invention, when performing ion implantation, the crystal plane orientation of the surface of the semiconductor substrate is set to a surface in which channeling is difficult to occur in advance, or ion implantation is performed from a direction in which channeling is difficult to occur. As a result, complicated steps are not required, channeling can be prevented effectively and uniformly over the entire semiconductor substrate, and transistor characteristics (particularly threshold voltage) can be stabilized.

【0013】[0013]

【実施例】図1は、本発明の実施例における不純物のイ
オン注入角度の範囲を図示したものであり、図中の斜線
部分が本実施例の注入角度範囲である。同図(aa)
(ba)に示す様に、(100)半導体基板1表面に垂
直な<1,0,0>軸(z軸)に直交する例えば<0,
1,1>軸(x軸)と<0,−1,1>軸(y軸)の2
つの方向に向けて3°から9°傾け、かつ、<0,1,
1>軸方向の傾斜角度(図1(a))と<0,−1,1
>軸方向の傾斜角度(図1(b))の差が3°以上ある
方向から不純物イオンを注入する。このような注入角度
の範囲は<0,1,1><0,−1,1><0,−1,
−1><0,1,−1>軸の4方向のうちの2方向に対
して3°〜9°傾ける組合せがあるので、図1(c)に
示すように8つの領域が存在する。従って前述したよう
に、<0,1,1>と<0,−1,1>、<0,−1,
−1>と<0,−1,1>、<0,−1,−1>と<
0,1,−1>、<0,1,1>と<0,1,−1>の
各2方向の軸に向けて傾ける方向がそれぞれ2領域あ
り、8領域となる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the range of the ion implantation angle of impurities in the embodiment of the present invention, and the hatched portion in the figure is the implantation angle range of the present embodiment. The same figure (aa)
As shown in (ba), the (100) semiconductor substrate 1 is perpendicular to the <1, 0, 0> axis (z axis) perpendicular to the surface, for example, <0,
2 of 1,1> axis (x axis) and <0, -1,1> axis (y axis)
Tilt from 3 ° to 9 ° in one direction and <0,1,
1> Inclination angle in the axial direction (Fig. 1 (a)) and <0, -1, 1
> Impurity ions are implanted from a direction in which the difference between the inclination angles in the axial direction (FIG. 1B) is 3 ° or more. The range of such implantation angles is <0,1,1><0,-1,1><0, -1,
Since there is a combination of inclining by 3 ° to 9 ° with respect to two of the four directions of the −1><0,1,−1> axis, there are eight regions as shown in FIG. Therefore, as described above, <0,1,1> and <0, -1,1>, <0, -1,
-1> and <0, -1, 1>, <0, -1, -1> and <
There are two areas each of which is inclined toward the axes of two directions of 0, 1, -1>, <0, 1, 1> and <0, 1, -1>, which is 8 areas.

【0014】前述のイオン注入角度を、2方向に対して
傾けてイオン注入を行う他に、半導体基板自体を<1,
0,0>軸と垂直な例えば<0,1,1>軸と<0,−
1,1>軸の2つの方向に3°から9°傾けかつ、<
0,−1,1>軸方向の傾斜角度と<0,−1,1>軸
方向の傾斜角度の差が3°以上ある方向が半導体基板表
面の結晶軸となるように、半導体基板を設定することで
も実現できる。その際、イオン注入は、垂直な(水平に
対して)方向からで良い。つまり前述のイオン注入角度
を傾けるのと同等である。
In addition to performing the ion implantation by tilting the above-mentioned ion implantation angle with respect to two directions, the semiconductor substrate itself is set to <1,
For example, <0,1,1> axis and <0,-
Tilted in the two directions of the 1,1> axis from 3 ° to 9 °, and <
The semiconductor substrate is set such that the direction in which the difference between the tilt angle in the 0, -1,1> axis direction and the tilt angle in the <0, -1,1> axis direction is 3 ° or more is the crystal axis of the semiconductor substrate surface. It can also be realized by doing. In that case, the ion implantation may be from a vertical (with respect to the horizontal) direction. That is, it is equivalent to tilting the ion implantation angle described above.

【0015】以上のように3°から9°傾ける方法でイ
オン注入を行うと、イオンビームの入射方向に対して前
述したチャネル領域が最小となるので、チャネリングが
起り難い。
When the ion implantation is performed by the method of tilting from 3 ° to 9 ° as described above, the channel region described above is minimized in the incident direction of the ion beam, so that channeling is unlikely to occur.

【0016】[0016]

【発明の効果】以上、詳細に説明したように本発明によ
れば、半導体基板表面の結晶面方位を予めチャネリング
を起し難い面とするか、もしくは、チャネリングを起し
難い方向からイオン注入を行うようにしたので、煩雑な
工程を必要とせず、効果的にかつ、半導体基板全体とし
て均一にチャネリングを防止することが出来、トランジ
スタの特性(特にしきい値電圧)を安定にすることが出
来る。
As described above in detail, according to the present invention, the crystal plane orientation on the surface of the semiconductor substrate is made to be a surface in which channeling is difficult to occur in advance, or ion implantation is performed from a direction in which channeling is difficult to occur. Since it is performed, complicated steps are not required, channeling can be prevented effectively and uniformly over the entire semiconductor substrate, and transistor characteristics (particularly threshold voltage) can be stabilized. ..

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例説明図FIG. 1 is an explanatory view of an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 半導体基板(ウェハー) 1 Semiconductor substrate (wafer)

───────────────────────────────────────────────────── フロントページの続き (72)発明者 松本 宗之 東京都港区虎ノ門1丁目7番12号 沖電気 工業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Muneyuki Matsumoto 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体装置の製造において不純物などを
イオン注入するとき、半導体基板表面に垂直な方向であ
るz軸より、前記z軸に直行するx軸と前記x軸及び前
記z軸に直交するy軸との両方向へ向けて3°ないし9
°傾けた方向から前記半導体基板にイオン注入を行なう
ことを特徴とする半導体装置の製造におけるイオン注入
方法。
1. When ion-implanting impurities or the like in the manufacture of a semiconductor device, an x-axis perpendicular to the z-axis and a direction orthogonal to the z-axis and the x-axis and the z-axis are orthogonal to the z-axis which is a direction perpendicular to the surface of the semiconductor substrate. 3 ° to 9 in both directions with y-axis
An ion implantation method for manufacturing a semiconductor device, wherein ions are implanted into the semiconductor substrate from a tilted direction.
JP15230692A 1992-06-11 1992-06-11 Ion implanting method for manufacture of semiconductor device Pending JPH05343344A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15230692A JPH05343344A (en) 1992-06-11 1992-06-11 Ion implanting method for manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15230692A JPH05343344A (en) 1992-06-11 1992-06-11 Ion implanting method for manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05343344A true JPH05343344A (en) 1993-12-24

Family

ID=15537648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15230692A Pending JPH05343344A (en) 1992-06-11 1992-06-11 Ion implanting method for manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05343344A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019021959A1 (en) 2017-07-23 2019-01-31 大山パワー株式会社 Nuclear fusion reactor, thermal equipment, external combustion engine, electricity generating device, and moving body

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019021959A1 (en) 2017-07-23 2019-01-31 大山パワー株式会社 Nuclear fusion reactor, thermal equipment, external combustion engine, electricity generating device, and moving body

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