JPH05335754A - Method of detecting stacked slippage of multilayer interconnection printed board - Google Patents

Abstract

PURPOSE:To make it possible to detect the stacked slippage during formation of a multilayer interconnection printed board easily in a short time. CONSTITUTION:Clearances 18 formed by arranging a plurality of pairs of power layers and earth layers in an inner layer of a coupon 13 for detection installed on a multilayer printed wiring board 11 are provided. Patterns 15a and 15b for detection are formed on the surface layer of the coupon 13 for detection so as to extend the region between the clearances 18 of each pair of the power layers and earth layers, and a characteristic impedance of the patterns 15a and 15b for detection is measured, and thereby the stacked slippage of the multilayer printed wiring board 11 is detected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting a stacking deviation of a multilayer printed wiring board, and more particularly to detecting a stacking deviation of a power supply layer or a ground layer of a multilayer printed wiring board having a power supply layer or a ground layer having a clearance in an inner layer. On how to do.

[0002] A multilayer printed wiring board is often used for the purpose of increasing the density of the printed wiring board, etc. However, in order to secure the electrical characteristics, the misalignment of layers is detected. There is a need to accurately and easily detect this stacking deviation in a short time.

[0003]

2. Description of the Related Art FIG. 10A shows a plan view of a signal land and a signal pattern of a multilayer printed wiring board 51, and FIG.
Shows a cross-sectional view taken along the line hh in FIG. Also,
FIG. 11 shows an enlarged view of a portion surrounded by a circle a in FIG. As shown in FIG. 10B, the multilayer printed wiring board 51 has the power supply layer 40 and the ground layer 41 which are independent as inner layers, and the signal lands 34 are escaped by the clearance 42.

The characteristic impedance of the signal pattern is determined by the geometrical distance of the signal pattern to the earth layer or the power source layer, and there are various empirical formulas and theoretical formulas using the Green's function. When the characteristic impedance of the signal pattern is set to a predetermined value, the pattern design of the printed wiring board is performed using the above empirical formula, theoretical formula, and the like.

When the multilayer printed wiring board 51 is manufactured, a misalignment occurs, and the characteristic impedance passes through the signal pattern in which the area of the portion overlapping with the ground layer or the power supply layer facing through the layer of the multilayer printed wiring board is reduced. It rises with the number of clearances.

When the power supply layer 40 is displaced as shown in FIG. 12, the signal pattern 35 arranged between the clearances 42.
In b, the area of the portion that overlaps with the power supply layer 40 facing is reduced, and the characteristic impedance passes through the clearance 42a.
Rises with the number of.

Therefore, in the case where the characteristic impedance of the signal pattern 35b passing between the signal lands 34 is designed to have a predetermined value, the actual characteristic impedance changes if there is a stacking deviation, which causes a problem.

Further, even in the multilayer printed wiring board 51 in which the characteristic impedance of the signal pattern 35b does not matter, if there is a stacking deviation, the signal land 34, the power supply layer 40, and the ground layer 41.
In some cases, the withstand voltage cannot be satisfied, which causes a problem.

Lamination deviation is detected in order to detect a multilayer printed wiring board that does not satisfy the electrical characteristic standard due to the above-mentioned lamination deviation and to obtain data for reducing the defective rate during manufacturing.

FIG. 13 is a plan view of a multilayer printed wiring board to which a conventional method for detecting a stacking error is applied, and FIG. 14 is an explanatory view of a portion of a clearance 71 arranged in the X direction of the detecting coupon of FIG. .. 14A shows a plan view of the clearance 71 portion, and FIG. 14B shows FIG.
The sectional view in the ii surface of (A) is shown.

As shown in FIG. 13, a substrate (hereinafter referred to as a detection coupon) 53 for detecting a stacking error is provided around the product substrate 52.

The stacking deviation detecting coupon 53 is a portion integrally manufactured with the product substrate 52 when the multilayer printed wiring board 51 is manufactured, and a stacking deviation corresponding to the stacking deviation of the product substrate 52 portion appears. The coupon 53 is cut and removed after manufacturing.

The product substrate 52 is provided on the inner layer of the detection coupon 53.
Power supply layer 61 integrally with the power supply layer 40 (see FIG. 10B).
And the ground layer 41 of the product substrate 52 (see FIG. 10B).
The ground layer 62 is formed integrally with the ground layer 62. This power layer 6
1. The ground layer 62 is provided with a plurality of clearances 71 in the direction along the sides of the detection coupon 53. A land 54 having a through hole 54a arranged inside the clearance 71 is formed on the surface layer of the detection coupon 53.

As shown in FIG. 13, the clearance 71 and the land 5 are detected in order to detect the stacking deviation in the X and Y directions.
Two types of 4 are formed, one arranged in the X direction and one arranged in the Y direction.

Conventionally, first, after laminating printed wiring boards, a plane aa passing through the center of the clearance 71 and bb
Of the detection coupon 53, and then the power supply layer 61 of the inner layer in the cross section passing through the center of the clearance 71.
The position of the ground layer 62 was examined by using a microscope or the like to detect the stacking deviation. FIG. 14 shows a case where the power supply layer 61 is displaced in the -X direction and the clearance 71a is displaced in the -X direction.

[0016]

However, in the method of detecting the stacking deviation by providing the conventional detecting coupon and checking the cross section at the clearance portion after the stacking of the printed wiring boards, the printed wiring by a skilled worker is used. It took a lot of man-hours to cut the board. In addition, it took time to train workers.

The present invention has been made in view of the above points, and an object of the present invention is to provide a method for detecting a stacking deviation of a multilayer printed wiring board, which can easily detect a stacking deviation during manufacturing of the multilayer printed wiring board. And

[0018]

According to a first aspect of the present invention, a power supply layer 21 and / or a ground layer 2 which are inner layers of a multilayer printed wiring board are provided.
A plurality of pairs of two and 23 are arranged in a part thereof to have a clearance 18, and a power supply layer 21 and / or a ground layer 22, on a surface layer or an inner layer of the multilayer printed wiring board.
The detection patterns 15a to 15h are formed so as to extend in the region between the clearances 18 of each pair of 23, and the characteristic impedance of the detection patterns 15a to 15h is measured to prevent the misalignment of the multilayer printed wiring boards. To detect.

According to the second aspect of the invention, the stacking error detection patterns 15a, 15b; 15c, 15d; 15e, 15 are provided.
f; 15g and 15h are two patterns arranged in parallel.

According to the third aspect of the invention, the plurality of pairs of clearances 18 are formed side by side in two orthogonal directions, and the detection patterns 15a to 15h are formed side by side in two orthogonal directions.

[0021]

According to the first aspect of the present invention, since the stacking error can be detected by measuring the characteristic impedance of the detection pattern, the shaving work is unnecessary, and the stacking error can be easily detected. It is possible to shorten the time.

According to the second aspect of the present invention, since two parallel detection patterns are formed in the area between the clearances, the characteristic impedances of the two detection patterns are compared with the standard value to obtain the detection patterns. It is possible to detect the stacking deviation in the orthogonal direction including the direction.

According to the third aspect of the invention, since the detection patterns are arranged in two directions orthogonal to each other, it is possible to detect the in-plane direction of the stacking displacement.

[0024]

1 is a plan view of a multilayer printed wiring board 11 to which an embodiment of the present invention is applied, and FIG. 2 is an explanatory view of a detection pattern 15 and a clearance 18 of FIG. Also, FIG.
FIG. 3A is an enlarged view of a part of the detection pattern 15 and the clearance 18, and FIG. 3B is a cross-sectional view taken along the line j-j in FIG.

In FIG. 1, 12 indicates a product substrate, and 13 indicates a stacking deviation detecting coupon. The stack deviation detection coupon 13 is a part integrally manufactured with the product substrate 12 when the multilayer printed wiring board 11 is manufactured, and a stack deviation corresponding to the stack deviation of the product substrate 12 appears. The coupon 13 is cut and removed after manufacturing.

As shown in FIG. 10, the multilayer printed wiring board 11 of FIG. 1 is a four-layer substrate in which signal patterns are formed on the front and back surfaces of a product substrate 12, and a power supply layer and a ground layer are formed in the inner layers. Is.

As shown in FIG. 3B, the detection coupon 13 has an inner power supply layer 21 formed integrally with the power supply layer of the product board 12 and an inner layer integrally formed with the ground layer of the product board 12. Ground layer 22 is formed.

A plurality of pairs of lands 14 having through holes 14a are formed on the detection coupon 13, and a clearance 18 for escaping the lands 14 is provided on the power supply layer 21 and the ground layer 22. The area 19 between the plurality of pairs of clearances 18 is provided on the upper surface of the detection coupon 13.
The two parallel detection patterns 15a and 15b are formed on. Further, on the lower surface of the detection coupon 13, two parallel detection patterns 15c and 15d are formed in a region 19 between a plurality of pairs of clearances 18.

As shown in FIG. 3, the detection pattern 15 is arranged at a position where the edge on the side of the land 14 is in contact with the edge of the clearance 18 in plan view.

As shown in FIG. 1, the pair of clearances 18 and the detection pattern 15 extend in the X direction and the Y direction in the figure along two adjacent sides of the multilayer printed wiring board 11. Two types are formed.

In the combination of the detection pattern 15 and the clearance 18 extending in the Y direction, as shown in FIG. 1, a plurality of pairs of the clearances 18 arranged at a predetermined interval in the X direction are arranged at a predetermined equal interval in the Y direction. The pair of parallel detection patterns 15a and 15b are formed so as to extend in the Y direction in a region 19 (see FIG. 3) between each pair of clearances 18.

In the combination of the detection pattern 15 and the clearance 18 extending in the X direction, as shown in FIG. 1, a plurality of pairs of the clearances 18 arranged at a predetermined interval in the Y direction are provided at a predetermined equal interval in the X direction. The pair of parallel detection patterns 15a and 15b are arranged so as to extend in the X direction in a region 19 (see FIG. 3) between each pair of clearances 18.

FIG. 2 is an explanatory view of a combination of the detection pattern 15 and the clearance 18 extending in the Y direction of FIG.
The two detection patterns 15a and 15b have the clearance 1
8 are passed through n pairs (10 pairs in the example of FIG. 2), one end is connected to lands P1 and P3 for measurement, and the other end is connected to P2 and P4. The pitch of the pair of clearances 18 arranged in the X direction and the pitch in the Y direction between each pair of the clearances 18 are set to a predetermined constant value, for example, 2.54 mm.

Next, the procedure of the stacking error detection method in this embodiment will be described. In the manufacturing process of the multilayer printed wiring board 11, first, the power layer 21 of the inner layer having the clearance 18 is formed integrally with the power layer 40 of the product substrate 12 at the portion of the coupon 13 for detection, and the ground of the inner layer having the clearance 18 is formed. Layer 22 is integrally formed with ground layer 41 of product substrate 12.

Next, the land 14 having the surface detection pattern 15 and the through hole 14a is formed. After the multilayer printed wiring board 11 is formed as described above, the characteristic impedance of the detection pattern 15 is measured, and the stacking deviation is detected from this measured value.

The measurement of the characteristic impedance of the detection pattern 15 and the detection of the stacking error will be described below. The detection pattern 15 has the clearance 18 as described above.
Are arranged so as to pass a predetermined number n. here,
As shown in FIG. 3, a case will be described in which the detection patterns 15 are arranged in the Y direction and the stacking deviation in the X direction is detected.

In the measurement of the characteristic impedance, the characteristic impedance of the detection pattern 15 is measured when the power supply layer 21 or the ground layer 22 facing the detection pattern 15 via the layer of the multilayer printed wiring board 11 is grounded. ..

A terminal having a predetermined characteristic impedance value is connected between one end of the detection pattern 15 and the power supply layer 21 or the ground layer 22. Connect the signal side of the output terminal of the characteristic impedance measuring instrument to the other end of the detection pattern 15 to
The side is connected to the power supply layer 21 or the ground layer 22, and the characteristic impedance of the detection pattern 15 is measured.

For example, in the case of measuring the characteristic impedance of the detection pattern 15a shown in FIG.
1 is connected to the terminal, the signal side of the output terminal of the characteristic impedance measuring instrument is connected to the terminal P1, and the GND side is the power supply layer 2
Connect to 1 and measure the characteristic impedance.

FIG. 5 shows the relationship between the number of passing clearances and the characteristic impedance of the detection pattern 15. Figure 5
FIG. 6 is a diagram when the value of the predetermined characteristic impedance is 50Ω.

When there is no stacking deviation as shown in FIG. 3,
The characteristic impedance of the detection pattern 15 falls within a predetermined standard value range regardless of the number of clearances 18 passing through as shown by I in FIG. On the other hand, as shown in FIG. 4, when the power supply layer 21 has a stacking deviation in the −X direction, the power supply layer 21
As shown in FIG. 5II, the characteristic impedance of the detection pattern 15b, which is affected by the stacking deviation of, increases as the number of passing clearances 18a increases.

Therefore, by measuring the characteristic impedance of the detection pattern 15 passing through the clearance 18 by a predetermined number n, the stacking deviation in the X direction can be detected from this measured value.

FIG. 6 shows a case where the detection pattern is arranged so as to pass through 40 clearances 18, and FIG.
An example of the measured value of the characteristic impedance when there is a stacking deviation as shown in FIG.

In the case of FIG. 4, the power supply layer 21 is shifted in the -X direction by the pattern width of the detection pattern 15.
Therefore, the characteristic impedance of the detection pattern 15b deviates from the standard value (for example, 50Ω ± 10%) and becomes 75.7Ω which is significantly larger than 50Ω. On the other hand, since the other detection patterns 15a, 15c, and 15d are not affected by the displacement of the power supply layer 21, the characteristic impedance is within the standard value.

Therefore, the detection patterns 15a, 15b,
When the characteristic impedance of 15c and 15d is measured, it is 1
Since only the characteristic impedance of 5b is larger than the standard value, it can be detected that the power supply layer 21 has a stacking deviation in the −X direction.

FIG. 7 is a sectional view when the power supply layer 21 has a stacking deviation in the + X direction, and FIG. 8 shows a case where the stacking deviation detection pattern is arranged so as to pass through 40 clearances 18. An example of the measured value of the characteristic impedance when there is a stacking deviation as shown in FIG.

In the case of FIG. 7, the power supply layer 21 is shifted in the + X direction by the pattern width of the detection pattern 15.
Therefore, the characteristic impedance of the detection pattern 15a deviates from the standard value (for example, 50Ω ± 10%) and becomes 75.7Ω, which is significantly larger than 50Ω. On the other hand, since the other detection patterns 15b, 15c, and 15d are not affected by the displacement of the power supply layer 21, the characteristic impedance is within the standard value.

Therefore, the detection patterns 15a, 15b,
When the characteristic impedance of 15c and 15d is measured, it is 1
Since only the characteristic impedance of 5a is larger than the standard value, it can be detected that the power supply layer 21 has a stacking deviation in the + X direction.

As described above, the detection patterns 15a, 1
By measuring the characteristic impedances of 5b, 15c, and 15d and comparing them with the standard values, the stacking deviation in the X direction of the inner power supply layer 21 and the ground layer 22 can be detected including the direction. Therefore, the power layer 40 and the ground layer 4 of the product substrate 12
It is possible to detect the stacking deviation of No. 1 in the X direction including the direction.

The detection coupon 13 has the above Y
In addition to the detection pattern 15 arranged in the X direction, the detection pattern 15 arranged in the X direction is also formed. Therefore, by measuring the characteristic impedance of the detection pattern 15,
The stacking deviation in the Y direction can be detected as in the above description. Therefore, in the present embodiment, it is possible to detect the stacking deviation in the X direction and the stacking deviation in the Y direction, including the directions.

Although the land 14 having the through hole 14a is formed in this embodiment, the land 14 having the through hole 14a is not always necessary. If the clearance 18 corresponding to is formed, it is possible to detect the stacking deviation similarly without the land 14.

In this embodiment, the detection pattern is formed on the surface layer of a four-layer printed wiring board. However, the present invention is not limited to this. It is also possible to detect layer misalignment.

FIG. 9 is a sectional view showing an example of a 7-layer printed wiring board. When the detection patterns 15e, 15f, 15g, and 15h are formed on the inner layer as shown in FIG.
Surface layer detection patterns 15a, 15b, 15c, 15
By measuring the characteristic impedance of the inner layer detection patterns 15e, 15f, 15g, and 15h together with the characteristic impedance of d, it is possible to detect the misalignment of the inner ground layers 22 and 23 and the power supply layer 21.

[0054]

According to the first aspect of the present invention, the stacking deviation can be detected by measuring the characteristic impedance of the detection pattern. Therefore, the stacking deviation during the manufacturing of the multilayer printed wiring board can be reduced in a short time. It has features such as easy detection.

According to the second aspect of the present invention, since the direction of the stacking deviation can be detected, the stacking deviation can be detected more accurately.

According to the third aspect of the present invention, since the direction of the stacking deviation can be detected within the plane, the stacking deviation can be detected more accurately.

[Brief description of drawings]

FIG. 1 is a plan view of a multilayer printed wiring board to which an embodiment of the present invention is applied.

FIG. 2 is an explanatory diagram of a detection pattern and a clearance.

FIG. 3 is an explanatory diagram of a detection pattern and a clearance.

FIG. 4 is an explanatory diagram when there is a stacking deviation in the −X direction.

FIG. 5 is a diagram showing a relationship between the number of passing clearances and characteristic impedance.

FIG. 6 is a diagram showing an example of measured values of characteristic impedance in the case of FIG.

FIG. 7 is a cross-sectional view when there is a stacking deviation in the + X direction.

FIG. 8 is a diagram showing an example of measured values of characteristic impedance in the case of FIG. 7.

FIG. 9 is a diagram showing an example of forming a detection pattern on an inner layer.

FIG. 10 is an explanatory diagram of a multilayer printed wiring board.

11 is an enlarged view of a portion surrounded by a circle a in FIG.

FIG. 12 is an enlarged view of the same portion as FIG. 11 when a stacking error occurs.

FIG. 13 is a plan view of a multilayer printed wiring board to which a conventional stacking error detection method is applied.

FIG. 14 is an explanatory diagram of a clearance portion of the detection coupon.

[Explanation of symbols]

 11 Multilayer Printed Wiring Board 12 Product Board 13 Coupon for Detection 14 Land 14a Through Hole 15a to 15h Detection Pattern 18 Clearance 21 Power Supply Layer 22 Earth Layer

Claims (3)

[Claims] 1. A power supply layer (21) which is an inner layer of a multilayer printed wiring board.
And / or a grounding layer (22, 23) having a clearance (18) in which a plurality of pairs are arranged side by side, and the power supply layer (21) and the inner surface layer of the multilayer printed wiring board are provided. And / or the detection patterns (15a to 15h) are formed so as to extend in the region between the clearances (18) of each pair of the ground layers (22, 23), and the characteristics of the detection patterns (15a to 15h) A method for detecting stacking deviation of a multilayer printed wiring board, comprising detecting a stacking deviation of the multilayer printed wiring board by measuring impedance. 2. The detection patterns (15a, 15b;
15. The method for detecting a stacking error in a multilayer printed wiring board according to claim 1, wherein 15c, 15d; 15e, 15f; 15g, 15h) are two patterns arranged in parallel. 3. The plurality of pairs of clearances (18) are arranged side by side in two orthogonal directions, and the detection patterns (15a to 15h) are arranged side by side in two orthogonal directions. A method for detecting a stacking error in a multilayer printed wiring board as described.