JPH05335555A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a power device having a low switching loss even in an application of a high frequency in which a reduction in an ON voltage and a shortening of a switching time which have been heretofore difficult in a conventional power device such as MCT, IGBT, etc., can be simultaneously executed. CONSTITUTION:A channel for supplying an electron current from an n<+>-type source layer 5 to an n<->-type base layer 3 is formed of a first gate electrode 12 in a thyristor part 20 and conductive in a thyristor state. When it is turned OFF, introduction of hole current to a p-type base layer 4 necessary to maintain the thyristor state is discharged to a source terminal 23 by a MOSFET part 30 having a second gate electrode 13, transferred to a transistor state similar to an IGBT, and a turn-off having a short switching time is realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a MOS type semiconductor device used for a power device, etc.
The present invention relates to a double gate type semiconductor device having one gate electrode.

[0002]

2. Description of the Related Art In recent years, in the field of power semiconductor devices, high performance, high breakdown voltage, and large current of semiconductor elements have been sought, and the performance thereof has been rapidly improved. Among such power devices capable of controlling a large current with a high breakdown voltage, power MOSFETs, IGBTs (insulated gate bipolar transistors) and MCTs (MOSs) are used as MOS gate type power devices in which device driving is performed by voltage.
Gate control thyristors) have been proposed and are becoming the mainstream of power devices. In particular, I
The technical innovation of GBT has been remarkable recently, and lower generation loss, that is, reduction of on-voltage when a large current flows when the element is conducting, and shortening of switching time when a current is turned on and off (high-speed response) ), Etc.
It has been commercialized, and an example is shown in FIG. This IGB
Although T has a structure similar to that of the power MOSFET,
Since it is an element using conductivity modulation, it has a feature that the on-voltage is low. The operation will be described below.

In FIG. 5, an IGBT 40a is a p ⁺ layer connected to a drain electrode 51 and used as a drain layer.
Type IGB in which an n ⁺ type buffer layer 43 and an n ⁻ type conductivity modulation layer 44 are stacked on a type semiconductor substrate 42
T. A p-type base layer 47 is diffused and formed on the surface of the n ⁻ -type conductivity modulation layer 44 using the polycrystalline silicon (gate electrode) 52 formed on the silicon oxide film (gate oxide film) 45 as a mask. ing. Furthermore, the p-type base layer 47, n ⁺ -type and the source layer 48 and the p ⁺ -type contact layer 49 is formed, the source layer 48 and the p ⁺ -type these n ⁺ -type contact layer 49 The source electrode 50 is connected to. A gate electrode 52 made of polycrystalline silicon is provided from the end of the n ⁺ type source layer 48 to the surfaces of the p type base layer 47 and the n ⁻ type conductivity modulation layer 44 via a silicon oxide film 45. ing.
Here, a source terminal 60 is connected to the source electrode 50, a drain terminal 61 is connected to the drain electrode 51, and a gate terminal 62 is connected to the gate electrode 52.

In the IGBT 40a having such a structure, when a positive drain potential is applied to the drain electrode 51 and a positive potential is applied to the gate electrode 52 with respect to the source potential applied to the source electrode 50. The surface 53 of the p-type base layer 47 directly below the gate electrode 52 via the silicon oxide film 45 becomes an n-type inversion layer, and operates as a channel. Therefore, the electrons, which are the majority carriers, pass through the n ⁺ -type source layer 48 from the source electrode 50 and the n-type inversion layer formed on the surface 53 of the p-type base layer 47, and are n ⁻ -type conductivity modulation. Implanted in layer 44. In response to this, since holes, which are minority carriers, are injected from the p ⁺ type semiconductor substrate 42 which is a drain layer, the n ⁻ type conductivity modulation layer 44 has a so-called conductivity in which electrons and holes coexist. Because of the modulation state, the IGBT 40a can operate at a low ON voltage.

As described above, the IGBT is a semiconductor device capable of realizing a low on-voltage state in which electrons and holes coexist in the conductivity modulation layer, like the thyristor. Furthermore, unlike a thyristor that can be turned off only when the device is driven by a current and the passing current is set to almost zero, the IGBT can control the voltage with an insulated gate, so it is focused on as a switching element that can be applied to a high frequency with a low on-voltage. It has been done. Since the switching time itself is a bipolar mode device in which both electron and hole carriers coexist, the switching time is compared with the switching time of a unipolar mode device such as MOSFET that uses a single carrier of only electrons or holes. Then, although it is slow, the turn-off time is being shortened due to the introduction of a lifetime killer. As described above, the IGBT is superior to the thyristor in that the generated loss can be controlled by the MOSFET and has a high switching speed, and a low on-voltage similar to that of the thyristor is realized. It is noted as a possible element.

[0006]

One of the most important key technologies for solving the problems of high performance, miniaturization, and cost reduction in power electronics is to reduce the loss of power devices. .. Therefore, it is necessary to develop a power device having a short turn-off time and a low on-voltage. Therefore, also in the above-mentioned IGBT 40a, it is required to further reduce the ON voltage. But IGB
T40a supplies a base current of a pnp transistor including a p ⁺ type semiconductor substrate 42 which is a built-in drain layer, an n ⁻ type conductivity modulation layer 44 and a p type base layer 47 by a MOSFET controlled by a gate electrode 52. Since it is a semiconductor device of the above-mentioned type, it is impossible to lower the on-voltage of the IGBT 40a to be equal to or lower than the on-voltage of the pnp transistor. Furthermore, the increase in the on-voltage due to the JFET effect when passing through the MOSFET portion formed in the IGBT 40a cannot be ignored. That is, the IGBT4
In 0a, electrons from n ⁺ -type source layer 48 through the n-type inversion layer formed on the surface 53 of the p-type base layer 47 n ^- is supplied to the mold base layer 44, n ^- -type base layer 44 causes a conductivity modulation state and the resistance is reduced. Here, in the IGBT 40a, unlike the thyristor,
The pn junction between the n ⁺ type source layer 48 and the p type base layer 47 is maintained (in the thyristor structure, this pn junction is in a collapsed state). For this reason, the electron current flows through the n-type inversion layer on the surface 53, and the hole current becomes a biased flow along the n-type inversion layer due to the JFET effect.
In the case of a, the channel resistance and the resistance due to the JFET effect increase, so that there is a certain limit in reducing the on-resistance. As described above, the IGBT 40a is a semiconductor device having a great merit that it can be turned off and turned on by using a MOSFET, but since it is a device including the above-mentioned fundamental problem, there is a limit in reducing the on-voltage. is there.

On the other hand, from the viewpoint of reducing the on-voltage, it is possible to further reduce the on-voltage by forming the semiconductor device into a thyristor structure. However, in a semiconductor device having a thyristor structure, since the device is driven by a current, it is difficult to turn off, and it is difficult to shorten the turn-off time. Therefore, it is difficult to realize a power device having required performance. Although a MOS gate type thyristor device has also been proposed, it is difficult to solve in the same manner as the problem in the IGBT in that it does not have turn-off resistance and it is necessary to realize low on-resistance in the MOSFET.

Therefore, in view of the above problems, it is an object of the present invention to provide a semiconductor device which can be controlled by using a MOSFET and at the same time can realize a low on-voltage by a thyristor structure. ..

[0009]

In order to solve the above problems, the means taken in the present invention realizes a semiconductor device which operates in a thyristor state when turned on and can operate in a transistor state when turned off like an IGBT. Therefore, a semiconductor device having a first gate electrode that turns on in a thyristor state and a second gate electrode that transitions from a thyristor state to a transistor state has been developed. That is, on the surface of the second-conductivity-type base region, the first-conductivity-type drain region to which the drain electrode is connected, and the first-conductivity-type first base region formed apart from the drain region are formed. A semiconductor device having a drain region and a second base region of a first conductivity type formed at a position separated from the first base region, a second conductivity type formed in the first base region. The first source region and the second
A first MIS portion that can be connected to a conductive type base region is formed, and a second conductive type second source region and a second conductive type drain region are formed in the second base region. A second MIS portion is formed, and further, the first source region and the second source region are conductively connected, and the first base region and the second conductivity type drain region are conductively connected. It is a structure.

Here, in the semiconductor device according to the present invention, it is effective that the drain electrode is conductively connected not only to the first conductivity type drain region but also to the second conductivity type base region side. Is. As a means for this conductive connection, the drain region of the first conductivity type is formed in the buffer region of the second conductivity type formed on the surface side of the base region of the second conductivity type, and the drain is formed through this buffer region. It is preferable that the electrode is conductively connected to the base region of the second conductivity type.

[0011]

In the semiconductor device according to the present invention having such means, a state in which the drain potential is applied to the drain region of the first conductivity type and the source potential is applied to the first source region of the second conductivity type Then, when the first MIS portion is turned on, majority carriers are injected from the first source region of the second conductivity type into the base region of the second conductivity type, and in response thereto, the drain region of the first conductivity type. From, minority carriers are injected into the second conductivity type base region. Therefore, the transistor including the drain region of the first conductivity type, the base region of the second conductivity type, and the first base region of the first conductivity type is turned on. As a result, majority carriers are injected into the first base region of the first conductivity type, and at the same time, the base region of the second conductivity type, the first base region of the first conductivity type and the first base region of the second conductivity type. The transistor formed of the source region of the transistor is turned on. Therefore, the thyristor including the first conductivity type drain region, the second conductivity type base region, the first conductivity type first base region, and the second conductivity type first source region is turned on. For this reason,
Conduction is possible in the thyristor state, and the on-voltage can be reduced. From this state, when the second MIS portion is turned on, the first conductivity type first base region and the second conductivity type first source region are short-circuited to the same potential via the second MIS portion. Then, the majority carriers of the first conductivity type first base region flow out to the side of the second conductivity type first source region through the second MIS portion. , The transistor composed of the first base region of the first conductivity type and the first source region of the second conductivity type is turned off. Therefore, from the thyristor state to I
The same transistor state as GBT is obtained, and the carrier density in the device is reduced. Therefore, the turn-off time when turning off the first MIS portion and turning off this semiconductor device can be shortened.

Further, in the semiconductor device according to the present invention, the source region, the drain region and the first and second M's are formed.
Since all of the IS gate portion is formed on the surface side of the device, wiring with other elements is easy.

Further, when the drain electrode is conductively connected not only to the drain region but also to the second conductivity type base region side, it remains in the second conductivity type base region when the device is turned off. Since the carriers can be directly extracted to the drain electrode side, the turn-off time can be further shortened.

[0014]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

[First Embodiment] FIG. 1 shows the structure of a semiconductor device having a first gate and a second gate according to a first embodiment of the present invention. Since the semiconductor device of this example has two gates, it is called a dual gate MOS thyristor (DUGMOT).

The semiconductor device 10a of this example is a lateral device, and the drain terminal 2 is formed on the surface of an n ^-- type (second conductivity type) base layer 3 formed by epitaxial growth or the like.
Drain part 20a including the drain layer 1 on which the drain electrode 14 connected to the drain electrode 4 is provided, and this drain part 2
0a and a thyristor section 20 having a function as a switching element, which is composed of a first MOSFET section (first MIS section) 20b formed at a position facing the 0a, and a control MOSFET section for controlling the thyristor section 20 ( Second MIS unit) 30.

The thyristor portion 20 is composed of the drain portion 20a and the first MOSFET portion 20b as described above, and the drain portion 20a is a well-like diffusion formed on the surface of the n ^-- type base layer 3. N ⁺ type buffer layer 2
And a p ⁺ type (first conductivity type) drain layer 1 formed on the inner surface of the n ⁺ type buffer layer 2. The first MOSFET section 20b includes a p-type base layer (first base region) 4 which is a well-shaped p-type diffusion layer formed on the surface of the n ⁻ -type base layer 3 and the p-type base layer 4. An n ⁺ -type source layer (first source region) 5 and a p ⁺ -type contact layer 6 formed on the inner surface of the p-type base layer 4 and the n ⁺ -type source layer 5 to the p-type contact layer 6. The first gate electrode 12 made of polycrystalline silicon extends over the base layer 4 and the n ⁻ type base layer 3 to form the gate oxide film 31a.
Is installed through.

The control MOSFET section 30 includes a first MO
A p-type MOS that is a well-like p-type diffusion layer formed on the surface of the n ⁻ -type base layer 3 like the SFET portion 20b.
Base layer (second base region) 11 and this p-type MO
N ⁺ type MO formed on the inner surface of the S base layer 11
And S drain layer 7 and the MOS source layer (second source regions) 8, further comprising an MOS contact layer 9 of p ⁺ -type formed adjacent to the MOS source layer 8, n ⁺
Type MOS source layer 8 to n ⁺ type MOS drain layer 7
The second gate electrode 13 made of polycrystalline silicon
Are provided via the gate oxide film 31b.

The source electrode (first source electrode) 15 connected to the source terminal 23 is connected to the n ⁺ type source layer 5 of the first MOSFET section 20b and the p ⁺ type contact layer 6 is formed.
A connection electrode 16 is installed in each. Also,
N ⁺ type MOS source layer 8 of the control MOSFET section 30
And p ⁺ type MOS contact layer 9 has source terminal 2
MOS source electrode connected to 3 (second source electrode)
18 is provided, and a connection electrode 17 connected to the connection electrode 16 is provided on the n ⁺ type MOS drain layer 7. Further, the first gate electrode 12 has a first gate terminal 21 and the second gate electrode 13 has a second gate terminal 22.
, And the channels are formed by control signals from the outside.

FIG. 2 shows an equivalent circuit of the semiconductor device 10a of this example. The device 10a includes a first gate terminal 2
The thyristor section 20 is controlled by 1 and the control MOSFET section 30 is controlled by the second gate terminal 22. The thyristor portion 20 includes an n ⁺ type source layer 5, a p type base layer 4 and an n ⁻ type base layer 3.
An npn-type transistor 27 is configured by the above.
In addition, the p-type base layer 4, the n ⁻ -type base layer 3, the n ⁺ -type buffer layer 2 and the p ⁺ -type drain layer 1 form the pn.
A p-type transistor 28 is formed. Therefore, the npn-type transistor 27 and the pnp-type transistor 28 form a thyristor. For the npn-type transistor 27 and the pnp-type transistor 28, the first MOSFET section 20b is provided.
Is configured to connect the base of the pnp-type transistor 28 and the source terminal 23 (source electrode 15), while the control MOSFET section 30 includes the base and the source terminal 23 (source of the npn-type transistor 27). It is configured to connect with the electrode 15).

The operation of the apparatus 10a having such a configuration will be described with reference to the timing chart shown in FIG. Here, FIG. 3 shows signals applied to the first gate terminal 21 and the second gate terminal 22 for controlling the device 10a. In FIG. 3, H indicates a high level signal and L indicates a low level signal.

In the device 10a, the first MOSFET section 20b having the first gate electrode 12 controlled by the first gate terminal 21 and the second gate terminal 22 are provided.
The control MOSFET section 30 including the second gate electrode 13 controlled by the n-channel type is both of the n-channel type, and by applying a high level signal to the first and second gate terminals 21 and 22, these 1 MOSFET section 2
0b and the control MOSFET section 30 can be made conductive. First, at time t ₁ , a high-level signal is applied to the first gate terminal 21 and the first gate electrode 1
When 2 is set to a high potential, the surface of the p-type base layer 4 becomes an n-type inversion layer (channel), and the source electrode 15 to the n ⁺ -type source layer 5 and the surface of the p-type base layer 4 are n-type inversion layers. ,
Then, the n ⁻ type base layer 3 is connected. Therefore, electrons are injected from the source electrode 15 into the n ⁻ -type base layer 3,
In response to this, holes are injected from the p ⁺ -type drain layer 1 into the n ⁻ -type base layer 3, so that the n ⁻ -type base layer 3
Becomes a conductivity modulation state. This means that the pnp type transistor 28 is turned on. further,
The hole current of the pnp-type transistor 28 is npn
-Type transistor 27 has a base current of npn
Type transistor 27 is turned on. That is, p
^The thyristor constituted by the ⁺ type drain layer 1, the n ⁻ type base layer 3, the p type base layer 4 and the n ⁺ type source layer 5 is turned on. As a result, n ⁺ -type and pn junction collapses at the junction A between the source layer 5 and the p-type base layer 4, a large amount from the entire junction between the n ⁺ -type source layer 5 and the p-type base layer 4 of Of electrons are injected into the side of the p ⁺ type drain layer 1 through the p type base layer 4, a high concentration of carriers exists in the device, and the on-resistance of the device 10a becomes low. Thus, in the present device 10a,
By setting the first gate electrode 12 to a high potential, the device becomes a thyristor state when the device is conducting, so that the power device has a low on-voltage.

Since the device 10a operates in the thyristor state as described above, the electron current is not supplied through the n-type inversion layer formed by the first gate electrode 12. Even if the first gate electrode 12 is set to a low potential to eliminate the n-type inversion layer, the device 10a cannot be turned off. Therefore, in the present device 10a, at time t ₂ prior to the time to turn off, on a high level signal to the second gate terminal 22,
When the control MOSFET 30 is turned on, the hole current supplied to the base of the npn-type transistor 27 flows to the source terminal 23 and the base and emitter of the npn-type transistor 27 are short-circuited. 27 is turned off. As a result, the pn junction at the junction A between the n ⁺ type source layer 5 and the p type base layer 4 is restored, the thyristor operation disappears, and only the pnp type transistor 28 operates.

This state is similar to the operating state of the IGBT in which the electron current and the like can be controlled by the n-type inversion layer formed by the first gate electrode 12.

Then, at time t ₃ , a low-level signal is applied to the first gate terminal 21 and the first gate electrode 1
When 2 is set to a low potential, the n-type inversion layer formed on the surface of the p-type base layer 4 disappears, so that the pnp-type transistor 28 can be turned off, and the present device 10a
Is stopped. Here, in the present device 10a, the operation at the time of turn-off is the same transistor state as that of the IGBT, the turn-off waveform is exactly the same as that of the IGBT, and the short turn-off time is the same as that of the IGBT.

As described above, the present apparatus 10a uses the two gate electrodes and has a low thyristor state (time t ₁
Is a completely new device that realizes a period T ₁ from a time t ₂ to a time t ₂ and a transistor state having a short turn-off time like the IGBT (a period T ₂ from a time t ₂ to a time t ₃ ). This significantly improves the trade-off between the reduction of the on-voltage and the switching time. That is, the present device 10a has a short switching time similar to that of an IGBT, but operates in a thyristor state when conducting, so that the on-voltage can be significantly reduced as compared with a conventional IGBT, and a low-loss power device is realized. It was done. Further, it has a feature that the thyristor can be controlled by voltage driving.

The apparatus 10a is a horizontal type apparatus,
Since all of the electrodes are on the surface side of the device, wiring with other devices is easy, and it is possible to improve the performance by incorporating the device in a medium or large current and medium or high voltage device or circuit.

[Embodiment 2] FIG. 4 shows a structure of a semiconductor device having a double gate of a first gate and a second gate according to Embodiment 2 of the present invention. The configuration and operation of the semiconductor device of this example are the same as those of the semiconductor device 1 of Example 1.
The same reference numerals are given to common portions, and description thereof will be omitted.

In FIG. 4, the characteristic feature of the semiconductor device 10b of this example is that the drain portion 20a thereof has an anode short structure. That is, the in apparatus 10b, the n ⁺ -type inner surface of the buffer layer 2 is formed by dividing p ⁺ -type drain layer 1 is, for these n ⁺ -type buffer layer 2 and the p ⁺ -type The drain electrode 14 is conductively connected to both of the drain layers 1. That is, the drain electrode 14 is conductively connected not only to the p ⁺ type drain layer 1 but also to the n ⁻ type base layer 3 side.

The present device 10b having such a configuration can reduce the on-state voltage by the thyristor structure, like the semiconductor device 10a of the first embodiment. On the other hand, in the switching performance of the present device 10b, since the drain electrode 14 is conductively connected to the n ⁺ -type buffer layer 2, excess carriers accumulated in the n ⁻ -type base layer 3 at turn-off are n ^{+ -type.}
An electron current can be directly drawn from the junction C between the buffer layer 2 of the mold and the drain electrode 14 to the drain electrode 14. Therefore, since excess carriers are removed at a higher speed, it is possible to further shorten the turn-off time without causing reinjection of holes.

Incidentally, in Example 1 and Example 2,
Of course, the conductivity type of each component may be reversed. In addition, each base layer, source layer and first and second layers
Also in the configuration of the MOSFET section and the like, various configurations can be adopted without being limited to this example.

[0032]

As described above, in the semiconductor device according to the present invention, by using the first gate electrode and the second gate electrode, a low on-voltage similar to that of a thyristor when turned on and an IGBT when turned off are provided. The same short switching time can be realized. Therefore, the conventional M
It is possible to greatly improve the trade-off between the switching time and the on-voltage, which was not possible with power semiconductor devices such as CT and IGBT.
High performance of power devices used in high-voltage devices and circuits is possible. Further, since the on-voltage is low and the switching speed is fast, it is possible to significantly reduce the loss even in high frequency applications. As described above, by adopting the semiconductor device according to the present invention, it is possible to realize reduction in loss and miniaturization of various devices which have been recently demanded particularly from the viewpoint of power saving. here,
In the semiconductor device of the present invention, since the source region, the drain region, and the first and second MIS gate portions are all formed on the surface side of the device, wiring with other devices is easy.

When the drain electrode is also conductively connected to the side of the second conductivity type base region, when the device is turned off, carriers remaining in the second conductivity type base region are transferred to the drain electrode. Since it can be directly pulled out to the side, the turn-off time can be further shortened.

[Brief description of drawings]

FIG. 1 is a sectional view showing a configuration of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing an equivalent circuit of the same semiconductor device.

FIG. 3 is a timing chart showing signals applied to two gate terminals of the semiconductor device and an operating state of the semiconductor device.

FIG. 4 is a sectional view showing a configuration of a semiconductor device according to a second embodiment of the invention.

FIG. 5 is a cross-sectional view showing an example of the structure of an IGBT.

[Explanation of symbols]

1 ... p ⁺ -type drain layer 2, ... n ⁺ -type buffer layer 3 ... n ^- -type base layer 4 ... p-type base layer (first base region) 5 ... n ⁺ type source layer (first source region) 6 ... p ⁺ type contact layer 7 ... n ⁺ type MOS drain layer 8 ... n ⁺ type MOS source layer (second source) Region 9 ... p ⁺ type MOS contact layer 10a, 10b ... semiconductor device 11 ... p type MOS base layer (second base region) 12 ... first gate electrode 13 ... Second gate electrode 14 ... Drain electrode 15 ... Source electrode (first source electrode) 16, 17 ... Connection electrode 18 ... MOS source electrode (second source electrode) 20 ... -Thyristor portion 20a ... Drain portion 20b ... First MOSFET portion (first MI 21) first gate terminal 22 ... second gate terminal 23 ... source terminal 24 ... drain terminal 27 ... npn-type transistor 28 ... pnp-type transistor 30. ..Controlling MOSFET section (second MIS section) 31a, 31b ... Gate oxide film

Claims (3)

[Claims] 1. A first-conductivity-type drain region having a drain electrode connected to a surface of a second-conductivity-type base region, and a first-conductivity-type first region formed at a position separated from the drain region. A base region, a second base region of the first conductivity type formed at a position separated from the drain region and the first base region, and a second conductivity type of the second conductivity type formed in the first base region. First
A first MIS portion capable of connecting the source region of the second conductivity type to the second conductivity type base region, and a second conductivity type second formed in the second base region.
And a second MIS portion having a source region and a second conductivity type drain region, wherein the first source region and the second source region are conductively connected to each other, A semiconductor device, wherein the first base region and the drain region of the second conductivity type are conductively connected. 2. The semiconductor device according to claim 1, wherein the drain electrode is conductively connected not only to the first conductivity type drain region but also to the second conductivity type base region side. .. 3. The drain region of the first conductivity type according to claim 2, wherein the drain region of the first conductivity type is formed in a buffer region of the second conductivity type formed on the surface side of the base region of the second conductivity type. Through the drain electrode to the second
A semiconductor device, which is conductively connected to a conductive type base region.