JP3163746B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a MOS type semiconductor device or the like used as a power device or the like, and in particular, has two gate electrodes capable of controlling the operation as a thyristor and the operation as an IGBT. The present invention relates to a dual gate type semiconductor device.

[0002]

2. Description of the Related Art As a MOS gate type power device, MOSFETs, IGBTs, MCTs (MOS gate control thyristors) and the like have been proposed. Among these power devices, devices that can be used as devices capable of switching with a relatively large current capacity are mainly IGBTs and MCTs that can reduce on-voltage. In particular, IGBTs have undergone remarkable technological innovations in recent years, have been reduced in on-resistance and switching loss, and have been put into practical use as products capable of controlling large currents.

The IGBT is an insulated gate semiconductor device similar to the power MOSFET, and has a feature that the ON voltage can be reduced because it is a semiconductor device using conductivity modulation. FIG. 12 shows the outline.
This IGBT is formed on a p ⁺ -type semiconductor substrate 52 connected to a drain electrode 61 and used as a drain layer by n
^This is a vertical IGBT in which a ⁺ type buffer layer 53 and an n ⁻ type conductivity modulation layer 54 are stacked. A p-type channel layer 57 is formed on the surface of the conductivity modulation layer 54 by using a polysilicon gate 56 formed on the silicon oxide film 55 as a mask.
Are formed by diffusion. Further, an n ⁺ -type source layer 58 and a p ⁺ -type contact layer 59 are formed in the p-type channel layer 57, and a source electrode 60 is connected to the source layer 58 and the contact layer 59. .
A gate electrode 56 made of polycrystalline silicon is provided via a gate oxide film 55 from the end of the source layer 58 to the channel layer 57 and the surface of the conductivity modulation layer 54.

In such an IGBT, a source potential applied to a source electrode 60 is changed with respect to a drain electrode 61.
When a positive drain voltage is applied to the gate electrode 56 and a positive gate potential with respect to the source potential is applied to the gate electrode 56, the surface 63 of the channel layer 57 immediately below the gate via the gate oxide film 55
Are inverted and operate as a channel. Therefore, electrons flow from the source electrode 60 to the source layer 58 and further to the conductivity modulation layer 54 through a channel formed on the surface 63. In response to this, holes are injected from the drain layer 52, so that the conductivity modulation layer 54 is in a so-called conductivity modulation state in which electrons and holes coexist. Therefore, the IGBT can operate at a low on-voltage.

As described above, the IGBT is a semiconductor device capable of realizing a low on-voltage state in which electrons and holes coexist in the conductivity modulation layer as in the thyristor. Further, unlike a thyristor which can only be controlled by current, that is, cannot be turned off unless the passing current is almost zero, the IGBT can control the voltage by the insulated gate. Is attracting attention.

[0006] Since the IGBT is a bipolar mode element in which both electrons and holes coexist, the switching time itself is slow as compared with a unipolar mode element such as a MOSFET which uses only electron carriers. However, turn-off time is being shortened by the introduction of lifetime killers. In any case, the IGBT is a semiconductor device capable of realizing a high switching speed as an element capable of realizing a low on-state voltage in that it can be controlled by a MOSFET as compared with a thyristor having a low on-state voltage.

[0007]

One of the most important key technologies for solving the problems in power electronics such as high performance, miniaturization, and cost reduction is to reduce the power device loss. For that purpose, development of a power device having a short turn-off time and a low on-voltage is required. Therefore, the above-mentioned IGBT is required to further reduce the on-voltage. However, IGBT
This is a semiconductor device in which a base current of a pnp transistor including a built-in drain layer 52, a conductivity modulation layer 54, and a channel layer 57 is supplied by a MOSFET controlled by a gate electrode 56. For this reason, it is impossible to lower the ON voltage of the IGBT below the ON voltage of the pnp transistor. Further, the M formed on the IGBT
The increase in on-resistance due to the JFET effect when passing through the OSFET portion cannot be ignored. Thus, the IGBT is
Although a semiconductor device has a great merit of being able to be turned off and turned on using a MOSFET, it is a device including the above-described fundamental problem, and therefore, there is a limit in reducing the on-voltage.

On the other hand, from the viewpoint of reducing the on-state voltage, the on-state voltage can be further reduced by using a thyristor structure in the semiconductor device. However, in a semiconductor device having a thyristor structure, only a current drive can be performed, and it is difficult to shorten a turn-off time, for example, it is difficult to turn off. Therefore, it is difficult to realize a power device having required performance. Although a MOS gate type thyristor device has been proposed, it is difficult to solve the problem similar to the problem in the IGBT in that there is no turn-off resistance and it is necessary to realize a low on-resistance in the MOSEFT.

In view of the above problems, it is an object of the present invention to provide a semiconductor device which can be controlled by using a MOSFET while realizing a low on-voltage by a thyristor structure. .

[0010]

According to the present invention, there is provided a semiconductor device which operates in a thyristor state when turned on and operates as a transistor state like an IGBT when turned off. A semiconductor device including two gate electrodes, a first gate electrode that turns on in a thyristor state and a second gate electrode that changes from a thyristor state to a transistor state, has been developed. That is, in the semiconductor device according to the present invention, the first conductive type base region and the second conductive type base region are provided at positions facing the first conductive type drain region to which the drain potential is applied, on the second conductive type base region. A source region formed in the base region of one conductivity type to which a source potential is applied, and a first gate provided from the source region to the base region of the second conductivity type through the base region of the first conductivity type And a control MISFET including a second gate electrode capable of controlling a connection between a base region and a source region of a first conductivity type. .

As such a control MISFET,
Using the first conductivity type MIS base region formed on the second conductivity type base region separately from the first conductivity type base region, the first conductivity type MIS base region is formed in the first conductivity type MIS base region. Using a control MISFET unit having a MISFET having a second gate electrode,
It is preferable that a source potential is applied to the MIS source layer and the MIS base region together with the MIS drain layer, and the MIS drain layer is connected to the first conductivity type base region.

In particular, according to the present invention, in a semiconductor device having such first and second gate electrodes, at least one set of a first conductivity type detection base layer is provided in a second conductivity type base region, A second-conductivity-type detection source layer formed in the base layer, and a second conductive-type detection source layer.
A current detection unit having a detection gate electrode provided over the conductive base region, and a source potential is applied through a resistance means connected in series with the detection source layer.
Are characterized by the detection source layer and the second gate electrode are <br/> connected. In order to integrate this resistance means with the semiconductor device, it is desirable to use a polycrystalline silicon resistor formed on the second conductivity type base region as the resistance means.

[0013]

In the above-mentioned semiconductor device, a potential for conducting between the source region and the base region of the second conductivity type is applied to the first gate electrode with respect to the source potential, so that the base region of the second conductivity type is applied from the source region. Majority carriers are injected into the region. In response, minority carriers are injected from the drain region of the first conductivity type into the base region of the second conductivity type, and
A conductivity type drain region, a second conductivity type base region,
The transistor including the conductive base region is turned on. Thereby, majority carriers are injected into the base region of the first conductivity type, and at the same time, a transistor constituted by the base region of the second conductivity type, the base region of the first conductivity type, and the source region of the second conductivity type is formed. It turns on.
Therefore, the thyristor including the drain region of the first conductivity type, the base region of the second conductivity type, the base region of the first conductivity type, and the source region of the second conductivity type is turned on. For this reason,
Conduction in the thyristor state becomes possible, and reduction in on-voltage can be achieved.

Here, when the control MISFET having the second gate electrode is turned on and the base region and the source region of the first conductivity type are short-circuited, the majority carrier in the base region of the first conductivity type causes the control MISFET to turn on. As a result, the transistor flows to the source region side, so that the transistor including the base region of the second conductivity type, the base region of the first conductivity type, and the source region of the second conductivity type is turned off. For this reason, the thyristor state changes to a transistor state similar to that of the IGBT, and the carrier density in the device decreases. Therefore, by injecting electrons from the source region into the base region of the second conductivity type by applying to the first gate electrode a potential that cuts off conduction between the source region and the base region of the second conductivity type with respect to the source potential. And the semiconductor device can be turned off. As described above, the semiconductor device according to the present invention is turned on in the thyristor state when on, so that the on-resistance can be reduced. Further, when the semiconductor device is off, it can be turned off in the same transistor state as the IGBT.
The turn-off time can be reduced.

In such a semiconductor device, a MIS base region of the first conductivity type is formed on the base region of the second conductivity type separately from the base region of the first conductivity type. By applying the potential, the MIS base region can be separated from the pn junction. Therefore, the control MISFE including the second gate electrode, the MIS source layer, and the MIS drain layer is formed in the MIS base region.
T can be formed, and a semiconductor device capable of switching between a thyristor state and a transistor state can be realized on one substrate.

In particular, according to the present invention, by forming the current detecting portion in the base region of the second conductivity type, a current proportional to the current flowing through the thyristor portion can flow through the current detecting portion. Therefore, if an overcurrent flows through the thyristor for any reason, a current proportional to the overcurrent flows to the current detector, and the voltage drop of the resistor connected in series with the current detector increases. Accordingly, since the control voltage applied to the second gate electrode increases, the control MISFET can be turned off. Accordingly, the semiconductor device shifts to a transistor state in which the transistor can be stopped and can be turned off immediately by the potential applied to the first gate electrode.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

[Embodiment 1] FIG. 1 shows a first embodiment according to the present invention.
1 shows a configuration of a semiconductor device provided with a second gate and a second gate. Since the semiconductor device of this example has two gates, a dual gate MOS thyristor (D
UGMOT). The device of the present example is a vertical type semiconductor device. A p ⁺ -type semiconductor substrate having a drain electrode 35 provided on the back surface is used as a drain layer 1, and an n ⁺ -type buffer layer 2 and a An n ⁻ type base layer 3 is formed by epitaxial growth or the like. A thyristor section 10 having a function as a switching element and a MOSFET section 20 for controlling the thyristor section 10 are formed on the surface of the n ⁻ type base layer 3.

The thyristor section 10 has an n ⁻ type base layer 3.
, A p-type base layer 4 which is a well-shaped p-type diffusion layer formed on the surface of the substrate, an n ⁺ -type source layer 5 and a p ⁺ -type A contact layer 6 is provided, and a first gate electrode 7 is provided via a gate oxide film 8 from the source layer 5 to the p-type base layer 4 and the n ⁻ -type base layer 3.

The MOSFET section 20 includes a thyristor section 10
Similarly to the above, a p-type MOS base layer 21 which is a well-shaped p-type diffusion layer formed on the surface of the n ⁻ type base layer 3 and is formed on the inner surface of the p-type MOS base layer 21. n ⁺ type MOS drain layer 22 and MOS source layer 2
3, further comprising a p ⁺ -type MOS contact layer 24 formed adjacent to the MOS source layer 23, and a second gate electrode 25 extending from the MOS source layer 23 to the MOS drain layer 22. Is installed through.

In the source layer 5 of the thyristor section 10, a source electrode 36 connected to the source terminal 31 is provided.
Is provided with a drain electrode 35 connected to the drain terminal 30. Further, a MOS source electrode 37 connected to the source terminal 31 is provided on the MOS source layer 24 and the MOS contact layer 24 of the MOSFET section 20, and a connection connected between the MOS drain layer 22 and the contact layer 6 of the thyristor section 10. Electrodes 38b and 38a are provided respectively. Further, the first gate electrode 7 is connected to the first gate terminal G1, and the second gate electrode 25 is connected to the second gate terminal G2. Channels are formed by external control signals. .

FIG. 2 shows an equivalent circuit of the semiconductor device of this embodiment. The device of this example includes a thyristor unit 10 controlled by a first gate terminal G1 and a second gate terminal G2.
, Which is controlled by the MOSFET section 20. The thyristor section 10 includes an npn-type transistor Qnpn composed of an n ⁺ -type source layer 5, a p-type base layer 4 and an n ⁻ -type base layer 3, and a p-type base layer 4 and an n ⁻ -type base layer. A pnp-type transistor Qpnp including a layer 3, an n ⁺ -type buffer layer 2 and a p ⁺ -type drain layer 1 is provided. Therefore, a thyristor is formed by these transistors Qnpn and Qpnp, and a first thyristor is formed based on a signal from the first gate terminal G1.
When a channel is formed immediately below the gate electrode 7 of the transistor Qpnp, the transistor Qpnp is turned on.
Since the hole current is supplied to the p-type base layer 4 as the base of the transistor Qnpn through the pnp, the thyristor is turned on.

In the device of this embodiment, in addition to the thyristor section 10, a MOSFET section 20 capable of connecting the p-type base layer 4 which is the base of the transistor Qnpn and the source terminal 31 is provided. Therefore, the second gate terminal G2
When the MOSFET section 20 conducts based on the signal supplied to the transistor Qnpn, the hole current supplied to the base of the transistor Qnpn flows to the source terminal 31 side, and the transistor Qnpn
pn is turned off. For this reason, the device of this example shifts from the thyristor state to the transistor state in which the transistor Qpnp is on.

FIG. 3 shows signals supplied to the gate terminals G1 and G2 for controlling the semiconductor device of this embodiment. In the device of this example, the MOSFETs formed by the first gate electrode 7 controlled by the first gate terminal G1 and the second gate electrode 25 controlled by the second gate terminal G2 are both n-channel MOSFETs. And
By supplying a high-level signal to the gate terminals G1 and G2, these MOSFETs can be made conductive. First, when a high-level signal is supplied to the first gate terminal G1 at time t1, the transistors Qpnp and Qnpn are turned on and operate in a thyristor state. Next, when a high-level signal is supplied to the second gate terminal G2 at time t2, the transistor Qnpn is turned off, and the device of this example shifts to the transistor state. Therefore, when a low-level signal is supplied to the first gate terminal G1 at time t3, the transistor Qpnp can be turned off,
The device of this example is in a stopped state. As described above, the semiconductor device of this example can be turned on in a thyristor state with a low on-voltage at the time of start-up, and can be turned off in a transistor state similar to that of an IGBT that can be controlled with a short turn-off time at the time of stoppage. it can.

Hereinafter, the semiconductor device of the present example will be described in more detail while comparing the characteristics of the semiconductor device of the present example confirmed by simulation and the like with those of the IGBT. FIGS. 4 and 5 show the electron current lines and all the current lines in the semiconductor device and the IGBT of this example based on the results obtained by simulation. In the semiconductor device of this example, when a high-level voltage is applied to the first gate electrode 7 as described above, the first gate electrode 7 formed on the surface of the p-type base layer 4 from the source layer 5 The electron current flows into the n ⁻ -type base layer 3 through the channel immediately below. In response, the hole current from the p ⁺ type drain layer 1 is n ⁻
Since it flows into the base layer 3 of the n ^- type, the n ⁻ type base layer 3 is in the conductivity modulation state. This state is a state where the transistors Qpnp and Qnpn incorporated in the semiconductor device of the present embodiment described above are turned on, and corresponds to a thyristor state. As a result, the pn junction between the source layer 5 and the p-type base layer 4 is broken, and an electron current flows from the entire source layer 5 toward the drain layer 1. The electron current lines (FIG. 4A) and all the current lines (FIG. 4B) of the semiconductor device of this example shown in FIG. 4 show this state well. That is, the electron current passes from the source layer 5 through the p-type base layer 4 and almost uniformly reaches the n ⁻ -type base layer 3 and the n ⁺ -type buffer layer 2 to the drain layer 1. Thus, it can be seen that the semiconductor device of this example operates in a state where the on-resistance is very low.

On the other hand, the IGBT shown in FIG. 5 does not operate in the thyristor state in order to prevent latch-up, and passes from the source layer 5 through the channel formed in the p-type base layer. Thus, an electron current is supplied to the n ⁻ type base layer. Therefore, the conductivity of the n ⁻ -type base layer is reduced and the resistance is reduced.
The pn junction with the base layer 4 of the mold is maintained. As a result, the electron current and the hole current flow unevenly. This state is shown by the electron current line of the IGBT shown in FIG. 5 (FIG. 5A)
And the entire current line (FIG. 5 (b)), where the electron current flows in the channel, and the hole current flows in the channel due to the JEFT effect. Therefore, in the IGBT, the reduction of the on-resistance has a certain limit due to the increase in the channel resistance and the resistance due to the JEFT effect.

FIG. 6 shows current-voltage characteristics of the semiconductor device of this embodiment and the IGBT. As shown in the figure, in the semiconductor device of this example, the source-drain voltage Vc
It can be seen that when e becomes about 1 V, the current density sharply increases, and a thyristor state with low on-resistance is realized. As described above, in the semiconductor device of this example, it is possible to reduce the on-voltage required at the time of on. For example, the on-state voltage when the current density is 100 A / cm ² is about 1.0 V in the semiconductor device of this example, and about 3.2 V in the IGBT. Therefore, it can be seen that in the semiconductor device of this example, the ON voltage can be reduced to about １ ／ of the IGBT. This is presumably because, as described above, in the semiconductor device of the present example, the electrons do not pass through the channel, so that there is no channel resistance, and since there is no JFET effect, there is no resistance due to this.

Next, the operation of the semiconductor device of this embodiment at the time of turn-off will be described. The semiconductor device of this example operates in the thyristor state as described above. For this reason, since the electron current is not supplied through the channel formed by the first gate electrode 7, a low-level voltage is applied to the first gate electrode 7 to extinguish the channel. Also, the semiconductor device of this example cannot be turned off. Therefore, a high-level voltage is applied to the second gate electrode 25 and the transistor Qn
It is necessary to turn off the transistor Qnpn by collecting the hole current supplied to the p-type base layer 4 corresponding to the base of the pn to the source terminal 31 to realize the same transistor state as the IGBT. As a result, the pn junction between the source layer 5 and the p-type base layer 4 is restored, and the electron current and the like can be controlled by the channel formed by the first gate electrode 7. By applying a low-level voltage to extinguish the channel, the semiconductor device of this example can be turned off.

FIG. 7 shows the change of the on-state voltage of the semiconductor device of this embodiment together with the signals supplied to the first and second gate terminals G1 and G2. As can be seen from this figure, when a high-level signal is supplied to the gate terminal G2 at time t2, the semiconductor device of this example shifts from the thyristor state to the transistor state, and the on-voltage changes from 1V to the same as the IGBT. It rises to 3.2V. Therefore, by supplying a low-level signal to the gate terminal G1 at time t3, the IGBT
Similarly to the above, the semiconductor device of this example can be turned off in a short turn-off time.

FIG. 8 shows a comparison between turn-off waveforms of the semiconductor device of this embodiment and an IGBT. This figure shows that the semiconductor device of this example and the IGBT are clamped at a voltage of 300 V,
The change in current density at the time of turn-off (FIG. 8A) and the change in voltage (FIG. 8B) when the cut-off current density is set to 110 A / cm ² are shown. As can be seen from the figure, when a low-level signal is supplied to the gate terminal G1 at time t3 to turn off the semiconductor device of this example, the semiconductor device of this example is turned off with the same turn-off waveform as the IGBT. Becomes Also, the turn-off time is short as in the case of the IGBT.

As described above, the semiconductor device of this embodiment uses the two gate electrodes to achieve a low on-voltage thyristor state,
This is a completely new device that realizes a transistor state with a short turn-off time like the GBT. MCT, IG
MOS technology is used to improve the performance of devices such as BTs.
Higher speed and lower drive power by gate device, lower on-voltage by thyristor structure, higher performance by combining various device structures, but equipment that greatly improves trade-off between on-voltage reduction and switching time Was not found. However, with this device,
It was invented based on a new concept of controlling two devices to appropriate states of on and off,
A high-performance power device that has a low on-voltage of the thyristor and a short switching time of the IGBT and that can control the thyristor by voltage driving can be realized.

[Embodiment 2] FIG. 9 shows a first embodiment according to this embodiment.
1 shows a configuration of a semiconductor device provided with a second gate and a second gate. The semiconductor device of this embodiment is also a vertical semiconductor device as described in the first embodiment, and a p ⁺ -type semiconductor substrate having a drain electrode 35 provided on the back surface is used as the drain layer 1. An n ⁺ type buffer layer 2 and an n ⁻ type base layer 3 are formed thereon by epitaxial growth or the like. A thyristor section 10 having a function as a switching element and an M controlling the thyristor section 10 are provided on the surface of the n ⁻ type base layer 3.
The OSFET section 20 is configured. The configurations of the thyristor unit 10 and the MOSFET unit 20 are the same as those in the first embodiment, and are denoted by the same reference numerals, and description thereof is omitted.

The point to be noted in the semiconductor device of this embodiment is that the thyristor 10 and the MOSFET 20
In addition, the overcurrent limiting section 40 is formed on the n ⁻ type base layer 3. The overcurrent limiting section 40 is provided with an overcurrent detection I which can detect a current flowing through the thyristor section 10.
It comprises a GBT 41 and a polycrystalline silicon resistor 42 connected in series with the overcurrent detection IGBT 41. The overcurrent detection IGBT 41 includes two IGBTs 41a.
And the IGBT 41b.
Since the GBTs 41a and 41b have the same configuration, the following description will be made based on the IGBT 41a. IGBT41a
Are formed on the surface of the p-type detection base layer 43a, which is a well-shaped p-type diffusion layer formed on the surface of the n ^- type base layer 3, and on the inner surface of the p-type detection base layer 43a. The n ⁺ -type detection source layer 44a, and further from the detection source layer 44a to the n ⁻ -type base layer 3 via the detection base layer 43a via the gate oxide film, from the detection gate electrode 45. It is configured. This gate electrode 45
Is connected to the first gate terminal G1, and the IGBTs 41a and 41b for detection are turned on and off at the same timing as the thyristor unit 10.

The polycrystalline silicon resistor 42 is composed of polycrystalline silicon 47 provided on the surface of the n ⁻ type base layer 3 via an oxide film 46, and one connection terminal 48a of this resistor is connected to the source The terminal 31 and the other connection terminal 48
b is the source layer 44 for detection of the IGBTs 41a and 41b for detection.
It is connected to the detection source electrodes 49a and 49b provided at a and b, and further connected to the second gate terminal G2.

FIG. 10 shows an equivalent circuit of the semiconductor device of this embodiment. The configurations of the thyristor unit 10 and the MOSFET unit 20 of the semiconductor device of the present embodiment are the same as those of the first embodiment, and the same reference numerals are given, and the description is omitted. The overcurrent limiting section 40 additionally provided in the semiconductor device of the present example is connected in parallel with the thyristor section 10. That is, the detection IGBT 41a,
The drain 44b is used in common with the drain layer 1 of the thyristor unit 10, and the source terminal 31 has a polycrystalline silicon resistor 4b.
One of the two connection terminals 48a is connected.

Therefore, a current proportional to the current flowing through the thyristor section 10 flows through the overcurrent limiting section 40, and a voltage drop corresponding to the current flowing through the overcurrent limiting section 40 occurs at the other connection terminal 48b of the polycrystalline silicon resistor. I do. Further, since the other connection terminal 48b is connected to the second gate terminal G2, if an overcurrent flows through the thyristor unit 10 and an overcurrent also flows through the overcurrent limiting unit 40 in proportion thereto, the other connection terminal 48b Of the connection terminal 48b of the second gate terminal G
2 is supplied with a high level voltage. For this reason, the semiconductor device of this example shifts from the thyristor state to the transistor state, and can be turned off in a short turn-off time by supplying a low-level voltage to the first gate terminal G1.

FIG. 11 is a timing chart showing these operations. First, at time t11, the first gate terminal G
When a high-level signal is supplied to the semiconductor device 1, the semiconductor device of this example is turned on. Since this state is a thyristor state as described in the first embodiment, the ON voltage is low. next,
Due to some cause, an overcurrent state occurs at time t12,
An overcurrent flows through the thyristor unit 10. At this stage, since the semiconductor device of this example is in a thyristor state, it cannot be turned off even if a low-level signal is supplied to the first gate terminal G1. Therefore, it is necessary to shift the semiconductor device of this example to the transistor state at an early stage. The semiconductor device of this example is provided with an overcurrent limiting section 40, and when an overcurrent occurs, the voltage of the other connection terminal 48b of the polycrystalline silicon resistor increases accordingly. This terminal 48b is
Because it is connected to the gate terminal G2, the second gate terminal G
The voltage of 2 also increases accordingly. As a result, at time t1
3, when the voltage level of the second gate terminal G2 exceeds the threshold value, the MOSFET section 20 conducts, and the semiconductor device of the present example shifts from the thyristor state to the transistor state. Therefore, when a low-level signal is supplied to the first gate terminal G1 at time t14, the semiconductor device of the present example is stopped.

As described above, the semiconductor device of this embodiment can automatically shift from the thyristor state to the transistor state when an overcurrent state occurs, and can stop the semiconductor device in response to an external signal. Therefore, it is possible to prevent burning of the semiconductor device due to an overcurrent state, etc., and an intelligent power semiconductor device having a built-in overcurrent detection / protection device can be realized by the semiconductor device of this example. Also, IGB for detecting overcurrent
Since T and the detection resistor can all be installed in the semiconductor device itself, the switching element having such a function can be handled as a single semiconductor element. Further, as described above, the semiconductor device of this example is turned on in the thyristor state and can be turned off after the transition to the transistor state, so that the turn-off time is shortened at the same time as the low on-voltage. Semiconductor device having characteristics that can suppress switching loss even in high frequency applications. As described above, by using the semiconductor device of this example, it is possible to realize a semiconductor device having excellent characteristics such as a low on-voltage and a short turn-off time while having a protection function.

In the present embodiment and the first embodiment, the description has been given based on the vertical device in which the source layer and the drain layer are provided on the front and back surfaces of the device, however, the source layer and the drain layer are on the same surface. Needless to say, the present invention can be realized even in an installed horizontal device.

[0040]

As described above, the semiconductor device according to the present invention uses the first gate electrode and the second gate electrode to provide the same low on-state voltage as the thyristor and the off-state when the semiconductor device is on. Sometimes, a short switching time similar to that of an IGBT can be realized. Therefore, the trade-off between the switching time and the on-state voltage, which is impossible with the conventional power semiconductor devices such as MCT and IGBT, can be greatly improved. Therefore, the present device makes it possible to significantly improve the performance of power devices used in devices and circuits with medium and large currents and medium and high withstand voltages. Further, since the ON voltage is low and the switching speed is high, loss can be significantly reduced even in high frequency applications. As described above, by adopting the semiconductor device according to the present invention, it is possible to realize a reduction in the size and a reduction in the size of various devices which have been demanded in recent years, particularly from the viewpoint of power saving.

In particular, in the present invention, the base region of the second conductivity type is used.
By configuring the current detection unit in
A current proportional to the current flowing through the thyristor
it can. For this reason, the thyristor section
When a current flows, a current proportional to the
To the resistance means connected in series with the current detection section.
The voltage drop increases. Therefore, the voltage applied to the second gate electrode
Control voltage rises, the control MISFET
It can be turned off. Thereby, the semiconductor device
Transitions to a transistor state that can be stopped, and the first gate
Is immediately turned off by the potential applied to the gate electrode.
It becomes possible .

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG.

3 is an explanatory diagram illustrating signals supplied to two gate terminals of the semiconductor device illustrated in FIG. 1 and an operation state of the semiconductor device.

FIG. 4 is an explanatory diagram showing a current flow in the semiconductor device shown in FIG. 1 using an electron current line (a) and all current lines (b).

FIG. 5 is an explanatory diagram showing a current flow in the IGBT using an electron current line (a) and all current lines (b).

FIG. 6 is a graph showing current-voltage characteristics of the semiconductor device and the IGBT shown in FIG. 1;

FIG. 7 is a sectional view of the semiconductor device shown in FIG.
FIG. 6 is a graph showing the states of the signals 1 and G2 (a) and the change in voltage (b) when the state changes from the thyristor state to the transistor state.

FIG. 8 shows a current change (a) and a voltage change (b) when the semiconductor device and the IGBT shown in FIG.
FIG. 7 is a graph showing a state (c) of the signal of FIG.

FIG. 9 is a cross-sectional view illustrating a configuration of a semiconductor device according to a second embodiment of the present invention.

FIG. 10 is a circuit diagram showing an equivalent circuit of the semiconductor device shown in FIG. 9;

FIG. 11 is a timing chart showing an operation of the semiconductor device shown in FIG.

FIG. 12 is a cross-sectional view illustrating an example of the structure of the IGBT.

[Explanation of symbols]

1 ... drain layer 2, ... n ⁺ -type buffer layer 3 ... n ^- -type base layer 4 ... p-type base layer 5, ... n ⁺ -type source layer 6 ... p of ⁺ -type contact layer 7 ... first MOS base layer 22, ... n ⁺ -type gate electrode 8 ... gate oxide film 10 ... thyristor 20 ... MOSFET portion 21 ... p-type MOS drain layer 23 ... n ⁺ type MOS source layer 24 ... p ⁺ type MOS contact layer 25 ... second gate electrode 26 ... gate oxide film 30 ... drain terminal 31 ... .. Source terminal 32 ... First gate terminal G1 33 ... Second gate terminal G2 35 ... Drain electrode 36 ... Source electrode 37 ... MOS source electrode 38 ... Connection electrode 40 ...・ Overcurrent detector 41 ・ ・ ・ Overcurrent IGBT for current detection 42 ... Polycrystalline silicon resistor 43 ... Base layer for detection 44 ... Source layer for detection 45 ... Gate electrode for detection 46 ... Insulating oxide film 47 ... Polycrystalline silicon 48 connection terminal 52 drain layer 53 n ⁺ type buffer layer 54 n ⁻ type conductivity modulation layer 55 gate oxide film 56 gate electrode 57. -P-type channel layer 58 ... n ⁺ -type source layer 59 ... p ⁺ -type contact layer 60 ... source electrode 61 ... drain electrode 63 ... channel

Continuation of front page (56) References JP-A-5-326936 (JP, A) JP-A-5-315619 (JP, A) JP-A-5-235363 (JP, A) JP-A-4-18763 (JP) JP-A-3-148872 (JP, A) JP-A-3-145163 (JP, A) JP-A-3-136371 (JP, A) JP-A-1-181571 (JP, A) JP 63-288064 (JP, A) Japanese Patent Application Laid-Open No. 57-78225 (JP, A) 5, p. 5.7 (1992) "Dual gate MOS gate thyristor [DUGMOT]" (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/749

Claims (3)

(57) [Claims] A first conductive type base region and a first conductive type base region are provided on a second conductive type base region at positions opposed to the first conductive type drain region to which a drain potential is applied. A source region formed in the region, to which a source potential is applied, and a first gate electrode provided from the source region to the base region of the second conductivity type via the base region of the first conductivity type. A semiconductor device having a thyristor section provided with a thyristor section, comprising: a control MIS including a second gate electrode capable of controlling connection between the base region of the first conductivity type and the source region.
Have a FET, at least one pair of first guide in the base region of the second conductivity type
An electroformed detection base layer and formed in the detection base layer
The second conductive type detection source layer and the detection source
From the base layer to the base region of the second conductivity type.
And a current detection unit having a detection gate electrode.
Via a resistance means connected in series with the detection source layer
The source potential is applied, and the detection source layer
And the second gate electrode is connected to the semiconductor device. 2. A first conductivity type base region and a first conductivity type base region on a second conductivity type base region opposite to the first conductivity type drain region to which a drain potential is applied. A source region formed in the region, to which a source potential is applied, and a first gate electrode provided from the source region to the base region of the second conductivity type via the base region of the first conductivity type. A semiconductor device having a thyristor section provided with: a MIS base region of a first conductivity type formed on the base region of the second conductivity type separately from the base region of the first conductivity type; MISFE for control including a second gate electrode formed in a base region for MIS of one conductivity type
And a control MISFET portion having a second conductive type MIS source layer to which the source potential is applied together with the MIS base region; and a first conductive type base. A MIS drain layer of the second conductivity type connected to the region, and at least one set of the first conductive layer is provided in the base region of the second conductivity type.
An electroformed detection base layer and formed in the detection base layer
The second conductive type detection source layer and the detection source
From the base layer to the base region of the second conductivity type.
And a current detection unit having a detection gate electrode.
Via a resistance means connected in series with the detection source layer
The source potential is applied, and the detection source layer
And the second gate electrode is connected to the semiconductor device. 3. An apparatus according to claim 1 or 2, wherein the resistance means is a semiconductor device wherein the formed second conductivity type base region a polycrystalline silicon resistor.