JPH05335310A - Semiconductor device and its production - Google Patents

Abstract

PURPOSE:To realize stable bonding of bump and reduce bonding damage when producing a semiconductor device having bumps on its chip surface. CONSTITUTION:The titled device is produced by the following steps; first bumps 3 that will not be connected with a semiconductor circuit are formed adjacent to the corners of a semiconductor chip 1 and a plurality of second bumps 2 that will be connected with the semiconductor circuit are formed between the corners, leads 4 and 5 are placed on the bumps 3 and 2, and the leads 4 and 5 are pressed down by using the flat face of a bonding tool 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device having bumps on the surface of a semiconductor chip and a method for manufacturing the same.

In recent years, a T having bumps formed on a semiconductor chip
AB ICs are widely used, and the number of pins, that is, the number of bumps, is very large. As the number of pins increases, the stability and certainty of bonding the leads to the bumps is required more than ever before.

[0003]

2. Description of the Related Art As a method for connecting a semiconductor chip and a lead, a TAB (tape automated bonding) method is adopted.

In the TAB method, as illustrated in FIG. 4 (a), first, bumps 42 are formed on a plurality of electrodes formed at substantially equal intervals along the outer periphery of a semiconductor chip 41, and then, Place the lead 43 on each bump 42,
In this state, the bonding tool 44 presses the leads 43 against the bumps 42 to connect them, as shown in FIG.

In this case, each bump 42 is connected to the semiconductor integrated circuit formed on the semiconductor chip 41, and the lower surface of the bonding tool 44 is flattened so that the plurality of leads 43 and the plurality of bumps 42 are formed at once. Is configured to connect.

[0006]

However, according to such a bonding method, even if the bonding tool 44 having a uniform flat surface is used, the load applied to the bumps 42 at the corners of the semiconductor chip 41 becomes large. Since the so-called edge effect occurs, there is a problem that stable bonding cannot be performed due to uneven load.

Moreover, there is a disadvantage that the bonding damage is likely to occur due to the uneven load and the electrode wiring (not shown) under the bump 42 is broken. Such a problem also occurs when the bonding tool 44 is slightly inclined with respect to the semiconductor chip 41, as shown in FIG.

The present invention has been made in view of the above problems, and it is an object of the present invention to provide a semiconductor device capable of stable bonding of bumps and reducing bonding damage, and a manufacturing method thereof. To aim.

[0009]

As shown in FIG. 1, the above-mentioned problems are caused by a first bump 3 which is not connected to the semiconductor circuit in the vicinity of a corner of the semiconductor chip 1 on which the semiconductor circuit is formed. And a plurality of second bumps 2 connected to the semiconductor circuit are formed between the corners.

Alternatively, as illustrated in FIG. 3, the first
The bump 3 is formed in a region reaching the tip of the corner of the semiconductor chip 1 by a semiconductor device.

Alternatively, a step of forming first bumps 3 not connected to a semiconductor circuit near the corners of the semiconductor chip 1 and forming a plurality of second bumps 2 connected to the semiconductor circuit between the corners, Due to the step of placing the leads 4 and 5 on the first bump 3 and the second bump 2 and the flat surface of the bonding tool 6, the leads 4 and 5 are attached to the first and second bumps.
And a step of connecting the bumps 2 and 3 by pressing them.

Alternatively, as illustrated in FIG. 2, a first bump 3 which is not connected to a semiconductor circuit is formed near a corner of the upper surface of the semiconductor chip 1, and a second bump 2 which is connected to the semiconductor circuit is formed. A step of forming a plurality between the corners,
Placing leads 4 on the second bumps 2,
The lead 4 is pressed and connected to the second bump 2 by the pressing surface of the bonding tool 7 provided with the convex portion 8 in the portion corresponding to the first bump 3, and at the same time, the convex portion 8 is connected to the second bump 2. And a step of pressing the bump 3 onto the bump 3.

[0013]

[Operation] According to the present invention, the first bump 3 which is not connected to the semiconductor circuit is formed near the corner of the semiconductor chip 1, and the second bump 2 which is connected to the semiconductor circuit is formed between them. .

In this case, if the leads 5 are also placed on the first bumps 3, when the leads 4 are connected by the bonding tool 6, the first bumps 3 may have an edge effect or a slight inclination of the bonding tool 6. Although a large load is applied, an excessive load is not applied to the bonding bumps 2 during that time, and stable bonding is performed.

Further, since the first bump 3 is separated from the electrode wiring below the bonding bump 2, there is no influence of disconnection due to bonding damage. The same effect can be obtained by providing the convex portion 8 on a portion of the pressing surface of the bonding tool 7 corresponding to the first bump 3 and directly pressing the first bump 3.

Further, as shown in the second invention, if the area of the first bump is widened, the pressure by the bonding tool 7 can be reduced and the bonding damage can be reduced.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. (A) Description of First Embodiment of the Present Invention FIG. 1 is a plan view and a side view showing a bonding state of a first embodiment of the present invention.

In FIG. 1A, reference numeral 1 is a semiconductor chip on which a semiconductor integrated circuit (not shown) is formed.
A plurality of 0 μm ² bonding bumps 2 are formed by gold plating at substantially equal intervals.
Is connected to the semiconductor integrated circuit.

Further, on the extension of the arrangement of the bonding bumps 3 near the corners of the semiconductor chip 1, gold auxiliary bumps 3 which are not connected to the semiconductor integrated circuit are formed to the same thickness as the bonding bumps 2. Has been done.

After this, a copper-made lead 4 having a thickness of 0.1 mm and covered with tin is placed on the bonding bump 2 on the semiconductor chip 1, and on the auxiliary bump 3, a lead 5 which is not connected to the outside. To place.

Next, as shown in FIG. 1B, when the leads 4 and 5 are thermocompression bonded to the bonding bumps 2 and the auxiliary bumps 3 by the flat lower surface of the bonding tool 6, the bonding bumps 2 and the auxiliary bumps 3 are formed. Leads 4 and 5 are connected to 3 by eutectic.

In this case, a large load is applied to the bumps near the corners of the semiconductor chip 1 due to the edge effect.
In this embodiment, since the auxiliary bump 5 is formed in that area and the lead 5 is placed on this area, the auxiliary bump 5 is slightly crushed by a large load.

Therefore, an unnecessary load is not applied to the bonding bumps 2 between the auxiliary bumps 5, and stable bonding is performed. Since the auxiliary bump 3 is separated from the electrode wiring below the bonding bump 2,
There is no effect of disconnection due to bonding damage.

Further, as shown in FIG. 1 (c), even if the bonding tool 6 is slightly inclined with respect to the upper surface of the semiconductor chip 1 and the load applied to each bump is biased, the bias load is also biased. As a result, the bonding bumps 2 are not subjected to an unnecessarily heavy load and stable bonding can be performed, and the bonding damage is suppressed. (B) Description of Second Embodiment of the Present Invention FIG. 2 is a plan view and a side view showing a bonding state of a second embodiment of the present invention.

In FIG. 2, bonding bumps 2 and auxiliary bumps 4 having the same structure as in the first embodiment are formed on a semiconductor chip 1 formed in a semiconductor integrated circuit. Then, as in the conventional case, the leads that are electrically connected to the external device are placed on the bonding bumps 2, while the leads are not placed on the auxiliary bumps 3 at one corner of the semiconductor chip. To do.

After that, the leads 4 are pressed by using a bonding tool 7 as shown in FIG. 2B to connect the leads 4 to the bonding bumps 2. The bonding tool 7 used here has projections 8 having the same thickness as the leads 4 on the flat lower surface corresponding to the four corners of the semiconductor chip 1.

By the way, although a large load is applied to the bumps at the corners of the semiconductor chip 1 due to the edge effect, in the present embodiment, the auxiliary bumps 5 are formed in the regions, and the convex portions 8 of the bonding tool 7 are applied thereto. Since they are in contact with each other, the auxiliary bumps 5 receive a large load and prevent the other bonding bumps from being unnecessarily loaded.

Therefore, similar to the first embodiment, stable bonding is performed and the bonding damage can be reduced. Even when the lower surface of the bonding tool 7 is slightly inclined as shown in FIG. 2 (c) so that the load applied to the bumps becomes uneven, the same effect can be obtained. (C) Description of Other Embodiments of the Present Invention In the above-mentioned embodiments, the auxiliary bumps are formed at the corners of the semiconductor chip 1 and provided on the extension of the bonding bumps 2. However, as shown in FIG. And the auxiliary bump 9 at that corner
May be shaped so as to spread to the tip of the corner of the semiconductor chip 1, and the pressing force applied to the semiconductor chip 1 may be reduced by increasing the area that the bonding tool 7 contacts.

In this case, as shown in FIG. 1 (b), the leads may be placed on the auxiliary bumps 9 or, as in the second embodiment, the protrusions 8 of the bonding tool 7 may be contacted. A large load may be applied here.

Further, in the above embodiment, the auxiliary bump 3
The lead 5 is placed on the bonding tool 7, or the convex portion 8 is formed on the bonding tool 7.
Although the pressing force is applied to the auxiliary bump 7, if the height thereof is set to the thickness of the lead 4 on the bonding bump 2, the lead 5 can be placed or the convex portion 8 can be formed on the bonding tool 7. Need not be formed.

Further, although the auxiliary bumps are provided at four corners of the semiconductor chip in the above-described embodiment, they may be provided at two corners.

[0032]

As described above, according to the present invention, the first portion which is not connected to the semiconductor circuit is provided in the vicinity of the corner of the semiconductor chip.
Second bumps that are connected to the semiconductor circuit between them.
Since the bumps are formed, the leads are placed on these bumps, and when these are pressed and connected by the bonding tool, a large load is applied to the first bump due to the edge effect and a slight inclination of the bonding tool. It takes
In the meantime, the second bump does not receive an excessive load,
Stable bonding can be performed on the second bump connected to the semiconductor circuit. Moreover, since the first bump is separated from the electrode wiring below the bonding bump, the influence of disconnection due to bonding damage can be suppressed.

The same effect can be obtained by providing a convex portion on the pressing surface of the bonding tool corresponding to the first bump and directly pressing the first bump. Further, as shown in the second invention, if the area of the first bump is widened, the pressure by the bonding tool can be reduced and the bonding damage can be reduced.

[Brief description of drawings]

FIG. 1 is a plan view and a side view showing a first embodiment of the present invention.

FIG. 2 is a plan view and a side view showing a second embodiment of the present invention.

FIG. 3 is a plan view showing a third embodiment of the present invention.

FIG. 4 is a plan view and a side view showing a conventional example.

[Explanation of symbols]

 1 semiconductor chip 2, 3 bumps 4, 5 leads 6, 7 bonding tool 8 convex portion 9 bump

Claims (4)

[Claims] 1. A first bump (3) which is not connected to the semiconductor circuit is provided in the vicinity of a corner on a semiconductor chip (1) on which the semiconductor circuit is formed, and a second bump which is connected to the semiconductor circuit is provided. A semiconductor device, wherein a plurality of bumps (2) are formed between the corners. 2. The semiconductor device according to claim 1, wherein the first bump (3) is formed in a region reaching a tip of the corner of the semiconductor chip (1). 3. A first bump (3) not connected to a semiconductor circuit is formed near a corner of a semiconductor chip (1), and a plurality of second bumps (2) connected to the semiconductor circuit are provided between the corners. Forming step, placing leads (4, 5) on the first bump (3) and the second bump (2), and using the flat surface of the bonding tool (6) to form the leads ( 4, 5) are connected to the first and second bumps 2, 3 by pressing them. 4. A second bump (2) which is connected to the semiconductor circuit while forming a first bump (3) not connected to the semiconductor circuit in the vicinity of a corner of the upper surface of the semiconductor chip (1).
A plurality of ridges between the corners, a step of mounting the leads (4) on the second bumps (2), and a convex portion at a portion corresponding to the first bumps (3). By the pressing surface of the bonding tool (7) provided with (8), the lead (4) is pressed and connected to the second bump (2), and at the same time, the convex portion (8) is connected to the first bump. (3) a step of pressing the semiconductor device.