JPH05335272A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a process not restricting a quality of a usable interlayer insulating film at the time of burying a contact hole by selective growth for burying inside the contact hole with good selectivity in relation to a method of burying a conductive material into the contact hole. CONSTITUTION:This manufacturing method of a semiconductor device consists of a process of in order growing an interlayer insulating film on a foundation substrate and an upper layer insulating film 5 having a higher etching rate than the interlayer insulating film to an etchant, a process of opening a contact hole in the upper layer insulating film 5 and the interlayer insulating film 4, a process of selectively burying a conductive material 6 inside a contact hole and a process of etching-removing the upper layer insulating film 5 by using an etchant.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of burying a conductive material in a contact hole formed in an interlayer insulating film.

In recent years, semiconductor devices have been miniaturized to improve their performance, and the diameter of contact holes has reached the submicron region. There is a demand for an embedding technique for such a fine contact hole.

[0003]

2. Description of the Related Art It is difficult to embed a conductive material in a fine contact hole by a conventional sputtering method, and a vapor phase growth (CVD) technique, in particular, a method of selectively growing a conductive material in a contact hole is attempted. Technology is drawing attention.

However, there are few kinds of conductive materials having good selectivity, and the buried film thickness of the conductive material changes depending on the kind of interlayer insulating film exposed around the contact holes.

[0005]

If the interlayer insulating film to be used is determined in terms of selectivity during growth, the properties required for the interlayer insulating film, that is, the insulating property, the low dielectric constant, the flatness, etc. are satisfied. There was a problem that it would not be possible to guarantee that

It is an object of the present invention to provide a process in which the material of the interlayer insulating film that can be used when the contact hole is filled by selective growth is not limited and the contact hole is filled with high selectivity.

[0007]

To solve the above problems, a step of sequentially growing an interlayer insulating film 4 on a base substrate and an upper insulating film 5 having an etch rate higher than that of the interlayer insulating film with respect to an etchant, A step of forming a contact hole in the upper insulating film 5 and the interlayer insulating film 4, a step of selectively filling the contact hole with a conductive material 6, and a step of etching away the upper insulating film 5 using the etchant. At the same time, it is achieved by a method of manufacturing a semiconductor device having a step of simultaneously removing the conductive material attached on the upper insulating film at the time of the embedding step.

[0008]

According to the present invention, before forming a contact hole in the interlayer insulating film, an upper insulating film having an etching rate higher than that of the interlayer insulating film is deposited on the interlayer insulating film, and then the contact hole is formed. A conductive material is selectively grown inside and the upper insulating film is removed by an isotropic etchant.

Therefore, the growth residue (unnecessary conductive material due to selective collapse) attached on the upper insulating film can be removed at the same time as the upper insulating film is removed.

[0010]

1 (A) to 1 (D) are sectional views for explaining an embodiment of the present invention. In FIG. 1 (A), a silicon (Si) substrate 1
Phosphosilicate glass doped with boron as an insulating film on the entire upper surface
(BPSG) film 2 is grown, and tungsten (W) wiring 3 is formed on it.
To form.

Next, a silicon dioxide (SiO ₂ ) film 4 having a thickness of 10000Å and an PSG film 5 having a thickness of 1000Å as an upper insulating film are sequentially grown on the substrate by the CVD method.
Here, the PSG film 5 is hydrofluoric acid as an isotropic etchant.
It is an insulating film that has a higher etch rate than SiO _{2 with} respect to (HF) and can maintain selectivity during growth.

In FIG. 1B, a contact hole is opened in the PSG film 5 and the SiO ₂ film 4 by using a normal lithography technique to expose the surface of the W film 3. In FIG. 1 (C), W is used as the filling conductive material, and the W film 6 is embedded in the contact hole by selective growth of W by the CVD method. At this time, the W film 6A due to the selective collapse adheres to the PSG film 5 in places.

An example of conditions for the selective growth of W is shown below. Reactive gas: WF ₆ / SiH ₄ / H ₂ , 15 SCCM / 5 SCCM / 100 SCCM Gas pressure: 40 mTorr Substrate temperature: 200-300 ℃ PSG film using 1% HF solution as an etchant in Fig. 1 (D). Remove 5. At this time, the W film 6A is also removed at the same time.

Even when the W film 6 is not filled up to the upper edge of the contact hole as shown in the drawing, the PSG film 5 is removed completely as a result as the PSG film 5 is removed.

In the embodiment, as an example of selecting an HF aqueous solution as the isotropic etchant, SiO _{2 is used} as the interlayer insulating film,
PSG was used as the upper insulating film, but the combination with can be freely selected if there is a difference in the etch rate. For example, spin-on-glass (S relative to SiO ₂ as an upper layer insulating film
OG) and the like can be used.

[0016]

According to the present invention, when a contact hole is filled by selective growth, a process that does not limit the usable material of the interlayer insulating film can be obtained, and the sub-micron class fine contact hole can be filled with high selectivity. Is now possible.

[Brief description of drawings]

FIG. 1 is a sectional view illustrating an embodiment of the present invention.

[Explanation of symbols]

1 Si substrate 2 BPSG film 3 W wiring with wiring 4 Interlayer insulating film with SiO ₂ film 5 Upper insulating film with PSG film 6 Conductive material film with W film 6A Growth residue of W attached to the upper insulating film surface

Claims (1)

[Claims] 1. A step of sequentially growing an interlayer insulating film (4) on an underlying substrate and an upper insulating film (5) having an etch rate higher than that of the interlayer insulating film with respect to an etchant, and the upper insulating film and the interlayer. The process of opening a contact hole in the insulating film,
A step of selectively embedding a conductive material (6) in the contact hole, etching away the upper insulating film using the etchant, and simultaneously removing the conductive material deposited on the upper insulating film during the embedding step. And a step of removing the semiconductor device.