JPH05332945A - Inspection device of image pattern - Google Patents

Abstract

PURPOSE:To inspect an image pattern without passing by any defects of an object as a reference. CONSTITUTION:A switching part 7 switches one and the other of an object image signal OS and a master image signal MS based on a switching signal which is given arbitrarily and outputs them as first and second object image signals SS1 and SS2. A comparison inspection part 8 compares a part corresponding to each one of an evaluation section of an image pattern which is expressed by the first object signal SS1 and a plurality of compensation sections with a part corresponding to an evaluation section of image pattern which is expressed by the second object image signal SS2, thus that there are defects in the evaluation section when a difference exceeding a specified level is found in the evaluation section and hence detecting all defects in the master image signal MS without fail.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pattern inspection apparatus used for inspection of defects in a wiring pattern on a printed circuit board, for example.

[0002]

2. Description of the Related Art A comparison method is known as one of image pattern inspection methods used for inspection of printed circuit board wiring patterns and the like. This comparison method divides each of the image pattern (master pattern) of the object to be the reference and the image pattern (object pattern) of the object to be inspected into small areas of a predetermined size (evaluation section), Both patterns are superposed and compared for each evaluation section, and if there is a difference of a predetermined value or more, it is determined that there is a defect in the evaluation section. Conventionally, when carrying out this inspection method, it is necessary to accurately install the inspection object at a predetermined position, and the accuracy of the method of installing the inspection object in the inspection device, the mechanism of the inspection device, and the like are difficult. Was required.

As a solution to this problem, an inspection technique disclosed in Japanese Patent Application Laid-Open No. 62-140009 by the same applicant has been proposed. In this technique, as shown in FIG. 3, an expanded section SR is prepared in which the periphery of the evaluation section CR is expanded by a predetermined amount, and a plurality of correction sections Mij in which the evaluation section CR is displaced are provided. (I = 1,2,
, M, j = 1,2, ..., n) are prepared. Each one of the master patterns (correction evaluation master patterns) corresponding to each correction section Mij and the evaluation section CR is compared with the object pattern (evaluation object pattern) corresponding to the evaluation section CR, and predetermined in all of the plurality of comparisons. Only when the above differences are recognized, it is determined that the evaluation object pattern has a defect. Such comparison is sequentially executed for each evaluation section CR.

[0004]

However, the above technique has the following problems. FIG. 4 is a schematic diagram for explaining this problem. FIG. 4A shows an example of an object pattern corresponding to one evaluation section CR, and FIG. 4B shows an example of a master pattern corresponding to an expansion section SR obtained by expanding the same evaluation section CR. It is shown. In these figures, the inspection and reference object is the wiring pattern of the printed circuit board, and the hatched area represents an image corresponding to the wiring pattern.

There is a defect in the wiring pattern of the printed circuit board to be used as a reference, and the defect is shown in FIG.
When the defect DD exists in the master pattern and the defect DD is located in the vicinity of the edge of the extended section SR, as shown in FIG. As a result, no defect is found in the comparison between the correction evaluation master pattern corresponding to the correction section Mm1 and the object pattern shown in FIG. As a result, it is determined that there is no difference between the master pattern and the object pattern corresponding to the evaluation section CR. That is, in the above-described conventional comparative inspection, a defect of the master pattern may not be detected.

In other words, the defect-free in the conventional comparative inspection is not equivalent to the absence of defects in both the reference object and the inspection object, and even if there is a defect-free combination inspection during the inspection. However, it cannot be judged that there is no defect in the reference object.

The present invention aims to solve the above-mentioned drawbacks of the prior art, and to provide an inspection device for an image pattern which does not overlook defects of an object to be a reference. To aim.

[0008]

SUMMARY OF THE INVENTION An image pattern inspection apparatus according to the present invention compares a first image pattern and a second image pattern for each evaluation section divided into areas of a predetermined size to detect defects. An image pattern inspecting device for detecting (a) an image for obtaining a first image signal expressing the first image pattern and a second image signal expressing the second image pattern. Signal input means, (b) storage means for storing the first image signal, and (c) one of the first image signal and the second image signal read from the storage means. Switching means for obtaining the first and second target image signals by mutually switching the other in response to a given switching signal, and (d) a predetermined amount centered on the evaluation section. Get an expansion section that expands the periphery, and In the extended section, the evaluation section is displaced to set a plurality of correction sections, and the first target image pattern represented by the first target image signal corresponds to the evaluation section and the correction section. Each part is extracted to obtain a plurality of corrected evaluation image patterns, and all of these corrected evaluation image patterns correspond to the evaluation section from the second target image pattern represented by the second target image signal. Only when there is a difference of a predetermined degree or more from the portion, it is determined that there is a defect in the evaluation section, and the above-described determination is executed for each evaluation section.

[0009]

The apparatus according to the present invention is provided with the switching means for transmitting the two image signals to the comparison inspection means in a selectable manner. By arbitrarily selecting one of the two image patterns represented by these image signals, An evaluation section and a correction section can be set in this, and an evaluation section can be set in the other 1. That is, since it is possible to perform both of the two kinds of selections and perform the inspections respectively, it is possible to overlook the defect possessed by any image pattern, and thus overlook the defect possessed by the object to be the reference. Absent.

[0010]

1 is a schematic block diagram showing the overall construction of an image pattern inspection apparatus 100 for inspecting a wiring pattern on a printed circuit board according to an embodiment of the present invention.
The optical head 3 optically scans the surface of the printed board 1 having the wiring pattern 2 while relatively scanning the surface. The optical head 3 outputs an analog electric signal in which a significant difference in strength appears depending on the presence or absence of the wiring pattern 2 with scanning, and transmits the analog electric signal to the A / D converter 4. The A / D conversion unit 4 converts this analog electric signal into a digital electric signal and transmits it to the binarization processing unit 5. The binarization processing unit 5 compares the digital electric signal with a predetermined threshold value, and based on the result, a value "
The image signal is converted into a digital image signal having two values of "1" and "0". As a result, the image signal has a value "1" in the area where the wiring pattern 2 exists and a value "1" in the area where the wiring pattern 2 does not exist. As a result, this image signal represents the image pattern of the read wiring pattern 2.

When the printed circuit board 1 having the wiring pattern 2 to be the reference is read, the image signal is stored in the memory 6 (storage means) as the master image signal MS (first image signal). The master image signal MS is a signal expressing the master pattern of the wiring pattern 2.

On the other hand, when inspecting the printed circuit board 1 as the inspection object, the printed circuit board 1 is attached to the optical head 3.
Read by. At this time, the image signal output by the binarization processing unit 5 is an object image signal OS (second image signal) that represents the object pattern of the wiring pattern 2.
Is. The stored master image signal MS is output from the memory 6 in synchronization with the binarization processing unit 5 outputting the object image signal OS.

The switching unit 7 (switching means) has a structure of a data selector, and responds to a switching signal arbitrarily given to one or the other of the master image signal MS and the object image signal OS. By switching between each other,
The first and second target image signals SS1 and SS2 are selectively output to the two output lines 7a and 7b. When inspecting the printed circuit board 1 as the inspection object, the master image signal MS is the first target image signal SS1 and the object image signal OS is the second target image signal SS2.

The comparison inspection unit 8 (comparison inspection means) has a first
And the second target image signals SS1 and SS2 are input.
The comparison inspection unit 8 adds the extended section S to the image pattern (first target image pattern) represented by the first target image signal SS1.
R and the correction section Mij are set, and the second target image signal SS
Image pattern represented by 2 (second target image pattern)
The evaluation section CR is set to. The comparison inspection unit 8 includes a plurality of correction sections Mij in the extension section SR obtained by extending the evaluation section CR.
1 and the plurality of first target image patterns (corrected evaluation image patterns) corresponding to the evaluation section CR and the second target image pattern corresponding to the evaluation section CR are compared, and in any of the comparisons, predetermined When a difference equal to or more than is recognized, it is determined that the evaluation section CR has a defect. Further, the comparison inspection unit 8 executes such comparison and determination for each evaluation section CR.

After the inspection of the printed circuit board 1 as the inspection object is completed, the inspection of the printed circuit board 1 selected as the reference object is first performed. At this time, the printed circuit board 1 to be read remains the inspection object, and the printed circuit board 1 is newly added.
By transmitting a switching signal to the switching unit 7 without installing the optical disc 3 under the optical head 3, the object image signal OS from the binarization processing unit 5 is selected as the first target image signal SS1 and the memory 6 The master image signal MS from is selected as the second target image signal SS2. This allows
In the process executed by the comparison inspection unit 8, the positions of the object image signal OS and the master image signal MS are switched, and the evaluation section CR is set in the master pattern which is the image pattern represented by the master image signal MS. The evaluation section CR and the correction section Mij are set in the object pattern that is the image pattern represented by the signal OS. That is, a corrected evaluation image pattern is obtained from the object pattern.

FIG. 2 schematically shows an example of both image patterns at this time. FIG. 2A shows a master pattern,
FIG. 2B shows an object pattern. The hatched area represents an image corresponding to the wiring pattern. When a defect exists in the wiring pattern 2 of the printed board 1 selected as the reference object, the defect DD appears in the master pattern correspondingly. However, since the correction section Mij is not set in the master pattern having the defect DD but is set in the object pattern, the master section is set in any one of the correction section Mij and the object pattern corresponding to the evaluation section CR. A difference corresponding to the defect DD existing in the pattern is found, and it is determined that there is a defect in the evaluation section CR. As a result, there is no risk of overlooking defects present in the wiring pattern 2 of the printed circuit board 1 selected as the reference object.

[0017]

According to the present invention, one of the two image patterns represented by the two image signals is arbitrarily selected, the evaluation section and the correction section are set in this, and the evaluation section is set in the other one. be able to. Therefore, it is possible to perform the inspection by changing the positions of the image patterns of the reference object and the inspection object, and thus it is possible to prevent the defect of the reference object from being overlooked.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of the overall configuration of an image pattern inspection apparatus according to an embodiment of the present invention.

FIG. 2 is a schematic diagram showing an example of an image pattern according to the embodiment of the invention.

FIG. 3 is an explanatory diagram illustrating a correction section in a conventional inspection technique.

FIG. 4 is a schematic diagram illustrating a problem in a conventional inspection technique.

[Explanation of symbols]

 CR evaluation section SR expansion section Mij correction section MS master image signal (first image signal) OS object image signal (second image signal) SS1 first target image signal SS2 second target image signal 6 memory (storing means ) 7 switching unit (switching unit) 8 comparison inspection unit (comparison inspection unit)

Claims (1)

[Claims] 1. An image pattern inspection apparatus for detecting a defect by comparing a first image pattern and a second image pattern for each evaluation section divided into areas of a predetermined size, comprising: ) Image signal input means for obtaining a first image signal expressing the first image pattern and a second image signal expressing the second image pattern, and (b) the first image signal Storing means for storing, and (c) one or the other of the first image signal and the second image signal read from the storing means in response to a switching signal given arbitrarily. Switching means for obtaining the first and second target image signals by switching between each other, and (d) an expanded section whose peripheral area is expanded by a predetermined amount with the evaluation section as a center, to obtain an expanded section. Then, the evaluation section is displaced and a plurality of correction sections are An image is set, portions corresponding to the evaluation section and the correction section are respectively extracted from the first target image pattern represented by the first target image signal to obtain a plurality of corrected evaluation image patterns, Only when all of the corrected evaluation image patterns of the second target image pattern represented by the second target image signal differ from the portion corresponding to the evaluation section by a predetermined degree or more. In the image pattern inspection apparatus, the image pattern inspection apparatus determines that there is a defect and executes the above determination for each evaluation section.