JPH05328266A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent the deterioration in picture quality by selecting a transfer direction of each column line driver in pairs to be opposite to each other and writing data from a picture element in an opposite direction with respect to the horizontal direction of a display pattern. CONSTITUTION:A column line driver consists of a couple or plural couples of odd number column use and even number column use line drivers 2,3 and the data transfer direction of the odd number column use and even number column use line drivers 2, 3 is opposite to each other and data are written from a picture element in the opposite direction with respect to the horizontal direction of the display pattern. That is, upper stage data DATA.U are written to a picture element 23 on the upper left of the screen via a picture element transistor (TR) 18 and simultaneously lower stage data DATA.L are written to a picture element 27 on the upper right of the screen via a picture element transistor (TR) 22. Then the write of the DATA.U is repeated from the left to the right of the display screen up to the picture element 26 and the write of the DATA.L is repeated from the right to the left of the display screen up to the picture element 24. Then a row line driver 1 selects a row line 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an (active matrix) liquid crystal display device, and more particularly to its electrical internal structure.

[0002]

2. Description of the Related Art As shown in FIG. 3, a conventional active matrix liquid crystal display device has an internal electrical structure in which column lines are divided into odd columns and even columns and arranged in a comb-like shape from the upper and lower sides in response to higher density. Then, it is general that the upper row line driver 102 and the lower row line driver 103 sequentially write the display data from pixels in the same direction with respect to the horizontal direction of the display screen.

That is, after the row line 201 of G1 is selected by the row line driver 101, the display data is transmitted from the pixel transistor 107 to the pixel electrode 501 via the sampling transistor 104 of the XU1 output column line 301 by the upper column line driver 102. And is written in the pixel 113 including the pixel capacitor 502.

At this time, the lower column line driver 103 simultaneously writes the display data of the second column into the pixel 114 from the pixel transistor 108 via the sampling transistor 105 of the XL1 output column line 302.

Further, the upper column line driver 102 writes the display data of the third column into the pixel 115 from the pixel transistor 109 via the sampling transistor 106 of the XU2 output column line 303.

After repeating the above to the XUn.XLn columns, the row line 202 is selected by the G2 output of the row line driver 101, and the XU1 output column line 30 is selected by the upper column line driver 102 in the same manner as the row line 201.
Display data is written from the pixel transistor 110 to the pixel 116 including the pixel electrode 501 and the pixel capacitor 502 via the sampling transistor 104 of 1.

At this time, X is driven by the lower row driver 103.
Sampling transistor 1 of L1 output column line 302
The display data of the second column is simultaneously written to the pixel 117 from the pixel transistor 111 via 05.

Further, the upper row driver 103 causes X
U2 output line 303 sampling transistor 10
The display data of the third column is transferred to the pixel transistor 1 via
12 is written in the pixel 118.

Thereafter, the output G of the row line driver 101
The same operation is repeated from the row line 203 selected in 3 to the Gn output row line 204 to complete one screen.

That is, the upper row line driver 102
And the data transfer direction of the lower row line driver 103 is
It was always written in the same direction from left to right on the display screen. LC / COM is common.

[0011]

However, in the above-mentioned prior art, since the image data writing timing condition within the row line (gate line) selection time is different between the left and right of the display screen, shading in the left and right direction of the display screen is prevented. occured.

Further, in parallel multi-block driving accompanying the high density of the display device, deterioration of image quality such as a noticeable joint between blocks becomes a problem.

Therefore, the present invention solves such a problem. Even in parallel multi-block driving corresponding to the increase in size and density of liquid crystal display devices, seams between blocks, horizontal shading, and illuminance unevenness. It is an object of the present invention to provide a liquid crystal display device capable of preventing image quality deterioration such as the above.

[0014]

In order to achieve the above object, the present invention provides a display screen having a plurality of pixels arranged horizontally and vertically and a row line drive arranged in parallel in the horizontal direction of the display screen. Lines, column line driving lines arranged in the vertical direction of the display screen so as to form a matrix structure with the row line driving lines, and a column line driver for writing image data from the column line driving lines to the pixels. And a row line driver for turning on / off each of the pixels from the row line drive line, the column line driver includes one or more pairs of line drivers for odd columns and even columns, The column line drivers for the odd-numbered column and the even-numbered column have the data transfer directions opposite to each other and are opposite to each other in the horizontal direction of the display screen. Wherein the more the pixel performs data writing.

[0015]

According to the present invention, the column line drivers forming a pair perform data writing from pixels whose data transfer directions are opposite to each other and which are in opposite directions in the horizontal direction of the display screen.

[0016]

Embodiments of the present invention will now be described in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is an electrical internal configuration diagram of a liquid crystal display device having a drive function built into a display panel substrate according to an embodiment of the present invention.

The configuration and operation will be described in detail below with reference to FIG.

First, the row line driver 1 selects the row line 4 of G1 according to the row shift clock (CLY).

Subsequently, the upper row shift clock (CLXu)
As a result, the upper right shift register 2 turns on the sampling transistor 8 of the column line 13 of the XU1 output, and the upper data (DATA · U) passes through the pixel transistor 18 and is formed by the pixel electrode 501 and the pixel capacitor 502 at the upper left of the display screen. It is written in the pixel 23.

At the same time, the lower row shift clock (C
Lx1) causes the lower left shift register 3 to turn on the sampling transistor 12 of the column line 17 of the XL1 output.
Then, the lower data (DATA · L) is written to the pixel 27 on the upper right of the display screen, which includes the pixel electrode 501 and the pixel capacitor 502, via the pixel transistor 22.

After that, the upper row shift clock (CLX
u), the upper right shift register 2 turns on the sampling transistor 9 of the column line 15 of the XU2 output, and the upper data (DATA · U) changes to the pixel transistor 2
It is written in the pixel 25 including the pixel electrode 501 and the pixel capacitor 502 via 0.

As described above, the upper data (DATA.U) is from left to right of the display screen up to the pixel 26 via the sampling transistor 10 and the pixel transistor 21 of the XUn output column line 16, and the lower data (DATA.L). From the right to the left of the display screen, the same writing operation is repeated from the sampling transistor 11 of the XLn output column line 14 to the pixel 24 via the pixel transistor 19.

After that, the row line driver 1 selects the row line 5 of G2 by the row shift clock (CLY).

Subsequently, the upper row shift clock (CLXu)
As a result, the upper right shift register 2 turns on the sampling transistor 8 of the column line 13 of the XU1 output, and the upper data (DATA · U) is written to the pixel 30 including the pixel electrode 501 and the pixel capacitor 502 via the pixel transistor 28. Be done.

At the same time, the lower row shift clock (CLX
1), the lower-stage left shift register 3 turns on the sampling transistor 12 of the column line 17 of the XL1 output, and the lower-stage data (DATA / L) becomes the pixel transistor 2
Data is written in the pixel 33 composed of the pixel electrode 501 and the pixel capacitor 502 via 9.

As described above, the upper data (DATA / U) is XU
The writing operation is repeated from the left to the right of the display screen up to the pixel 32 on the output column line 16 of n, and the lower data (DATA.L) is written from the right to the left of the display screen up to the pixel 31 on the output column line 14 of XLn.

Further, the row line driver 1 selects the row line 6 of G3 by the row shift clock (CLY) and performs a series of write operations up to the row line 7 of Gn output similarly to the row lines 4 and 5. The screen is completed.

(Embodiment 2) FIG. 2 shows another embodiment in which the liquid crystal display device of the present invention is realized by forming a parallel multistage block.

First, the row line driver 1 selects the row line 67 of G1 according to the row shift clock (CLY).

Subsequently, the upper row shift clock (CLXu)
The upper first right shift register 51 turns on the sampling transistor 55 of the column line 71 of 1XU1 output.
Then, the upper first data (DAYA · 1U) is written to the pixel 83 at the upper left of the display screen through the pixel transistor. (Pixel electrodes, pixel capacitances, and pixel transistor numbers are omitted for simplification of the drawing.) At the same time, the lower-stage column shift clock (CLX1) causes the lower-stage first left shift register 53 to output 1XL1 sampling transistors on the column line 76. When 63 is turned on, one data (DATA.multidot.1L) is written to the pixel 88 on the upper part of the display screen through the pixel transistor in the lower stage.

Further, at this time, the upper second right shift register 52 turns on the sampling transistor 58 of the column line 77 of 2XU1 output, and the upper second data (DATA).
2U) is simultaneously written to the pixel 89 on the display screen through the pixel transistor.

Furthermore, the lower left second shift register 5
4 turns on the sampling transistor 66 of the 2XL1 output column line 82, and the lower second data (DATA
2L) is simultaneously written to the pixel 94 at the upper right of the display screen via the pixel transistor.

After that, the upper row shift clock (CLX
u) causes the upper first right shift register 51 to move to 1XU2
The sampling transistor 56 of the output column line 73 is turned on, and the upper first data (DATA · 1U) is written to the pixel 85 via the pixel transistor.

At the same time, the lower row shift clock (C
LXl) causes the lower left first shift register 53 to be 1X.
L2 output column line 74 sampling transistor 6
2 is turned on, and the lower first data (DATA • 1L) is written to the pixel 86 via the pixel transistor.

Further, at this time, the upper second right shift register 52 turns on the sampling transistor 59 of the column line 79 of 2XU2 output, and the upper second data (DATA).
2U) is simultaneously written to the pixel 91 via the pixel transistor.

Further, the lower second left shift register 5
4 turns on the sampling transistor 65 of the column line 80 of 2XL2 output, and the second data (DATA
2L) is simultaneously written in the pixel 92 via the pixel transistor.

Above, the first data in the upper row (DATA-1U)
And the upper second data (DATA.2U) are the lower first data (DATA.1L) and the lower second data (DATA.U) from the left to the right of each block on the display screen.
2L) sequentially performs writing operation from right to left of each block on the display screen.

After that, the row line driver 1 selects the row line 68 of G2 by the row shift clock (CLY) and performs a series of write operations in the same manner as the row line 67, G3.
The writing operation is repeated until the Gn output row line 70 passes through the row line 69 of FIG.

In the above description, the column line group of the upper first shift register and the column line group of the lower first shift register form a pair, and the column line group of the upper second shift register and the lower second shift register form a pair. It is additionally noted that the column line groups of are paired as one block.

Further, in the first and second embodiments, the pair of column line drivers (composed of shift registers and sampling transistors) are arranged above and below the display area of the display device for the sake of clarity. It is needless to say that the same operation can be obtained by arranging one of the upper portion and the lower portion in a two-row configuration so as to overlap each other.

Furthermore, it should be noted that this structure can be realized in an active matrix liquid crystal display device using any process such as polysilicon, amorphous silicon, single crystal silicon, etc. if the electric transmission performance is satisfied. deep.

[0043]

As described above, according to the present invention, one or more pairs of column line drivers are provided for odd columns and even columns, and the column line drivers forming a pair have opposite data transfer directions. However, by writing data from pixels in opposite directions in the horizontal direction of the display screen, the image data writing timing within the gate opening time of the pixel transistor is averaged left and right, thus increasing the size and density of the display device. This has a great effect on prevention of deterioration of display screen uniformity in parallel (multi-block) driving which accompanies the increase in number, particularly prevention of unnaturalness of joints between blocks.

Further, it is effective for improving the image quality of a large-screen high-density liquid crystal display device, such as preventing horizontal shading in one horizontal line inversion drive or field inversion drive and reducing flicker that can occur in all inversion drive systems.

Furthermore, when the present liquid crystal display device is used as a light valve of a magnified projection type display, a greater effect can be obtained in terms of image quality improvement.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of the present invention.

FIG. 2 is a schematic configuration diagram showing another embodiment realized by parallelizing (multi-block) driving the present invention.

FIG. 3 is a schematic configuration diagram showing a conventional example.

[Explanation of symbols]

 1 row line driver 2 upper right shift register 3 lower left shift register 4 to 7 row line 8 to 12 sampling transistor 13 to 17 column line 18 to 22, 28, 29 pixel transistor 23 to 27, 30 to 33 pixel 501 pixel electrode 502 Pixel capacity

Claims (1)

[Claims] 1. A display screen having a plurality of pixels arranged horizontally and vertically, row line drive lines arranged in parallel in the horizontal direction of the display screen, and a matrix structure with the row line drive lines. As described above, the column line drive lines arranged in the vertical direction of the display screen, the column line driver for writing image data to the respective pixels from the column line drive line, and the respective pixel from the row line drive line are turned on. In a liquid crystal display device having a row line driver to be turned off, the column line driver includes one or more pairs of line drivers for odd columns and even columns, and the column line drivers for odd columns and even columns are data. It is characterized in that the transfer directions are opposite to each other and data is written from pixels in opposite directions in the horizontal direction of the display screen. Liquid crystal display device.