JP2003280036A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve problems of a bend-aligned liquid crystal display device that a proximity part between pixels provided as a transition nucleus for facilitating spray bend alignment transition has an adverse effect on display as parasitic capacitance between the pixels. <P>SOLUTION: For (n+1)/n-time speed driving (n: an integer of ≥2) for black insertion, lateral stripe unevenness generated for every (n) gate lines is reduced by removing proximity parts between pixels corresponding to the final stage of each group of gate lines divided into (n) groups and the initial stage of the next group. For all pixels, a pixel electrode for display and an electrode for proximity part formation are electrically disconnected by, for example, a TFT switching element irrelevantly to a driving method to make proximity parts operate as transition nuclei in spray bend alignment transition and eliminates parasitic capacitance between pixels in display operation, thereby solving display problems such as various display unevenness, etc., due to the parasitic capacitance between the pixels. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a bend-oriented OCB (Optically Self-Compen) having a high-speed response characteristic and a wide viewing angle characteristic.
The present invention relates to a liquid crystal display device using a saturated birefringence liquid crystal mode.

[0002]

2. Description of the Related Art Thin film transistors (TFT: Thin-
The active matrix type liquid crystal display using a film-transistor is used in various fields such as a display for a camcorder, a display for a personal computer, a personal word processor, etc. due to its advantages such as thinness, light weight and low voltage drive. Forming a market.

In recent years, in particular, in addition to the conventional still image display on a personal computer or the like, the use for moving image display and TV application is spreading, and the demand for a liquid crystal display device suitable for such moving image display is increasing. . In response to this, an OCB liquid crystal display element with bend alignment is proposed as a liquid crystal element for improving high-speed response performance in Japanese Patent Application Laid-Open No. 7-84254. This OCB liquid crystal display element has a faster change of liquid crystal with respect to the voltage than in the conventional TN mode, and can realize a high-speed response suitable for displaying moving images and TV. Further, in this bend alignment type liquid crystal display element, since the liquid crystal molecules are bend aligned between the upper and lower substrates, the optical retardation can be self-compensated, and the film retarder compensates for the retardation. Are better.

However, the OCB liquid crystal element is initially shown in FIG.
The splay alignment as shown in FIG. 7 (a) is in an alignment state not suitable for display, and in order to perform a display operation, this should be uniformly transferred to a bend alignment state as shown in FIG. 17 (b). I need to put it. 17 (a), (b)
FIG. 3 is a cross-sectional view of an OCB liquid crystal element, showing an alignment state of liquid crystal molecules 13 in a liquid crystal layer 12 sandwiched between substrates 10 and 11. The transition to the bend alignment state can be realized by applying a voltage higher than that for driving the display to the liquid crystal, in which a splay alignment to bend alignment nucleus is first generated in a part of the substrate. , It spreads over the entire liquid crystal layer and the entire substrate undergoes a bend orientation transition. There are various places where the transition nuclei are generated, such as non-uniform places in the substrate, such as around dispersed spacers and uneven alignment, and the reproducibility is insufficient. It may become uniform and display defects may remain. It is known that a method of locally applying a high electric field to a liquid crystal is effective for generating a transition nucleus with good reproducibility.

As a concrete method for applying a local electric field to the liquid crystal, it is effective to bring some adjacent pixel electrodes close to each other and apply a voltage therebetween. FIG. 18 shows an example of a pixel configuration of a liquid crystal display device using this configuration. Figure 1
FIG. 8A is a plan view showing an electrode configuration of a pixel, FIG.
18A is a cross-sectional view taken along the line AB of FIG.
18C shows an equivalent circuit of the pixel configuration of FIG. This liquid crystal display device has X2,
Gate lines 14 such as X3, X4, and X5, and Ym and Ym +
1, source lines 15 such as Ym + 2 (m is an arbitrary integer) are arranged in a matrix, and TFTs 16 which are switching elements and pixel electrodes 17-3 and 17 correspond to their intersections.
-4, 17-5, etc. are formed. Then, a part of the pixel electrodes adjacent to each other in the source line direction (vertical direction in FIG. 18A) is brought close to each other to facilitate generation of a strong electric field. This inter-pixel proximity portion also causes the inter-pixel capacitance such as Cpp3-4 and Cpp4-5. A liquid crystal display device is formed by sandwiching a liquid crystal layer (not shown) between a substrate 10 having such a matrix array and a counter substrate (not shown) having counter electrodes formed thereon. The reference potential Vcom is applied to the counter electrode, and the potential difference between the image voltage supplied from the source line 15 via the switching element 16 and the reference potential Vcom is the liquid crystal layer (displayed by the capacitance Clc in FIG. 18C). Is applied to the liquid crystal layer to modulate the optical characteristics of the liquid crystal layer and display an image.

In order to avoid complication of the drawing, the switching element 16 is illustrated in a simplified manner in FIG. The specific structure is as shown in FIG.
The gate electrode 14a, the gate insulating layer 21, the amorphous silicon semiconductor layer 22, the source electrode 15a, and the drain electrode 19 are included. The drain electrode 19 and the pixel electrode 17-4 are connected via a contact hole 18 formed in the flattening layer 23. Prior to the display, a voltage of several volts to several tens of volts is applied between the adjacent pixel electrodes 17-4 and 17-5 to create a strong electric field in the liquid crystal layer to generate transition nuclei, which causes splay alignment. Transition to bend orientation.

Unlike impulse type display elements such as CRTs, liquid crystal display elements are hold type display elements. In this case, in order to display a moving image more accurately, a black display period is inserted every frame period. Is effective.
As a method, there is a method of blinking the backlight for each frame, but it is difficult to adjust the blinking timing, so it is usually realized by supplying a non-image signal (a signal that displays black) to pixels for each frame. ing. The liquid crystal display element has N gate lines and one frame period is T
Then, the time (horizontal scanning period H) given to the selection of one gate line is normally H = T / N, but in order to insert the black display signal, each gate line is within one frame. Therefore, the time required for each selection is half (1/2) · T / N. Further, along with this, it is necessary to subject the image signal supplied to the source line to a so-called double speed conversion in which the drive frequency is doubled. FIG. 19 shows a waveform example of the source line signal and the gate line signal in this case. FIG. 19 shows the situation of double-speed driving by taking the case of 12 gate lines as an example. The input image signals S1, S2, ..., S12 are sent at the timing of H = T / 12, and are double-speed converted to be supplied to each source line as a source line signal including a black signal. The polarity of the source line signal is inverted line by line and frame by frame with respect to the reference potential Vcom, and the shaded portion in FIG. 19 becomes a black signal. Gate lines X1, X2, ...
., X12 is a gate line signal (gate line selection pulse) G
, G2, ..., G12 are respectively supplied. For example, the gate line signal G3 is applied to the gate line X3, the source line signal is selected for the period of H / 2 at the timing of S3, and S3 is charged in the pixel electrode connected to the gate line. After that, the source signal of the gate line X3 is selected again for the period of H / 2 at the next timing S8, and the black signal is charged in the pixel electrode. In this way, the image signal and the black signal are both supplied to each pixel during one frame, and the black display period is inserted. However, as described above, with this drive waveform, there is a problem that it is difficult to secure the accuracy of charging by the TFT because the time for charging the pixel is reduced to 1/2. This problem becomes more severe as the number N of gate lines increases due to the demand for higher definition.

In order to reduce this problem, n (n is 2)
There is a means of simultaneously writing a black display signal to the gate lines of the above integers. In this case, the time given to select the gate line once is (n / (n + 1)) T /
The driving frequency of the image signal becomes (n + 1) / n times. For example, in the case of n = 4, the time given for selecting the gate line once is 0.8 · T / N and the driving frequency is 5 / T.
4 = 1.25 times, considerably reducing the burden. FIG. 20 shows an example of a specific drive waveform when n = 4. The number of gate lines is 12 as in the case of FIG. In this method, one frame period T is 12 · (5/4)
Driving is divided into 15 sections. The source line signal is obtained by frequency-converting the input image signal by 1.25 times and inserting a black signal once in four sections. The polarity of the source line signal is inverted every 4 + 1 intervals and every frame. The + or-symbol attached to the gate line signal pulse indicates the polarity of the source signal written at that timing, and the portion labeled B indicates that a black signal is written. To explain the operation,
For example, after the source line signals S1, S2, S3, and S4 are sequentially written to the pixels connected to the gate lines X1, X2, X3, and X4, the pixels connected to the gate lines X9, X10, X11, and X12 are simultaneously blacked. The signal is written, then
After the source line signals S5, S6, S7 and S8 are sequentially written to the pixels connected to the gate lines X5, X6, X7 and X8, black signals are simultaneously applied to the pixels connected to the gate lines X1, X2, X3 and X4. Are driven so that they are written. In this example, the case where the number of gate lines is 12 is extremely small is taken up. Therefore, although the ratio of the period during which the image signal is displayed and the period during which the black signal is displayed is largely different for each gate line, the actual liquid crystal display With respect to the device, since the number of gate lines is at least about 500 in a 10-inch or more type used for a liquid crystal television or a monitor, the ratio is almost constant for any gate line. Further, when the screen size is small and the number of scanning lines is about 100 to 200, n can be reduced (for example, n = 2) to bring the above ratio close to a constant value for each gate line.

[0009]

However, (n +
In 1) / n times speed driving, groups of pixels connected to consecutive n gate lines are sequentially charged with signals of the same polarity, and then groups of pixels connected to the next n gate lines are reversed. Since charging is performed with a signal having a polarity, the influence of the charging voltage of the next-stage pixel via the capacitance between pixels (for example, Cpp3-4 of FIG. 18C) is the same condition for all pixels. No longer. That is, regarding the pixels connected to the gate lines other than the last stage of the first group, the charges of the next stage pixels have the same polarity, but only the pixels connected to the last stage gate line of the first group are It will be affected by the reverse polarity charging of the next stage pixel. As a result, the effective voltage of the pixel in the last stage of each group is different from that of the pixels in the other stages, and one horizontal stripe unevenness may occur for every n gate lines. Hereinafter, a specific description will be given with reference to FIG.

FIG. 21 shows drive waveforms G1, G2, ..., G6 for the first six gate lines under the same conditions (12 gate lines, n = 4) as shown in FIG. 6 shows charging voltage waveforms P1, P2, ..., P6 of the pixels 1, 2, ..., 6 along the source line. For example, focusing on the charging voltage waveform P1 of the pixel 1,
At timing t0, the pixel 1 is charged with the positive source line signal S1, and at timing t1, the pixel 1 of the pixel 1 is affected by the charging voltage waveform P2 of the pixel 2 at the next stage, as indicated by the circle A. The voltage increases somewhat more in the positive direction. This waveform change is caused by the timing shift of P2,
The same is true for P3, but the situation is different for P4. That is, the pixel 4 is charged with a positive polarity signal at the timing t3, but thereafter, at the timing t5, the next-stage pixel 5 is affected by being charged in the opposite polarity as shown by the charging voltage waveform P5, and the circle B is affected. Pixel 4 as shown
The voltage at the point will drop slightly. Pixels 5-7 have charging voltage waveform P
5 and P6, the polarities are different, but the behaviors as the charging voltage waveforms P1 to P3 are the same as the effective voltage. Although not shown, the pixel 8 behaves in the same manner as the pixel 4 as the effective voltage, though the polarity is opposite. Therefore,
Only one pixel for every four gate lines, such as the pixels 4 and 8, has a lower effective voltage than the other pixels, which causes uneven horizontal streaks.

Also, when other driving methods are applied, display quality may be deteriorated due to interference caused by coupling capacitance (parasitic capacitance) between pixels.

[0012]

In order to achieve the above object, the liquid crystal display device of the present invention has the following constitution.

That is, in the liquid crystal display device according to the present invention, of the two substrates facing each other with the liquid crystal layer interposed therebetween, a plurality of gate lines and pixel signals to which scanning signals are supplied are provided on the facing surface side of one substrate. A plurality of source lines, a first switching element provided corresponding to each intersection of the gate line and the source line, a pixel electrode connected to the first switching element, and formed on the other substrate. A liquid crystal display device including at least a counter electrode, wherein the present liquid crystal display device is configured such that each gate line is selected a plurality of times within one frame period in order to write an image signal and a black signal to each pixel electrode. Driving display is performed such that n gate lines (n is an integer of 2 or more) are simultaneously selected and written, and the pixel electrodes have a proximity portion in which some of the pixel electrodes are close to each other, and At the connection of the pixel electrode 1 for each n the present in accordance with that gate line
The feature is that the adjacent portions are removed at a rate of one.

Thus, it is possible to solve the problem that the proximity portion between pixels provided as a transition nucleus for facilitating the transition from the splay alignment to the bend alignment adversely affects the display as a parasitic capacitance between the pixels.

In another liquid crystal display device of the present invention, the inter-pixel proximity portion can be electrically disconnected and controlled by, for example, a TFT or the like. Therefore, in the spray-bend alignment transition, the inter-pixel proximity portion is transferred by connecting. Work as a nucleus,
The display operation is characterized in that the adjacent portions between pixels are separated so that there is no parasitic capacitance between adjacent pixels.

Also in this liquid crystal display device, the problem that the proximity portion between pixels, which is provided as a transition nucleus for facilitating the transition from the splay alignment to the bend alignment, adversely affects the display as a parasitic capacitance between the pixels is solved. it can. This liquid crystal display device can solve not only the display problems associated with the driving method of simultaneously selecting a plurality of gate lines and writing a black signal, but also the display problems caused by the inter-pixel capacitance in other driving methods.

In still another liquid crystal display device of the present invention, of two substrates facing each other with a liquid crystal layer interposed therebetween, a plurality of gate lines and pixels to which scanning signals are supplied are provided on the facing surface side of one substrate. A plurality of source lines to which signals are supplied, a first switching element provided corresponding to each intersection of a gate line and a source line, a pixel electrode connected to the first switching element, and formed on the other substrate A liquid crystal display device including at least a counter electrode, wherein each gate line is selected a plurality of times within one frame period in order to write an image signal and a black signal to each pixel electrode. Is driven and displayed so that n gate lines (n is an integer of 2 or more) are simultaneously selected and written, and the pixel electrodes have a proximity portion in which some of the pixel electrodes are close to each other, And at the connection of the pixel electrode 1 for each n the present in accordance with that gate line
It is characterized in that the adjacent portions can be electrically disconnected and controlled by, for example, a TFT or the like at a ratio of one.

Also in this liquid crystal display device, there is a problem that the proximity portion between the pixels provided as a transition nucleus for facilitating the transition from the splay alignment to the bend alignment adversely affects the display as a parasitic capacitance between the pixels. It can be resolved. Also,
Since it does not reduce the number of transfer nuclei, it is also characterized by higher certainty during transfer.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION The liquid crystal display device of the present invention will be described below more specifically with reference to the drawings. However, in the following description of the drawings, the same parts as those used in the above-mentioned conventional example will not be duplicated and will be described with the same reference numerals.

(First Embodiment) FIG. 1 is a plan view showing a pixel electrode structure on an array substrate in a liquid crystal display device according to a first embodiment. Gate line 14, source line 15, TFT1
6, specific configurations of the pixel electrode 17 and the like are the same as those in FIG. 18 described in the related art. In driving, the gate lines X1, X2, X3, X4, ... Are connected to the gate line signals G1, G2, G3 shown in FIG.
.. are respectively applied. That is, it is assumed that (n + 1) / n times speed driving is performed when n = 4. In FIG. 1, the pixel electrode controlled by the gate line Xg and the source line Ym is indicated as Pg, m. For example, the pixel electrode controlled by the gate line X4 and the source line Ym + 1 is P4.
It is displayed as m + 1. The first embodiment is characterized in that the proximity portion between the pixel electrodes P4, m and the pixel electrodes P5, m is removed as shown in FIG. This allows
Since there is no inter-pixel capacitance corresponding to Cpp4-5 in FIG. 18C, the voltage change indicated by the circle B in the pixel voltage P4 in FIG. 21 (the change in the pixel voltage P5 via the inter-pixel capacitance Cpp4-5 Cause) will not occur.
As a result, the difference between the effective voltage of P1 to P3 and the effective voltage of P4 is reduced, and the lateral streak unevenness is reduced. This proximity portion was introduced as a transition nucleus for transferring the splay alignment to the bend alignment.
There is no problem with the operation of the splay-bend orientation transition even if one proximity portion is eliminated per book.

As shown in FIG. 1, the adjacent portion between adjacent pixel electrodes is formed by a plurality of sides having different angles. This is because the transition can be made easier by generating electric fields in various directions in the proximity. In FIG. 1, the sides are different from each other by 90 degrees, but the present invention is not limited to this, and sides having arbitrary oblique angles may be combined.

In the above example, n = 4 was used to explain the concept in an easy-to-understand manner, but in general, the inter-pixel capacitance between the last stage of the n groups of gate lines and the first stage of the next n groups is set. It goes without saying that the same effect can be obtained by reducing

FIG. 2 shows another example of the first embodiment. FIG. 2A is a plan view showing the pixel configuration, and FIG. 2B is a sectional view of a path taken along the line AB. The equivalent circuit is shown in FIG. 3 together with the gate line drive circuit 40 and the source line drive circuit 41. In this example, a storage capacitor line 20 is added to the configuration of FIG. As a result, the storage capacitor Cst is added to each pixel electrode. In order to efficiently form the storage capacitor, the thin gate insulating layer 21 is used instead of the thick flattening layer 23.
For example, as shown in FIG. 2B, the storage capacitors of the pixels P3 and m have a layer (storage capacitor forming electrode) 30 at the same level as the source line and a layer (storage capacitor line) at the same level as the gate line.
It is formed between 20 and. The pixel electrode 17 and the layer 30 are connected via a contact hole 32. And
The feature of the first embodiment is that the proximity portion between the pixel P4, m and the pixel P5, m is removed, as in FIG.
As a result, the inter-pixel capacitance Cpp4-5 can be ignored, and the horizontal streak unevenness is reduced for the same reason as described above.

In the first embodiment, since the storage capacitance line 20 is arranged below the adjacent portion between the adjacent pixels, by applying a voltage between the storage capacitance line 20 and the pixel electrode 17, the voltage between the adjacent pixels is increased. It is easy to create an electric field in the vertical direction (direction perpendicular to the substrate) in the proximity portion. As a result, the splay alignment can be more reliably transferred to the bend alignment.

Further, in order to perform a high contrast display with the configuration of FIG. 1, it is necessary to cover the gaps between pixels with a black matrix or the like to block light leakage from there. This is because the aperture ratio is reduced and the display becomes dark. In the first embodiment, the storage capacitance line 20 is arranged below the proximity portion between adjacent pixels. Due to this light-shielding effect, there is a feature that display with high contrast can be performed without lowering the aperture ratio.

In the first embodiment, the example in which the inter-pixel proximity portion is overlapped with the storage capacitance line 20 is shown, but instead of this, the same effect can be obtained by overlapping with the gate line 14 or the source line 15. It goes without saying that it will be done.

(Embodiment 2) In the method of Embodiment 1, the effective voltage difference between pixels can be reduced without removing all the capacitance between adjacent pixels. In the second embodiment, the horizontal streak unevenness can be surely eliminated by eliminating all the capacitances between the adjacent pixels and fundamentally eliminating the difference in the effective voltage during the display operation.

FIG. 4A is a plan view showing a part of the array structure of the liquid crystal display device according to the second embodiment. Figure 4
4B is a cross-sectional view taken along the line AB in FIG. 4A, and FIG. 4C is an equivalent circuit. Also in the second embodiment, (n + 1) / n double speed driving is performed and n = 4 is taken as an example, and the storage capacitor Cst is formed using the storage capacitor line 20 as in FIG. The difference from the first embodiment is that not only the inter-pixel proximity part is removed only in the final stage of the n gate line groups, but all the inter-pixel proximity parts are used as transition nuclei when performing the spray-bend alignment transition. At times, it is necessary to electrically insulate and isolate all the proximity portions between pixels. In order to electrically insulate and isolate the proximity between all pixels during the display operation, the second switching element (second TF) is provided in all pixels.
It is characterized by the introduction of T) 31.

For example, each of the pixels P4 and m is composed of a pixel electrode 17-4 for display and an electrode 17-4a for forming an inter-pixel proximity portion. As shown in FIG. 4B, 17-4 is a contact hole. 17 through 4 through the contact hole 3
3 is connected to the source electrode 35 and the drain electrode 36 of the second TFT 31, respectively. Second TFT
The gate electrode controlling 31 is the storage capacitance line 20, and the storage capacitance line 20 is used when the splay-bend orientation transition is performed.
Of the pixel electrode 17-4 for display and the electrode 17-4 for forming the inter-pixel proximity portion by making the second TFT 31 conductive.
Connect to a. As a result, a high electric field can be generated in the vicinity of the pixels, resulting in an efficient transition nucleus. In the case of display operation, the storage capacitor line 20 has a low voltage (Vst).
Therefore, the second TFT 31 is turned off and the display pixel electrode 17-4 and the inter-pixel proximity portion forming electrode 17-4a are electrically separated. as a result,
Since the inter-pixel capacitance caused by the inter-pixel proximity portion can be almost removed during the display operation, the voltage change as shown by circles A and B in FIG. 21 can be almost eliminated, and the horizontal streak unevenness can be eliminated. . In addition, no new process for introducing the second switching element 31 is required,
Applying the conventional TFT array formation process as it is,
It can be handled only by changing the mask design.

FIG. 5 shows another example of the second embodiment, FIG. 5 (a) is a plan view showing a part of the array structure, and FIG. 5 (b) is a plan view of FIG. 5 (a). A cross-sectional view taken along the line AB, FIG. 5C shows an equivalent circuit. Also in the second embodiment, (n + 1) / n double speed driving is performed and n =
4 is taken as an example, and the storage capacitance Cst is formed by using the storage capacitance line 20 as in the case of FIG. In FIG. 4, the second switching element (second TF
Although the storage capacitor line 20 is used as the control gate electrode of T) 31, the second embodiment shown in FIG. 5 is different in that the gate line 14 is used as the control gate electrode.

For example, the pixel electrodes P3 and m are composed of a display pixel electrode 17-3 and an inter-pixel proximity portion forming electrode 17-3a. As shown in FIG. 5B, 17-3 is a contact hole 34. 17-3a through the contact hole 3
The drain electrode 36 and the source electrode 35 of the second TFT 31 are connected to the second TFT 31 through the third electrode 3, respectively. When the splay-bend alignment transition is performed, a high voltage is applied to the gate line 14 to bring the second TFT 31 into a conductive state, whereby the pixel electrode 17-3 for display and the electrode 17-3a for forming the inter-pixel proximity portion are formed. Connect. As a result, a high electric field can be generated in the vicinity of the pixels, resulting in an efficient transition nucleus. In the display operation, since the gate line 14 is kept at a low voltage except for a short selection period, the display pixel electrode 17-3 and the inter-pixel adjacent portion forming electrode 17-3a are electrically separated. Has been. For example, after the gate line X3 is selected and the image signal is charged in the pixel electrodes P3, m, the potential of the gate line X3 becomes low level, and the second TFT 31 controlled by this is kept in the cutoff state. So
The inter-pixel proximity portion forming electrode 17-3a is the display pixel electrode 1
7-3 is in an electrically separated state. Therefore,
The next gate line X4 is selected and the pixel electrodes P4, m
Even if a reverse polarity voltage is supplied to the pixels P3 and m, it does not affect the pixels P3 and m. Therefore, it is possible to almost eliminate the voltage changes as indicated by circles A and B in FIG. Can be resolved. In the configuration of FIG. 5 also, no new process for introducing the second switching element 31 is required, and the conventional TFT array forming process can be applied as it is and only the mask design needs to be changed.

Here, the driving method is (n + 1) /
Although the usefulness of the present invention has been described as being driven at n times speed,
The pixel structure of the second embodiment is effective in preventing deterioration of display quality due to parasitic capacitance between pixels regardless of the driving method. Even if the black data is not collectively written to the n line (for example, the drive waveform in FIG. 19) or the normal drive is performed without black writing itself, depending on the display pattern, it may be caused by the interference between pixels. Although image quality deterioration such as crosstalk may occur, the deterioration can be suppressed by applying the present invention.

For example, in dot inversion driving in which a signal voltage having a polarity as shown in FIG. 6 is applied to each pixel, a case where a neighboring portion is formed between vertically adjacent pixels and a coupling capacitance (parasitic capacitance) exists Think FIG. 7 shows the voltage of each part. As indicated by a circled portion C in FIG. 7, a pixel to which a positive voltage has been written is superimposed with a negative coupling voltage from a pixel below the positive voltage, and similarly a negative voltage is written as shown in a portion D. A positive coupling voltage is superposed on the selected pixel from the pixel below. Since a voltage having a polarity opposite to that of the write signal is superimposed, a voltage loss occurs, resulting in a lack of contrast and brightness, and a need for using a driving driver with a higher output voltage, resulting in an increase in manufacturing cost. Further, since the amount of the combined voltage varies depending on the voltage charged to the pixel below by one, even if the upper and lower pixels are charged to the same polarity, display unevenness may occur.

As in the second embodiment, if the adjacent portion is constructed so as to be electrically disconnected and a drive signal is given so as to eliminate the coupling capacitance (parasitic capacitance) between adjacent pixels at the time of display, these problems will occur. Can be reduced or eliminated.

Here, the unique advantages of the configurations of FIGS. 4 and 5, that is, the difference of the connection destination of the second switching element 31 will be described. First, referring to FIG. 5, here, the gate line 14 is used as a control electrode of the second switching element (second TFT) 31. The gate line 14 is used for opening and closing the first switching element (TFT) 16 used for charging the pixel, and is supplied with a potential for turning off the switching element during the off period without applying a special potential. That is, there is an advantage that no special device for turning off the second TFT 31 is required, and the cost is not increased and the driving circuit is not complicated. Further, since the field-to-pixel proximity portion forming electrodes such as 17-3a are also charged every field, the display is not disturbed by static electricity generated in the pixel-to-pixel proximity portion forming electrodes.

On the other hand, as a demerit, there is a difference in pixel potential variation characteristic between forward scanning and reverse scanning. In the case of forward scanning, as described above, after the scanning of the gate line X3 in FIG. 5A is completed and the inter-pixel proximity portion forming electrode 17-3a is electrically disconnected, the gate line X4 is formed.
Is scanned to charge the display pixel electrode 17-4, so that the potential of the display pixel electrode 17-3 is not affected. In the case of the reverse operation, the gate line X4 is scanned to charge the display pixel electrode 17-4, and then the gate line X3 is scanned. At this time, the inter-pixel proximity portion forming electrode 17-3a is also charged, and the potential of the display pixel electrode 17-4 changes.

As shown in FIG. 4, the storage capacitor line 2 is used as a control electrode of the second switching element (second TFT) 31.
When 0 is used, since the inter-pixel proximity portion forming electrode is always electrically isolated during display, the pixel potential variation characteristics are the same in forward scanning and reverse scanning. Therefore, even when used upside down like a liquid crystal panel for a video camera, there is an advantage that there is no difference in performance during display. Further, the pixel potential does not drop during reverse scanning.

On the other hand, in the configuration of FIG. 4, it is necessary to set the potential of the storage capacitor line 20 to the potential that turns off the second switching element (second TFT) 31. However, if this is in a completely off state, the inter-pixel proximity portion forming electrode will be in a floating state for a long period of time, and the display may be disturbed due to the influence of static electricity or the like. In order to avoid this phenomenon, the potential of the storage capacitor line 20 is changed to periodically turn on the second switching element (second TFT) 31, or the second switching element (second TFT) is turned on. 31
The potential of the storage capacitor line 20 may be set so that the storage capacitor line 20 has a slight conductivity.

In the above description with reference to FIGS. 4 and 5, the proximity portion is on the storage capacitance line 20, but
This may be on the gate line 14 as shown in FIGS. 8 and 9, or may be a portion which does not overlap the wiring as shown in FIGS. 10 and 11. In any case, as in the above description, it is possible to reduce or eliminate display unevenness by eliminating the coupling capacitance (parasitic capacitance) between pixels. In addition,
By selecting the connection destination of the control electrode in the second switching element 31, the same effect as described above can be obtained. That is, the one connected to the storage capacitor line 20 (FIGS. 8 and 10) has the same unique advantage as FIG.
For those connected to the gate line 14 (FIGS. 9 and 11), FIG.
Has the same inherent advantages as.

Next, the unique advantages due to the difference in the positions where the adjacent portions are arranged will be described. The first advantage when there is a proximity portion on the storage capacitance line 20 or the gate line 14 is to enhance the vertical electric field in the liquid crystal by devising the potentials of the storage capacitance line 20 and the gate line 14 during the transfer operation. And can facilitate the transition. The second advantage is that the leakage of light from the storage gap is blocked by the storage capacitance line 20, so that the contrast is high without forming a special black matrix, that is, high contrast and aperture ratio are compatible. It is in.

When the width of the gate wiring is about 15 μm or less, if the proximity portion is formed on the gate line 14, the transfer performance may not be sufficiently obtained due to the limitation of the thickness of the gate wiring. In such a case, it is desirable to form it on the storage capacitance line 20.

When the proximity portion is formed on the gate line 14, the degree of freedom in designing on the storage capacitance wiring is increased, and the storage capacitance line 20 can be used without waste. This allows
It is possible to further improve the aperture ratio or increase the storage capacity to enhance the operational stability of the liquid crystal display device.
Further, if the storage capacitor is formed on the gate line 14, the storage capacitor line 20 can be eliminated, and also in this case, the aperture ratio can be increased.

When importance is attached to at least one of the aperture ratio and the contrast, it is also effective to remove the wiring and form the adjacent portion of the pixel. With this configuration,
As shown in FIGS. 10 and 11, the overlapping portion of the wiring and the pixel has a simple shape (rectangular shape in FIGS. 10 and 11). Therefore, even when misalignment occurs between the wiring layer and the pixel electrode layer in the manufacturing process. The overlapping area of the two, that is, the coupling capacitance does not easily change. Therefore, manufacturing variations are less likely to appear as a difference in display performance, and there is an advantage that the yield is increased.

Further, the method of the second embodiment is also effective when the adjacent portion is formed between the pixels adjacent to each other in the direction along the gate line 14. For example, FIG. 12 and FIG.
As in the case where the proximity portion is formed on the source wiring. In this case, by electrically disconnecting the proximity portion, the direction along the gate line 14 at the time of display (see FIG.
In Nos. 2 and 13, the coupling capacitance (parasitic capacitance) between pixels adjacent in the horizontal direction is eliminated. When this coupling capacitance exists, in the case of dot inversion drive or column inversion drive (column inversion) drive in which pixels adjacent to the left and right are charged to opposite polarities, a coupling voltage in the opposite direction is superimposed from adjacent pixels when writing to the pixel. As a result, voltage loss occurs. Further, regardless of the polarity relationship with the adjacent pixels, the amount of coupling differs depending on the display data of the pixels adjacent to the left and right, so that display unevenness occurs. By electrically disconnecting the inter-pixel proximity portion during display to eliminate the coupling capacitance (parasitic capacitance), the above voltage loss and display unevenness can be reduced or eliminated. Regarding the connection destination of the control electrode in the second switching element 31, this is connected to the storage capacitance line 20.
Connected to (FIG. 12) has the same inherent advantages as those of FIG. 4, and that connected to gate line 14 (FIG. 13) has the same inherent advantages of those of FIG.

In the description of the second embodiment, it has been explained that all the inter-pixel proximity portions are electrically insulated and isolated during the display operation, but for example, dummy pixels outside the display area are directly involved in the display. This is not the case with those that do not exist.

Again, in the second embodiment, the pixel structure described with reference to FIGS. 4, 5, and 8 to 13 is caused by the parasitic capacitance between pixels regardless of the driving method. This is effective in preventing deterioration of display quality. Dot inversion drive, line inversion drive (row inversion drive),
Even when normal driving such as column inversion driving (column inversion driving) and frame inversion driving is performed, image quality deterioration such as crosstalk may occur due to potential interference between pixels depending on the display pattern. By applying the invention, those deteriorations can be suppressed.

(Third Embodiment) FIG. 4 showing the second embodiment.
5 or 8 or 13 and of course, in some cases, as in the first embodiment, the last stage of the group of n gate lines and the first stage of the next group. The second switching element 31 may be provided only in the inter-pixel proximity portion between the two so as to be electrically disconnectable. In the third embodiment, the second switching element 31 such as a TFT is provided in the pixel proximity portion described in the second embodiment.
The structure for electrical insulation is provided only in the inter-pixel proximity portion between the final stage of the group of n gate lines and the initial stage of the next group.

By doing so, it is possible to reduce the horizontal streak unevenness in the driving method of FIG. 20 in which black data is collectively written in n scanning lines, as described in the first embodiment. Further, since there is a proximity portion between all pixels at the time of transition, there is also a feature that the splay-bend alignment transition is more reliable than that of the first embodiment.

In the third embodiment, the control electrode of the second switching element 31 may be connected to the gate line 14 or the storage capacitance line 20. Each unique advantage is the same as that described in the second embodiment. That is, when the control electrode is connected to the gate line 14, no special device for turning off the second TFT 31 is required, which does not increase cost and complicate the driving circuit. Since the field forming electrodes are also charged in each field, there is a feature in that the display is not disturbed by static electricity generated in the inter-pixel adjacent part forming electrodes. On the other hand, when the control electrode is connected to the storage capacitor line 20, there is an advantage that the display characteristics in the forward scanning and the reverse scanning are the same. In order to avoid the influence of static electricity when the control electrode is connected to the storage capacitor line 20, also in the third embodiment, the potential of the storage capacitor line 20 is changed to change the second switching element (second TFT). 31 is periodically turned on, and the second switching element (second TF
The potential of the storage capacitor line 20 may be set so that T) 31 has a slight conductivity. Since the principle is the same as that of the second embodiment, detailed description will be omitted.

Also in the third embodiment, the inter-pixel proximity portion may be overlapped with the storage capacitance line 20, the gate line 14 or the source line 15, or may be constructed so as not to overlap with any of them. it can. The unique effect is the same as that described in the second embodiment.

The main purpose of the first and third embodiments is to reduce display unevenness due to capacitive coupling between pixels in which image data is written at different timings. When the inter-pixel proximity portion is provided on the source line 15,
Pixels adjacent to each other with the source line 15 in between are separated by another gate line 14.
Is especially effective when belonging to. As an example of such a thing, the delta arrangement | sequence of FIG. 14 and the arrangement | sequence shown in FIG. 15 can be mentioned. Each of the examples corresponds to the case where driving is performed with four lines as one group, and the pixels P4, m belonging to the fourth gate line and the pixels P5, m− belonging to the fifth gate line. 1, and P5, m + 1
The pixel electrode proximity portion between the portions (portion A indicated by a broken ellipse in FIGS. 14 and 15) is removed. That is,
When driving as shown in FIG. 20 with n gate lines as one group, a pixel electrode proximity portion is provided between a pixel corresponding to the last stage of a certain drive group and a pixel corresponding to the first stage of the next group. Not formed, but the pixel electrode proximity portion is formed in the other portion. 14 and 15 show an example in which the pixel electrode proximity portion is not physically formed, but as described in the third embodiment, the electrode proximity portion of this portion is electrically connected by the switching element. It may be detachable.

Incidentally, the above-mentioned first and third embodiments.
In the above description, the description has been made assuming that n gate lines are simultaneously selected and the black signal is written, but as is apparent from the problem description using FIG. 21, the portion where the polarity of the image signal voltage does not change. If there is a mixed portion of the polarity and its polarity, this may be a factor such as horizontal stripes.
Therefore, the configurations described in the first and third embodiments may be applicable to the case where another driving method is used. That is, in a group in which a plurality of gate lines are used as a unit, the polarity of the image signal voltage is constant, and if the polarity of the image signal voltage is inverted in the next group, the simultaneous writing of the black signal is possible. The effect of the present invention can be obtained even when there is no such a case. 1st Embodiment of this invention, or 3rd
One example of what the embodiment is effective is 4-line dot inversion in which the signal polarity of each pixel is as shown in FIG.

Further, in any of the configurations of the above-described first to third embodiments, as shown in the plan view of each embodiment, the pixel electrode proximity portion is composed of a plurality of sides with different angles, and This is suitable when it is possible to generate electric fields in different directions. By doing so, compared with a configuration in which two electrodes face each other across a straight line, electric fields in multiple directions are generated in the liquid crystal layer during transition scanning, and the length of the proximity portion per unit area is increased. It is possible to make the transfer easier and more reliable.

On the other hand, although such a configuration increases the coupling capacitance between pixels, if the configuration of any of the above-described first to third embodiments is used, the problem of the image quality caused by this coupling capacitance will occur. Solvable.

In the above-described embodiment, the state where the pixel electrode and the TFT do not overlap each other has been illustrated and described, but this is done in order to avoid complication of the drawing, and the pixel is actually used. The electrode is TF in order to increase the aperture ratio.
It is desirable to overlap with T.

In addition, the illustrated examples are merely for helping understanding of the concept of the present invention, and the present invention is not limited to these. For example, the switching element is a bottom gate type TFT made of amorphous silicon semiconductor.
However, instead of this, a top gate type TFT made of polysilicon may be used. The flattening layer 23 may also serve as the color filter layer. In addition, in the cross-sectional view of the array substrate such as FIG.
A protective insulating layer is further present between the layer and the layer below it (the layer at the same level as the source line (storage capacitor forming electrode) 30, etc.), but it is not shown in order to avoid complication of the drawing.

[0057]

As described above, according to the present invention, in order to perform black insertion in a bend alignment type liquid crystal display device (n
In +1) / n double speed driving (n is an integer of 2 or more), a proximity portion between pixels provided as a transition nucleus for facilitating the transition from the splay alignment to the bend alignment becomes a parasitic capacitance between the pixels. The problem of adversely affecting the display can be solved without introducing a new process.

As a first method, when the gate line is divided into n groups, adjacent portions between pixels corresponding to the last stage of each group and the first stage of the next group are removed. As a result, uneven horizontal stripes occurring every n lines are reduced.

As a second method, in all the pixels, the display pixel electrode and the proximity portion forming electrode can be electrically separated by, for example, a TFT switching element. As a result, at the time of the splay-bend alignment transition, the adjacent portion effectively acts as a transition nucleus, and in the display operation, the parasitic capacitance between pixels can be eliminated, so that the display problem such as lateral stripe unevenness can be solved. In particular, the second method is effective in ensuring display quality regardless of the driving method.

As a result, the display image quality of the OCB mode liquid crystal display device having a high response speed and an excellent viewing angle can be maintained at a high quality, and its industrial utility value becomes high.

[Brief description of drawings]

FIG. 1 is a plan view showing a pixel electrode configuration in a liquid crystal display device according to a first embodiment.

2A is a plan view showing another configuration example of the liquid crystal display device according to the first embodiment, and FIG. 2B is a cross-sectional view showing another configuration example of the liquid crystal display device according to the first embodiment.

FIG. 3 is a circuit configuration diagram of a liquid crystal display device according to a second embodiment.

4A is a plan view showing a pixel electrode structure in a liquid crystal display device according to a second embodiment, FIG. 4B is a sectional view showing a pixel electrode structure in the liquid crystal display device according to the second embodiment, and FIG. Equivalent circuit diagram of pixel electrode configuration in liquid crystal display

5A is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment, FIG. 5B is a sectional view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment, and FIG. Equivalent circuit diagram of another pixel electrode configuration in the liquid crystal display device of the second aspect

FIG. 6 is a plan view illustrating a pixel voltage polarity of dot inversion driving.

FIG. 7 is a drive waveform diagram in dot inversion drive.

FIG. 8 is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment.

FIG. 9 is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment.

FIG. 10 is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment.

FIG. 11 is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment.

FIG. 12 is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment.

FIG. 13 is a plan view showing another pixel electrode configuration in the liquid crystal display device according to the second embodiment.

FIG. 14 is a plan view showing a delta array.

FIG. 15 is a plan view showing another pixel array.

FIG. 16 is a plan view illustrating a pixel voltage polarity of 4-line dot inversion drive.

FIG. 17 is a cross-sectional view illustrating an alignment state of a liquid crystal layer.

18 (a) is a plan view showing a pixel electrode configuration in a conventional liquid crystal display panel, and FIG. 18 (b) is a view of a conventional liquid crystal display panel in FIG. 18 (a).
-B sectional view (c) equivalent circuit diagram of a conventional liquid crystal display panel

FIG. 19 is a drive waveform diagram in double speed drive.

FIG. 20 is a drive waveform chart in 5/4 speed drive.

FIG. 21 is a response waveform diagram of pixel voltage in 5/4 speed drive.

[Explanation of symbols]

1-8 pixels 10,11 substrate 12 Liquid crystal layer 13 Liquid crystal molecules 14 gate lines 14a gate electrode 15 Source line 15a source electrode 16 Switching element (TFT) 17 pixel electrodes 18, 32, 33, 34 contact holes 19 Drain electrode 20 storage capacity line 21 Gate insulating layer 22 Semiconductor layer 23 Flattening layer 30 Storage capacitor forming electrode 31 Second switching element (second TFT) 35 Source Electrode of Second Switching Element 36 Drain electrode of second switching element 40 gate line drive circuit 41 Source line drive circuit

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 2H090 HB08Y JB02 MA01 MA07                       MA17 MB14                 2H092 JA26 JA29 JA38 JA42 JA46                       JB05 JB13 JB23 JB32 JB38                       JB51 JB57 JB58 JB63 JB69                       JB71 JB77 KA04 KA05 KA12                       KA18 KA22 KB04 KB14 KB23                       KB25 MA08 MA12 MA35 MA37                       NA04 NA25 NA29 PA02 QA18

Claims (21)

[Claims] 1. A plurality of gate lines to which a scanning signal is supplied and a plurality of source lines to which a pixel signal is supplied, on the facing surface side of one of the two substrates facing each other with a liquid crystal layer interposed therebetween. At least a first switching element provided corresponding to each intersection of the gate line and the source line, a pixel electrode connected to the first switching element, and a counter electrode formed on the other substrate. In the liquid crystal display device, the gate lines are selected a plurality of times within one frame period in order to write an image signal and a black signal to the pixel electrodes, and the black signal is n lines. (N is an integer of 2 or more) is driven and displayed so that the gate lines are simultaneously selected and written, and the pixel electrodes have a proximity portion in which a part of adjacent pixel electrodes are close to each other. ,And,
A liquid crystal display device operating in an OCB mode, wherein the proximity portion is removed at a rate of one for every n lines according to a gate line to which the pixel electrode is connected. 2. The liquid crystal display device according to claim 1, wherein a proximity portion between the pixel electrodes is formed so as to overlap with the gate line or the source line. 3. The liquid crystal display device further includes a storage capacitor line for forming a storage capacitor between the liquid crystal display device and the pixel electrode,
The liquid crystal display device according to claim 1, wherein a proximity portion between the pixel electrodes is formed so as to overlap the storage capacitance line. 4. The proximity portion between the pixel electrodes is composed of a plurality of sides at different angles, and is capable of generating electric fields in different directions in the liquid crystal layer. The liquid crystal display device according to item 1. 5. A plurality of gate lines to which a scanning signal is supplied and a plurality of source lines to which a pixel signal is supplied to the facing surface side of one of the two substrates which face each other with the liquid crystal layer interposed therebetween. At least a first switching element provided corresponding to each intersection of the gate line and the source line, a pixel electrode connected to the first switching element, and a counter electrode formed on the other substrate. A liquid crystal display device comprising: the pixel electrode having a proximity portion in which a part of adjacent pixel electrodes are close to each other, and the proximity portion is configured to be electrically disconnectable. A liquid crystal display device that operates in an OCB mode. 6. The liquid crystal display device according to claim 5, wherein a proximity portion between the pixel electrodes is formed so as to overlap with the gate line or the source line. 7. The liquid crystal display device further comprises a storage capacitor line for forming a storage capacitor between the liquid crystal display device and the pixel electrode,
The liquid crystal display device according to claim 5, wherein a proximity portion between the pixel electrodes is formed so as to overlap the storage capacitance line. 8. The liquid crystal display device according to claim 5, wherein the pixel electrode and the proximity portion are connected via a second switching element. 9. The liquid crystal display device according to claim 8, wherein a control terminal of the second switching element is connected to the gate line. 10. The liquid crystal display device according to claim 8, wherein a control terminal of the second switching element is connected to the storage capacitance line. 11. The proximity portion between the pixel electrodes is composed of a plurality of sides having different angles, and is capable of generating electric fields in different directions in the liquid crystal layer.
0. The liquid crystal display device according to any one of 0. 12. The liquid crystal display device according to claim 5, wherein, in all pixels in the display area, the proximity portion is configured to be electrically disconnectable from the pixel electrode. 13. A plurality of gate lines to which a scanning signal is supplied and a plurality of source lines to which a pixel signal is supplied to the facing surface side of one of the two substrates facing each other with a liquid crystal layer interposed therebetween. At least a first switching element provided corresponding to each intersection of the gate line and the source line, a pixel electrode connected to the first switching element, and a counter electrode formed on the other substrate. In the liquid crystal display device, the gate lines are selected a plurality of times within one frame period in order to write an image signal and a black signal to the pixel electrodes, and the black signal is n lines. (N is an integer of 2 or more) is driven and displayed so that the gate lines are simultaneously selected and written, and the pixel electrodes have a proximity portion in which a part of adjacent pixel electrodes are close to each other. And the contact of the pixel electrode O is configured such that the proximity portion can be electrically disconnected from the pixel electrode at a rate of one for every n lines according to the gate line to be connected.
A liquid crystal display device that operates in the CB mode. 14. The liquid crystal display device according to claim 13, wherein a proximity portion between the pixel electrodes is formed so as to overlap with the gate line or the source line. 15. The liquid crystal display device further comprises a storage capacitor line for forming a storage capacitor between the pixel electrode and the pixel electrode, and a proximity portion between the pixel electrodes is formed so as to overlap the storage capacitor line. The liquid crystal display device according to claim 13, wherein the liquid crystal display device is a liquid crystal display device. 16. The liquid crystal display device according to claim 13, wherein the pixel electrode and the proximity portion are connected via a second switching element. 17. The liquid crystal display device according to claim 16, wherein a control terminal of the second switching element is connected to the gate line. 18. The liquid crystal display device according to claim 16, wherein a control terminal of the second switching element is connected to the storage capacitance line. 19. The proximity portion between the pixel electrodes is composed of a plurality of sides having different angles so that electric fields in different directions can be generated in the liquid crystal layer. The liquid crystal display device according to item 1. 20. A plurality of gate lines to which a scanning signal is supplied and a plurality of source lines to which a pixel signal is supplied, on the facing surface side of one of the two substrates facing each other with the liquid crystal layer interposed therebetween. At least a first switching element provided corresponding to each intersection of the gate line and the source line, a pixel electrode connected to the first switching element, and a counter electrode formed on the other substrate. A liquid crystal display device provided with the liquid crystal display device, wherein the polarity of an image signal voltage is inverted every n lines (n is an integer of 2 or more) of the gate lines for driving display. The pixel electrode has a proximity portion in which a part of adjacent pixel electrodes are close to each other, and the proximity portion is removed at a rate of one every n lines according to a gate line to which the pixel electrode is connected. Operates in OCB mode characterized by Liquid crystal display device. 21. A plurality of gate lines to which a scanning signal is supplied and a plurality of source lines to which a pixel signal is supplied to the facing surface side of one of the two substrates facing each other with a liquid crystal layer interposed therebetween. At least a first switching element provided corresponding to each intersection of the gate line and the source line, a pixel electrode connected to the first switching element, and a counter electrode formed on the other substrate. A liquid crystal display device provided with the liquid crystal display device, wherein the polarity of an image signal voltage is inverted every n lines (n is an integer of 2 or more) of the gate lines for driving display. The pixel electrode has a proximity portion in which a part of adjacent pixel electrodes are close to each other, and the proximity portion is the pixel electrode at a rate of one for every n lines according to a gate line to which the pixel electrode is connected. Is configured to be electrically disconnectable from A liquid crystal display device which operates in the OCB mode.