JPH05327798A - Frequency modulating circuit - Google Patents

Abstract

PURPOSE:To decrease a distortion imparted to data, in the case a frequency modulated wave is generated directly by modulation data having a DC component, with regard to the frequency modulating circuit, for instance, used for a data transmitter. CONSTITUTION:In the frequency modulating circuit having an oscillating/phase comparing means 1 and a band limiting/synthesizing means 2, together with generating directly a frequency modulated wave by using modulation data containing a DC component, a degree of balance of H level data and L level data in the modulation data concerned is detected. This circuit is constituted by providing a switch control means 3 for sending out a switch control signal at the time when it is decided that the detected degree of balance is outside of a range set in advance, and a switching means 4 for disconnecting a connecting line between the oscillating/phase comparing means and the band limiting/synthesizing means concerned.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency modulation circuit used in, for example, a data transmitter.

Conventionally, only low-power wireless devices for premises, low-power transceivers used for teleterminals, car phones, in-vehicle / portable wireless devices for general use, transmitters of radio calling system, etc. have been mainly used to transmit only voice. ..

However, in recent years, there have been many opportunities to widely transmit information, so that the number of devices for only data transmission has increased, and the data transmission rate is wide ranging from slow to fast.

Especially, the one exclusively used for data transmission is
From the viewpoint of frequency utilization efficiency and the like, there has been a demand for a direct modulation method that requires a narrow occupied bandwidth per transmission rate, instead of the conventional method using a subcarrier.

Therefore, when the frequency-modulated wave is directly generated by the modulated data having the direct current component, it is necessary to reduce the distortion given to the data.

[0006]

2. Description of the Related Art FIG. 6 is a block diagram of a first conventional example, FIG. 7 is a block diagram of a second conventional example, and FIG. 8 is a block diagram of a third conventional example.

6 to 8 will be described below.
~ The same reference numerals in Fig. 8 indicate the same object. First, in FIG. 6, a voltage controlled oscillator (hereinafter, abbreviated as VCO) 11 sends an oscillation output as a high frequency output to the outside and also sends it to a frequency divider 12. Since the frequency divider 12 has a frequency division ratio corresponding to the applied frequency setting information, it divides the input oscillation output and sends it to the phase comparator 13.

Since the reference output from the reference oscillator 14 is also applied to the phase comparator 13, a phase difference signal corresponding to the phase difference between the two outputs is taken out, and the hybrid 22 is passed through the low pass filter 21. Added to. Since modulation data having a direct current component is also added to the hybrid 22, they are added and sent to the VCO 11 as an oscillation frequency control signal.
Therefore, the VCO 11 sends out the frequency modulated wave as a high frequency output.

Here, since FIG. 6 has a PLL type frequency synthesizer configuration, when the frequency synthesizer is directly modulated by data, the frequency synthesizer automatically shifts the frequency by the operation called frequency modulation. Since the operation that the PLL has to restore is performed, data having a DC component is greatly distorted, as described later.

FIG. 7 shows VCO 11, frequency divider 12, phase comparator 1
The output of a local oscillator composed of a PLL type frequency synthesizer consisting of a reference oscillator 14 and a low-pass filter 21 is added to a mixer 62.

On the other hand, since the VCO 61 directly adds modulation data having a direct current component to generate a frequency modulation wave and adds this data to the mixer 62, the mixer 62 converts the frequency modulation wave into a desired transmission frequency. Then, it is sent out through the band pass filter 63.

In this system, two oscillation sources 11 and 61 and a mixer 6 are used.
2. Since the band-pass filter 63 is required, the number of components increases. In addition, it is necessary to adjust the level of each unit so as to suppress unnecessary waves such as local signal components and image frequency components as much as possible.

In FIG. 8, a method of adding a modulation data having a direct current component to the VCO 11 and the reference oscillator 14 to generate a frequency modulated wave and relieving the modulation distortion of the direct current component is also taken. In this method, when the H level is large or continuous, the frequency increased by H during the modulation of only VCO becomes low by PLL and tries to return to the original. At this time, the modulation applied to the reference oscillator acts to gradually raise the frequency due to the integral characteristics related to the response of the loop filter 21, so the frequency should be set to an appropriate value even if there are many H levels or they continue. You can

However, it is necessary to balance the modulation for the VCO 11 and the modulation for the reference oscillator 14 and other critical problems, and the reference oscillator also needs a modulation function. There are also examples of using methods such as opening and closing loops at the timing of data (for example, turning on for voice signals, turning off for data), but for devices dedicated to data transmission, the switch is in the off state. As the VCO remains free-running, it becomes difficult to maintain the frequency stability within the specified range for a long period of time.

[0015]

FIG. 9 is a diagram for explaining the problem, and FIG. 9A is a waveform diagram of the modulation data. When the H level is more than the L level, the L level is When the number of states is higher than that of H level, the state of H level and the state of L level continue alternately.

Further, (b) is a diagram for explaining the relationship between the waveform of the modulated data and the frequency shift, while (b)-,-is a frequency shift diagram corresponding to (a)-. FIG. 10 is an explanatory diagram of a waveform of an audio signal.

A description will be given below with reference to FIGS. 9 and 10. First, as shown in FIG. 10, the waveform of the voice signal is VCO by AC coupling.
Since the average value does not fluctuate because it is input to, and therefore the center of the transmission frequency does not fluctuate, no problem occurs.

However, the data sequence having a DC component corresponds to the existence probabilities of the H-level data and the L-level data (hereinafter referred to as the equilibrium degree), as shown in FIGS. The average value (dotted line in the figure), that is, the DC potential changes.

When the data section is short, a large-capacity capacitor can be used to prevent the average value from fluctuating too much.

There is no limit to the use of large-capacity capacitors. Also, increasing the capacitance means that the phase-locked loop does not operate as a marp (because the capacitance is large so that the loop does not respond). In addition, when the power is turned on, it takes a very long time to stabilize.

As shown in FIG. 9 (b)-, the frequency deviation of the frequency-modulated wave that is not distorted shows the same value of the frequency deviation on the + side and the-side, but when distorted. As shown in FIG. 9B, the + and-side frequency deviations have different values, and when noise is superimposed on the frequency-modulated wave, there is a high possibility that data will be demodulated erroneously.

That is, when the frequency-modulated wave is directly generated by the modulated data having the DC component, there is a problem that the data is distorted and it becomes difficult to demodulate the data. It is an object of the present invention to reduce distortion applied to data when directly generating a frequency-modulated wave with modulated data having a DC component.

[0023]

FIG. 1 is a block diagram showing the principle of the first and fourth inventions, FIG. 2 is a block diagram showing the principle of the second invention, and FIG. 3 is a block diagram showing the principle of the third invention. Is.

In the figure, reference numeral 1 corresponds to the frequency setting information from the outside, and compares the phase of the divided output obtained by dividing the oscillation output of the voltage controlled oscillator with the applied reference oscillation output to determine the phase difference. Oscillation / phase comparison means for transmitting the corresponding phase difference signal,
Reference numeral 2 denotes a band limiting / combining means for limiting the band width of the applied phase difference signal with a low-pass filter, and then synthesizing with the modulation data containing the input DC component and sending it as an oscillation frequency control signal of the voltage controlled oscillator. Is.

Reference numeral 3 denotes H level data and L in the modulated data.
The switch control means 4 which detects the balance of the level data and sends a switch control signal when it is determined that the detected balance is out of a preset range is oscillated while the switch control signal is being applied. Phase comparison means and the band limitation
Switching means 5 for disconnecting the connection line to the synthesizing means is delay means for delaying the modulation data input to the band limiting / synthesizing means by a time corresponding to the determination time of the switch control means.

According to the first aspect of the present invention, when the balance of the modulation data is out of the set range, a frequency-modulated wave corresponding to the modulation data input by the free-running voltage controlled oscillator is generated.
According to a second aspect of the present invention, the switch control means obtains by counting the number of H-level data among the M-stage shift register 31 storing the M-bit modulation data and the modulation data stored in the M-stage shift register. A first switch that sends a switch control signal when it is determined that the counted value is out of the set range described above.
And a determination portion 32 of.

According to a third aspect of the present invention, when the switch control means determines that the analog integrator 33 for integrating the modulation data and the output voltage of the analog integrator are out of the above setting range, the switch control signal is output. And a second determination portion 34 for transmitting

In the fourth aspect of the present invention, the delay means 5 is provided for delaying the modulation data input to the band limiting / synthesizing means for a time corresponding to the determination time of the switch control means.

[0029]

In the first aspect of the present invention, the average value of the pulse voltage of, for example, 0 to 5V deviates from 2.5V if the balance of the modulation data is deviated. For this reason, the switch control means monitors the deviation from 2.5 V, and when the deviation is out of the set range, the phase locked loop (PLL) is opened and the VCO self-runs at the frequency immediately before opening. The setting range is set slightly narrower than the allowable range.

As a result, since the deviation is within the allowable range, the data distortion is small. That is, when the frequency modulated wave is directly generated, it is possible to reduce the distortion given to the data.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 4 is a block diagram of the first and fourth embodiments of the present invention, and FIG. 5 is a configuration diagram of the second and third embodiments of the present invention.
(a) is the case of the second invention, and (b) is the case of the third invention. The same reference numerals denote the same objects throughout the drawings. The operation of FIG. 4 will be described below with reference to FIG. 5. The parts described in detail above will be briefly described, and the part of the present invention will be described in detail. Note that the modulation data has a DC component.

First, in FIG. 5A, the modulation data is M
The number of H-level data in the M-bit modulation data stored in the counter 321 is counted by the counter 321 and is sent to the difference detector 323.

On the other hand, this detector has a reference value generator 322.
Since the reference value N from 1 is also applied, the difference between the count value and the reference value is calculated and the difference value is sent to the decision unit 324. Judge 32
4 is the difference value, that is, when it is determined that the balance is out of the preset setting range, the H level switch control signal is shown in FIG.
The switch control signal is not transmitted when it is determined that the value is within the set range.

Next, referring to FIG. 5 (b), the input modulation data (for example, 5V for H level and 0V for L level) is used as an integrator 33 composed of a resistor R and a capacitor C.
Integral with 1. At this time, the output of the integrator is 2.5V if the modulation data is in the balanced state, but it is 2.5V in the unbalanced state.
Deviate from.

On the other hand, the (−) terminals of the operational amplifiers 341 and 342,
Voltages of (2.5 + 0.3) V and (2.5−0.3) V, for example, are applied to the (+) terminal, and the output of the integrator applied to the (+) and (−) terminals (that is, the balanced (Corresponding to the degree), but (2.8-2.
2) If the voltage is within the setting range of V, the H level is sent to the NOR gate 343, and if it is outside the setting range, the L level is sent to the NOR gate 343.

Therefore, if it is outside the allowable range, the H level is sent to the switch 4 of FIG. 4 as a switch control signal. Now, in FIG. 4, while the switch control signal from the switch control means 3 is not applied to the switch 4 (the balance degree of the modulation data is within the setting range), the phase comparator 13 and the low-pass filter 21 are connected. Therefore, VCO 11, frequency divider 12, phase comparator 21, switch 4, low-pass filter 2
It has a PLL type frequency synthesizer configuration consisting of 1 and hybrid 22, and the VCO 11 sends the frequency modulated wave corresponding to the modulated data to the outside as a high frequency output.

However, while the switch control signal from the switch control means 3 is being applied to the switch 4 (the balance of the modulation data is outside the setting range), the switch 4 is in the operating state and the phase comparator 13 and Since the connection with the low-pass filter 21 is cut off, the PLL is turned off and the VCO becomes free-running.

Therefore, the free-running VCO generates a frequency modulation wave corresponding to the input modulation data. The delay circuit 5 has a time corresponding to the determination time of the switch control means,
Hybrid 22 Delays the input modulation data.

As a result, when the frequency modulated wave is directly generated by the modulated data having the DC component, the distortion given to the data is reduced.

[0040]

As described above in detail, according to the present invention, when the frequency modulated wave is directly generated by the modulated data having the DC component, the distortion applied to the data can be reduced. There is.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of first and fourth aspects of the present invention.

FIG. 2 is a principle configuration diagram of a second present invention.

FIG. 3 is a principle configuration diagram of a third present invention.

FIG. 4 is a configuration diagram of the first and fourth embodiments of the present invention.

FIG. 5 is a configuration diagram of the second and third embodiments of the present invention, (a)
In the case of the second invention, (b) is the case of the third invention.

FIG. 6 is a configuration diagram of a first conventional example.

FIG. 7 is a configuration diagram of a second conventional example.

FIG. 8 is a configuration diagram of a third conventional example.

9A and 9B are explanatory diagrams of a problem, and FIG. 9A is a waveform diagram of modulation data. When the H level state is more than the L level state, the L level state is higher than the H level state. In the case where there are many, the high level state and the L level state continue alternately. Also, (b) is an explanatory diagram of the relationship between the waveform of the modulation data and the frequency deviation, but (b)-,-is (a)-
3 is a frequency shift diagram corresponding to ,.

FIG. 10 is an explanatory diagram of waveforms of audio signals.

[Explanation of symbols]

1 oscillation / phase comparison means 2 band limitation
Combining means 3 Switch control means 4 Switching means 5 Delay means 31 M-stage shift register 32 First judgment part 33 Analog integrator 34 Second judgment part

Claims (4)

[Claims] 1. Corresponding to frequency setting information from the outside,
The oscillation / phase comparison means (1) that compares the phase of the divided output obtained by dividing the oscillation output of the voltage-controlled oscillator with the applied reference oscillation output and sends the phase difference signal corresponding to the phase difference After limiting the bandwidth of the phase difference signal with a low-pass filter, a band limiting / synthesizing means (2) for synthesizing with modulated data including the input DC component and sending it as an oscillation frequency control signal of the voltage controlled oscillator (2) And a frequency modulation circuit that directly generates a frequency-modulated wave using the modulation data, detects the balance between H-level data and L-level data in the modulation data, and detects the balance in advance. Between the switch control means (3) that sends a switch control signal when it is determined that it is out of the set range, and between the oscillation / phase comparison means and the band limitation / synthesis means while the switch control signal is being applied. Disconnect the connection line Frequency modulation circuit characterized in that a switching means (4) to. 2. The M-stage shift register (31) in which the switch control means stores M-bit (M is a positive integer) modulation data, and the modulation data stored in the M-stage shift register. The first determination part (32) for transmitting the switch control signal when it is determined that the count value obtained by counting the number of H level data is out of the set range. Frequency modulation circuit. 3. When the switch control means determines that an analog integrator (33) that integrates the modulation data and the output voltage of the analog integrator is out of the set range,
Second determination portion (34) for transmitting the above switch control signal
The frequency modulation circuit according to claim 1, further comprising: 4. A delay means (5) for delaying the modulation data input to the band limiting / synthesizing means for a time corresponding to the determination time of the switch control means.
A few frequency modulation circuits.