JPH05327475A - Programmable logic device - Google Patents

Abstract

PURPOSE:To provide a programmable logic device PLD which can output the output of an optional programmable logic part to an optional output terminal by providing an output terminal selection circuit to an output circuit. CONSTITUTION:A PLD 100 consists of the programmable logic parts L1-Ln containing different numbers of AND circuits and a single OR circuit respectively and the output circuits OC1-OCn containing the flip-flop circuits F. Then an output terminal selection circuit TS is added to each of circuits OC1-OCn. Thus the output of the optional one of parts L1-Ln is outputted to the optional one of output terminals t1-tn.

Description

Detailed Description of the Invention

[0001]

This invention relates to programmable logic devices. A programmable logic device (hereinafter referred to as PLD) has a programmable logic configuration, thereby performing an arbitrary logical operation.
It is a device that generates a signal of an arbitrary pattern.

FIG. 3 is a diagram for explaining a PLD. Here is an example of AND programmable × OR fixed. (A)
Indicates the programmable logic part L of the PLD. OR circuit O
A plurality of AND circuits are connected to R. The vertical line indicates the input signal, usually adjacent even-numbered and odd-numbered are paired, one is the positive polarity signal of the input signal,
The other is the negative polarity signal.

The horizontal line is called a product term line and forms a logical product. (B) is one of the AND circuits shown in (A), where a to n indicate an input signal, B indicates a buffer that outputs two signals of a positive polarity signal and a negative polarity signal of the input signal, D is a diode and A is an AND circuit.

All the input signals a to n are input to the AND circuit A.
The positive polarity signal and the negative polarity signal are connected through a fuse, and the necessary logic is obtained by leaving the fuse of the signal forming the logical product and cutting the other.

A PLD capable of outputting the output of the programmable logic part of the PLD from an arbitrary output circuit
Is required.

[0006]

2. Description of the Related Art FIG. 4 shows a diagram for explaining a conventional example. The figure shows the programmable logic units L1 to L10 described in FIG.
PLD100 composed of output circuits OC1 to OC10
Is an example of.

In the figure, programmable logic units L1 to L1
The output of L10 is output from the terminals T23 to T14 through the output circuits OC1 to OC10. FIG. 5 is a diagram illustrating a conventional output circuit. The output of the programmable logic unit L described in FIG. 3 is the output circuit OC and the inverter INV.
Is output through.

The output circuit OC includes a flip-flop circuit (hereinafter referred to as FF circuit) F, 1/4 selectors S1 and 1
It is composed of a / 2 selector S2. The output of the 1/2 selector S2 is passed through the buffer B to the PLD100.
It is used as an input signal to the inside of.

As described above, the output terminal can also be used as an input terminal, and the number of input / output terminals of the PLD is generally shown in the form of mVn. Here, m is the number of input terminals and n is the number of output terminals.

In FIG. 4, T1 to T11 and T1
3 is an input terminal, T12 is a ground terminal, T14
Since T23 to T23 are input / output terminals, 22 terminals can be used as input terminals and 10 terminals can be used as output terminals, and are expressed as 22V10.

[0011]

FIG. 6 is a diagram for explaining the connection between the conventional programmable logic unit and the output circuit.
Programmable logic units L1 to L of the conventional example described in FIG.
22V10 will be described as an example of the number of 10 product term lines. The number of product term lines is different for each programmable logic unit L1 to L10 in order to increase the integration degree of the PLD, and the number of terms for which a logical operation is large is a programmable logic unit having a large number of product term lines. , Which has a small number of terms for performing a logical operation, uses a programmable logic unit having a small number of product term lines.

In the case of the 22V10 PLD shown in FIG. 6, the number of product term lines of the programmable logic units L1 to L10 is 8, 10, 12, 14, 16, 16, 14, 12,
It is 10 or 8. (Programmable logic unit L7
In the 22V10 PLD, for example, when 16 product term lines are used, the output is limited to the terminal T18 or the terminal T19.

Here, due to the circuit modification, the terminal T1 has been used until now.
If it becomes necessary to output the signal output to the terminal 8 to the terminal T21, it is desired to use 16 product term lines, but only 12 product term lines are assigned to the output terminal T21. Therefore, it cannot output to the output terminal T21.

Therefore, when there is such a change in the output terminal, it is dealt with by changing the pattern of the printed board package. The present invention seeks to realize a PLD capable of outputting the output of any programmable logic portion of the PLD from any output circuit.

[0015]

FIG. 1 is a diagram for explaining the principle of the present invention. In the figure, 100 is a PLD, L1 to
Ln is a programmable logic unit including a different number of AND circuits and one OR circuit, and OC1 to OCn are output circuits including a flip-flop circuit F.

TS is an output terminal selection circuit TS provided in the output circuits OC1 to OCn, and outputs the outputs of the programmable logic units L1 to Ln to the arbitrary output terminals t1 to tn.
Output to.

[0017]

A PLD in which the number of product term lines of the programmable logic units L1 to Ln is different for each programmable logic unit L1 to Ln
In 100, the programmable logic units L1 to Ln to be used are determined depending on the number of product term lines to be used, and at the same time, the output circuits OC1 to OCn and the output terminals t1 to tn are also determined.

Therefore, since the output of the programmable logic unit using a large number of product term lines cannot be output to the output terminal corresponding to the output circuit of the programmable logic unit using a small number of product term lines, the output circuits OC1 to OC1. An output terminal selection circuit TS is provided in OCn, and the output terminal selection circuit TS selects any output terminal t1 to tn to output the output of any programmable logic unit L1 to Ln to any output terminal t1 to tn. It becomes possible.

[0019]

FIG. 2 is a diagram for explaining an output circuit according to an embodiment of the present invention. FIG. 3A is a diagram illustrating an output circuit, and FIG.
The output of the programmable logic unit L described in 1. is the output circuit O.
Output to an arbitrary output terminal through C and the inverter INV.

The output circuit OC of the embodiment of the present invention is the FF circuit F, the 1/4 selectors S1 and 1/2 explained in the conventional example.
The output circuit OC including the selector S2 is provided with the output terminal selection circuit TS.

Also, the output of the 1/2 selector S2 can be returned as an input signal into the PLD through the buffer B, as in the conventional example. (B) shows an example of the configuration of the output terminal selection circuit TS. 22V10 here
As an example, since there are 10 output terminals T14 to T23, the output terminal selection circuit TS is composed of a switch SW having 10 open / close contacts.

The outputs of the programmable logic units L1 to L10 are input to the switch SW through the FF circuit F of the output circuit OC and the 1/4 selector S1. The switch SW closes the contacts corresponding to the arbitrary output terminals T14 to T23 by a connection control signal from a connection setting unit (not shown), and outputs the outputs of the arbitrary programmable logic units L1 to L10 to the arbitrary output terminals T14 to T23. Can be output to.

[0023]

According to the present invention, in a PLD in which the number of product term lines to be used is different for each programmable logic section, an output terminal selection circuit is provided in the output circuit so that the output of any programmable logic section can be set to any desired value. Can be output to the output terminal.

Since the output of any programmable logic section can be output to any output terminal, the circuit can be easily changed without changing the pattern of the printed board package when the output terminal is changed. It becomes possible to do it.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a diagram illustrating an output circuit according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating a PLD.

FIG. 4 is a diagram illustrating a conventional example.

FIG. 5 is a diagram illustrating an output circuit of a conventional example.

FIG. 6 is a diagram illustrating a connection between a programmable logic unit and an output circuit in a conventional example.

[Explanation of symbols]

100 PLD L, L1 to Ln Programmable logic part OC, OC1 to OCn Output circuit TS output terminal selection circuit F FF circuit A AND circuit OR OR circuit B buffer D diode S1 1/4 selector S2 1/2
Selector INV Inverter SW switch t1 to tn Output terminal T1 to Tn
Terminal

Claims (2)

[Claims] 1. A programmable logic unit (L1 to Ln) including a different number of AND circuits and one OR circuit, and output circuits (OC1 to OC1) including a flip-flop circuit (F).
OCn) programmable logic device (1
00), the output circuit (OC1 to OCn) is provided with an output terminal selection circuit (TS), and the output of any programmable logic unit (L1 to Ln) is output to any output terminal (t1 to tn). Programmable logic device characterized by. 2. The programmable logic device according to claim 1, wherein the output terminal selection circuit (TS) is a switch (SW) which can be programmed by a connection control signal from a connection setting section.