JPH05327187A - Printed circuit board and manufacture thereof - Google Patents
Printed circuit board and manufacture thereofInfo
- Publication number
- JPH05327187A JPH05327187A JP12443792A JP12443792A JPH05327187A JP H05327187 A JPH05327187 A JP H05327187A JP 12443792 A JP12443792 A JP 12443792A JP 12443792 A JP12443792 A JP 12443792A JP H05327187 A JPH05327187 A JP H05327187A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- palladium
- plating film
- film
- electroless
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、プリント配線板及びそ
の製造法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and its manufacturing method.
【０００２】[0002]
【従来の技術及びその課題】最近、表面実装の普及によ
って、プリント配線板両面への部品実装が可能となり、
高密度実装用のプリント配線板が広く実用化されてい
る。2. Description of the Related Art The recent widespread use of surface mounting has made it possible to mount parts on both sides of a printed wiring board.
Printed wiring boards for high-density mounting have been widely put into practical use.
【０００３】このような両面表面実装方式のプリント配
線板では、種々の部品装着方法が採用されており、例え
ば、プリント配線板の表面に、チップ部品をリフローに
よりはんだ付けした後、裏面にも同じようにチップ部品
をリフローによりはんだ付けをし、その後、端子用リー
ド線をもった電子部品をリフロー法によりはんだ付けす
る方法、プリント配線板の表面にチップ部品をリフロー
によりはんだ付けし、裏面にはチップ部品を接着剤で仮
止めし、挿入部品と一緒にフローソルダリングする方法
などが採用されている。これらの方法では、プリント配
線板は、はんだ付けや接着剤の硬化のために複数回の熱
処理が行なわれており、この加熱によりプリント配線板
の導体回路を形成する銅が酸化され、はんだにより電子
部品を接続する際の接続不良の原因となっている。In such a double-sided surface mounting type printed wiring board, various component mounting methods are adopted. For example, after soldering a chip component to the front surface of the printed wiring board by reflow, the same is applied to the back surface. As described above, solder the chip parts by reflow, then solder the electronic parts with lead wires for terminals by the reflow method, solder the chip parts on the front surface of the printed wiring board by reflow, and on the back surface The method of temporarily fixing the chip parts with an adhesive and performing flow soldering together with the insert parts is adopted. In these methods, the printed wiring board is subjected to multiple heat treatments for soldering and curing of the adhesive, and this heating oxidizes the copper forming the conductor circuit of the printed wiring board, and the solder causes electronic It is a cause of connection failure when connecting parts.
【０００４】この様な弊害を防止するために、例えば、
プリフラックス処理とよばれるプリント配線板の表面処
理が行なわれている。この方法は、プリント配線板の製
造後、ロジン材料等からなるプリフラックスを銅表面保
護膜として塗布して、銅回路部分の防錆効果を図る方法
である。しかしながら、プリフラックスは、リフローは
んだ付け等により複数回熱処理を行なう場合に、熱的履
歴を経ることによって保護膜としての機能が損なわれ、
はんだ付け性の劣化、はんだ付け後の洗浄性の劣化など
を生じるという欠点がある。In order to prevent such an adverse effect, for example,
A surface treatment of a printed wiring board called pre-flux treatment is performed. This method is a method of applying a pre-flux made of a rosin material or the like as a copper surface protective film after the production of a printed wiring board to achieve a rust preventive effect on a copper circuit portion. However, the preflux loses its function as a protective film due to a thermal history when heat treatment is performed a plurality of times by reflow soldering,
There are drawbacks such as deterioration of solderability and deterioration of cleaning property after soldering.
【０００５】また、プリント配線板の銅回路部分に溶融
はんだにより防錆皮膜を形成するソルダーコート処理法
も採用されている。しかしながら、この方法では、はん
だ膜厚のばらつきが大きいために、表面実装部品の装着
安定性が悪く、また、パッドのピッチが狭い場合には、
はんだ過剰となり、はんだブリッジを生じ易いという欠
点がある。更に、プリント配線板の反り、ねじれが大き
く、表面実装部品の自動装着がしにくく、またはんだに
より穴づまりが起こり易く、部品挿入がしにくいという
欠点もある。Further, a solder coat treatment method for forming an anticorrosive film on a copper circuit portion of a printed wiring board by molten solder is also adopted. However, in this method, the mounting stability of the surface mount component is poor due to the large variation in the solder film thickness, and when the pad pitch is narrow,
There is a drawback that solder becomes excessive and solder bridges are likely to occur. Further, the printed wiring board is largely warped and twisted, which makes it difficult to automatically mount surface-mounted components, or easily causes holes to be clogged, which makes it difficult to insert components.
【０００６】また、プリント配線板の銅回路部分にニッ
ケルめっき皮膜を形成し、更にこのニッケルめっき皮膜
上に膜厚０．０３〜０．０５μｍ程度の金めっき皮膜を
形成する防錆処理法も採用されている。しかしながら、
この方法では、リフローはんだ付け等により複数回熱処
理を行なうと、熱的履歴を経ることによってはんだ付け
性が劣化するという欠点がある。このようなはんだ付け
性の劣化は、金めっき皮膜の膜厚を更に厚くすることに
より防止できるが、コストの点から好ましくない。A rust preventive treatment method is also employed in which a nickel plating film is formed on a copper circuit portion of a printed wiring board, and a gold plating film having a film thickness of about 0.03 to 0.05 μm is further formed on the nickel plating film. Has been done. However,
This method has a drawback in that when heat treatment is performed a plurality of times by reflow soldering or the like, the solderability deteriorates due to a thermal history. Such deterioration of solderability can be prevented by increasing the thickness of the gold plating film, but this is not preferable from the viewpoint of cost.
【０００７】[0007]
【課題を解決するための手段】本発明者は、上記した如
き従来技術の課題に鑑みて、特に両面実装プリント配線
板に適用するために最適な銅回路保護方法を見出すべ
く、鋭意研究を重ねてきた。その結果、はんだ付けによ
り部品を装着すべき銅金属上に、パラジウムめっき皮膜
を形成したプリント配線板は、熱的履歴を経ることによ
るはんだ付け性の低下が非常に少なく、また、保護皮膜
の膜厚の均一性が優れていることにより、表面実装部品
の装着安定性が良好であり、更にはんだブリッジが生じ
ることもなく、特に高密度実装をするためのプリント配
線板として、有用性が高いことを見出した。本発明者
は、引き続き研究を重ねた結果、該パラジウムめっき皮
膜上に金めっき皮膜を形成する場合には、はんだ付け性
が更に改善されることを見出し、ここに本発明を完成す
るに至った。In view of the problems of the prior art as described above, the present inventor has earnestly studied to find an optimum copper circuit protection method particularly for application to a double-sided mounting printed wiring board. Came. As a result, a printed wiring board with a palladium plating film formed on a copper metal to which components are to be mounted by soldering has very little deterioration in solderability due to thermal history, and a protective film Due to its excellent thickness uniformity, the mounting stability of surface-mounted components is good, and solder bridges do not occur, which makes it particularly useful as a printed wiring board for high-density mounting. Found. As a result of repeated research, the present inventor has found that the solderability is further improved when a gold plating film is formed on the palladium plating film, and has completed the present invention here. ..
【０００８】即ち、本発明は、以下に示すプリント配線
板及びその製造法を提供するものである。That is, the present invention provides the following printed wiring board and its manufacturing method.
【０００９】１ 銅金属による導体回路を有するプリン
ト配線板において、少なくともはんだ付けにより部品装
着をすべき銅金属上に、パラジウムめっき皮膜及び金め
っき皮膜を順次形成してなるプリント配線板。1. A printed wiring board having a conductor circuit made of copper metal, in which a palladium plating film and a gold plating film are sequentially formed on at least a copper metal on which components are to be mounted by soldering.
【００１０】２ 銅金属による導体回路及びその上に形
成したソルダーレジストパターンを有するプリント配線
板の銅金属上に、無電解パラジウムめっき液を用いてパ
ラジウムめっき皮膜を形成し、次いで該パラジウムめっ
き皮膜上に無電解金めっき液を用いて金めっき皮膜を形
成することを特徴とするプリント配線板の製造法。2 A palladium plating film is formed on a copper metal of a printed circuit board having a conductor circuit made of copper metal and a solder resist pattern formed thereon by using an electroless palladium plating solution, and then on the palladium plating film. A method for manufacturing a printed wiring board, which comprises forming a gold plating film using an electroless gold plating solution.
【００１１】３ 銅金属による導体回路を有するプリン
ト配線板の銅金属上に、無電解パラジウムめっき液を用
いてパラジウムめっき皮膜を形成し、次いで該パラジウ
ムめっき皮膜上に無電解金めっき液を用いて金めっき皮
膜を形成した後、必要に応じて、ソルダーレジストパタ
ーンを形成することを特徴とするプリント配線板の製造
法。3 A palladium plating film is formed on a copper metal of a printed wiring board having a conductor circuit made of copper metal by using an electroless palladium plating solution, and then an electroless gold plating solution is used on the palladium plating film. A method for manufacturing a printed wiring board, which comprises forming a solder resist pattern as needed after forming a gold plating film.
【００１２】４ パターンめっき法又はセミアディティ
ブ法によるプリント配線板の製造法において、電気銅め
っきによりパターンめっきを行なった後、電気パラジウ
ムめっき液又は無電解パラジウムめっき液を用いて、銅
めっきによるパターン部分にパラジウムめっき皮膜を形
成し、該パラジウムめっき皮膜上に電気金めっき又は無
電解金めっき液を用いて金めっき皮膜を形成し、次いで
めっきレジストを剥離した後、銅金属のエッチングを行
ない、必要に応じて、ソルダーレジストパターンを形成
することを特徴とするプリント配線板の製造法。4 In a method of manufacturing a printed wiring board by a pattern plating method or a semi-additive method, after pattern plating is performed by electrolytic copper plating, an electrolytic palladium plating solution or electroless palladium plating solution is used to form a pattern portion by copper plating. To form a palladium plating film on the palladium plating film, to form a gold plating film on the palladium plating film using an electro gold plating or electroless gold plating solution, and then remove the plating resist, and then perform etching of copper metal, if necessary. Accordingly, a method for manufacturing a printed wiring board, which comprises forming a solder resist pattern.
【００１３】本発明のプリント配線板は、銅金属による
導体回路を有するプリント配線板において、少なくとも
はんだ付けにより部品装着すべき銅金属上に、パラジウ
ムめっき皮膜及び金めっき皮膜を順次形成したものであ
る。銅金属上へのパラジウムめっき皮膜及び金めっき皮
膜の形成方法としては、例えば以下に示す方法を採用す
ることができる。The printed wiring board of the present invention is a printed wiring board having a conductor circuit made of copper metal, in which a palladium plating film and a gold plating film are sequentially formed on at least copper metal to be mounted with components by soldering. .. As a method for forming the palladium plating film and the gold plating film on the copper metal, for example, the following method can be adopted.
【００１４】まず、第一の方法として、銅金属による導
体回路を形成したプリント配線板の銅金属上に、無電解
パラジウムめっきを施し、次いで無電解金めっきを施す
方法を挙げることができる。First, as a first method, there may be mentioned a method in which electroless palladium plating is performed on copper metal of a printed wiring board on which a conductor circuit made of copper metal is formed, and then electroless gold plating is performed.
【００１５】適用できるプリント配線板の種類は、銅金
属を導体回路とするものであれば特に限定はなく、基材
材料としては、公知の各種材料の基板、例えばガラスエ
ポキシ基板、紙フェノール基板、紙エポキシ基板等をい
ずれも採用できる。プリント配線板の導体回路形成方法
についても限定はなく、公知の各種方法、例えば、パネ
ルめっき法、パターンめっき法、セミアディティブ法、
フルアディティブ法、パートリーアディティブ法等のい
ずれの方法により回路を形成したものも使用できる。ま
た、プリント配線板の部品装着方法についても、特に限
定はなく、片面基板、両面基板、多層基板等のいずれの
装着方法の基板にも適用できるが、特に、両面表面実装
基板等の複数回はんだ付けを行なう基板に最適である。The type of the printed wiring board that can be applied is not particularly limited as long as it uses copper metal as a conductor circuit, and as the base material, various known substrates such as glass epoxy substrate, paper phenol substrate, Any paper epoxy board or the like can be adopted. The conductor circuit forming method of the printed wiring board is not limited, and various known methods such as panel plating method, pattern plating method, semi-additive method,
What formed the circuit by any method, such as a full additive method and a part additive method, can be used. The method of mounting the components on the printed wiring board is not particularly limited, and it can be applied to any mounting board such as a single-sided board, a double-sided board, and a multilayer board. Most suitable for the substrate to be attached.
【００１６】本発明で用いる無電解パラジウムめっき液
の種類については、特に限定はなく、公知の無電解パラ
ジウムめっき液をいずれも使用できる。無電解パラジウ
ムめっき液の具体例としては、特公平３−４１５４９号
公報に示されたａ）パラジウム化合物、ｂ）アンモニア
及びアミン化合物の少なくとも１種、ｃ）二価の硫黄を
含有する有機化合物、並びにｄ）次亜リン酸化合物及び
水素化ホウ素化合物の少なくとも１種、を含有する水溶
液からなる無電解パラジウムめっき液、特公平３−１３
８２号公報に記載されたａ）パラジウム化合物、ｂ）ア
ンモニア及びアミン化合物の少なくとも１種、ｃ）二価
の硫黄を含有する有機化合物、並びにｄ）亜リン酸及び
その塩類の少なくとも１種、を含む水溶液からなる無電
解パラジウムめっき液、などを挙げることができる。The type of the electroless palladium plating solution used in the present invention is not particularly limited, and any known electroless palladium plating solution can be used. Specific examples of the electroless palladium plating solution include a) a palladium compound disclosed in Japanese Patent Publication No. 3-41549, b) at least one of ammonia and an amine compound, and c) an organic compound containing divalent sulfur. And d) an electroless palladium plating solution comprising an aqueous solution containing at least one of a hypophosphorous acid compound and a borohydride compound, JP-B-3-13
No. 82, a) a palladium compound, b) at least one of ammonia and an amine compound, c) an organic compound containing divalent sulfur, and d) at least one of phosphorous acid and salts thereof. An electroless palladium plating solution composed of an aqueous solution containing the same can be mentioned.
【００１７】無電解パラジウムめっきの条件は、使用す
るめっき液の種類に応じて、通常のめっき条件と同様と
すればよい。The electroless palladium plating conditions may be the same as the usual plating conditions depending on the type of plating solution used.
【００１８】銅金属上に形成するパラジウム皮膜の厚さ
は、特に限定的ではないが、一般に、０．０１μｍ〜１
０μｍ程度とすることが適当である。パラジウム皮膜の
膜厚が０．０１μｍを下回ると、熱処理後のはんだ付け
性が低下するので、複数回はんだ付けを行なう場合には
好ましくなく、一方、１０μｍを上回る膜厚では、機能
上大きな問題はないが、コストの点から好ましくない。The thickness of the palladium film formed on the copper metal is not particularly limited, but generally 0.01 μm to 1
It is suitable to set it to about 0 μm. When the thickness of the palladium film is less than 0.01 μm, the solderability after heat treatment is deteriorated, which is not preferable when performing soldering a plurality of times. On the other hand, when the thickness exceeds 10 μm, a large functional problem occurs. No, but it is not preferable in terms of cost.
【００１９】無電解パラジウムめっきは、前記した様な
めっき液を用いて、銅金属上に、直接行なうことが可能
であるが、銅又は銅合金を選択的に活性化させる触媒液
を用いて、銅金属に触媒を付与した後、無電解パラジウ
ムめっきを行なうことが好ましく、これにより、パラジ
ウムめっきの初期析出までの時間を著るしく短縮するこ
とができる。この様な触媒液としては、公知のものをい
ずれも用いることができ、例えばＰＤＣ−１０（商標：
石原薬品（株）製）、ＩＣＰアクセラ（商標：奥野製薬
工業（株）製）等を例示できる。The electroless palladium plating can be carried out directly on the copper metal using the above-mentioned plating solution, but using a catalyst solution for selectively activating copper or copper alloy, After applying the catalyst to the copper metal, electroless palladium plating is preferably carried out, whereby the time until the initial deposition of palladium plating can be significantly shortened. As such a catalyst liquid, any known one can be used, and for example, PDC-10 (trademark:
Examples include Ishihara Yakuhin Co., Ltd.), ICP Axela (trademark: Okuno Chemical Industries Co., Ltd.), and the like.
【００２０】また、本発明方法では、必要に応じて、銅
金属とパラジウムめっき皮膜の間に無電解めっき法によ
り、他のめっき皮膜、例えばＮｉめっき皮膜等を形成し
てもよい。In the method of the present invention, another plating film, such as a Ni plating film, may be formed between the copper metal and the palladium plating film by an electroless plating method, if necessary.
【００２１】本発明で用いる無電解金めっき液の種類に
ついては、特に限定はなく、公知の無電解金めっき液を
いずれも使用できる。具体例としては、ａ）塩化金（II
I)酸ナトリウム、ｂ）亜硫酸ナトリウム、ｃ）チオ硫酸
ナトリウム、ｄ）塩化アンモニウム及びｅ）アスコルビ
ン酸ナトリウム、を含む水溶液からなる無電解金めっき
液、ａ）塩化金（III)酸カリウム及びｂ）水酸化カリウ
ム、を含む水溶液からなる無電解金めっき液、ａ）シア
ン化金カリウム、ｂ）シアン化カリウム、ｃ）水酸化カ
リウム及びｄ）ジメチルアミンボラン、を含む水溶液か
らなる無電解金めっき液等を挙げることができる。The type of electroless gold plating solution used in the present invention is not particularly limited, and any known electroless gold plating solution can be used. As a specific example, a) gold chloride (II
An electroless gold plating solution comprising an aqueous solution containing I) sodium acid, b) sodium sulfite, c) sodium thiosulfate, d) ammonium chloride and e) sodium ascorbate, a) potassium chloro (III) chloride and b) An electroless gold plating solution composed of an aqueous solution containing potassium hydroxide, an electroless gold plating solution composed of an aqueous solution containing a) potassium gold cyanide, b) potassium cyanide, c) potassium hydroxide and d) dimethylamine borane. Can be mentioned.
【００２２】無電解金めっきの条件は、使用するめっき
液の種類に応じて、通常のめっき条件と同様とすればよ
い。パラジウムめっき皮膜上に形成する金めっき皮膜の
厚さは、特に限定的ではないが、一般に、０．００１〜
０．０３μｍ程度とし、好ましくは０．００３〜０．０
１μｍ程度とする。金めっき皮膜の膜厚が０．００１μ
ｍを下回ると、パラジウムめっき皮膜単独の場合と比較
して、はんだ付け性改善の効果がほとんどなく、一方、
０．０３μｍを上回る膜厚では、機能上大きな問題はな
いがコストの点から好ましくない。The electroless gold plating conditions may be the same as the normal plating conditions depending on the type of plating solution used. The thickness of the gold plating film formed on the palladium plating film is not particularly limited, but is generally 0.001 to
0.03 μm, preferably 0.003 to 0.0
It is about 1 μm. Gold plating film thickness is 0.001μ
When it is less than m, there is almost no effect of improving the solderability as compared with the case of the palladium plating film alone.
When the film thickness exceeds 0.03 μm, there is no serious problem in terms of function, but it is not preferable in terms of cost.
【００２３】本発明プリント配線板における無電解パラ
ジウムめっき皮膜及び無電解金めっき皮膜を形成すべき
部分は、銅金属による導体回路のうちで、少なくともは
んだ付けすべき銅金属の部分であり、具体的には、表面
実装の場合にはパット部分、スルーホールを有する基板
では、ランド部分及びスルーホール部分である。その他
の銅金属による導体回路部分には、パラジウムメッキ皮
膜及び金めっき皮膜を形成しても良いが、コストの点か
らは好ましくない。従って、通常は、銅金属による導体
回路を形成した配線板に、ソルダーレジストパターンを
形成し、露出した銅金属部分にのみ無電解パラジウムめ
っき及び無電解金めっきを順次行なえばよい。この場
合、通常、常法に従ってソフトエッチングを行なって銅
の酸化物層を除去した後、無電解パラジウムめっき及び
無電解金めっきを行なうことが好ましい。ソフトエッチ
ングは、公知の各条件に従えば良く、例えば、過硫酸ア
ンモニウム１５０ｇ／ｌ程度の水溶液に３０℃程度で６
０秒間程度浸漬する方法、過硫酸ソーダ１５０ｇ／ｌ程
度の水溶液に３０℃程度で６０秒間程度浸漬する方法、
硫酸１１重量％及び過酸化水素３．８重量％を含有する
水溶液に、２０℃程度で６０秒間程度浸漬する方法など
を採用できる。また、ソルダーレジストパターンの形成
後に、無電解パラジウムめっき及び無電解金めっきを行
なう方法に限定されず、銅金属の導体回路を形成した配
線板の銅回路の全体に無電解パラジウムめっき及び無電
解金めっきを行なった後、ソルダーレジストによりレジ
ストパターンを形成してもよく、また、用途によっては
ソルダーレジストパターンを形成することなく用いるこ
ともできる。In the printed wiring board of the present invention, the part where the electroless palladium plating film and the electroless gold plating film are to be formed is at least the copper metal part to be soldered in the conductor circuit made of copper metal. In the case of surface mounting, a pad portion and a land portion and a through hole portion in a substrate having a through hole. A palladium plating film and a gold plating film may be formed on the conductor circuit portion made of other copper metal, but this is not preferable from the viewpoint of cost. Therefore, normally, a solder resist pattern may be formed on a wiring board having a conductor circuit made of copper metal, and electroless palladium plating and electroless gold plating may be sequentially performed only on the exposed copper metal portion. In this case, it is usually preferable to perform soft etching according to a conventional method to remove the copper oxide layer, and then perform electroless palladium plating and electroless gold plating. The soft etching may be carried out according to known conditions, for example, an aqueous solution of ammonium persulfate of about 150 g / l at about 30 ° C. for 6 hours.
Dipping for about 0 seconds, dipping in an aqueous solution of sodium persulfate of about 150 g / l at about 30 ° C. for about 60 seconds,
A method of immersing in an aqueous solution containing 11% by weight of sulfuric acid and 3.8% by weight of hydrogen peroxide at about 20 ° C. for about 60 seconds can be adopted. Further, the method is not limited to the method of performing electroless palladium plating and electroless gold plating after the formation of the solder resist pattern, and the electroless palladium plating and the electroless gold plating are applied to the entire copper circuit of the wiring board on which the conductor circuit of copper metal is formed. After plating, a resist pattern may be formed with a solder resist, or depending on the application, it may be used without forming the solder resist pattern.
【００２４】銅金属上へのパラジウムめっき皮膜及び金
めっき皮膜形成の第２の方法としては、いわゆるパター
ンめっき法又はセミアディティブ法によるプリント配線
板の製造法において、電気銅めっきによりパターンめっ
きを行なった後、電気パラジウムめっき液又は無電解パ
ラジウムめっき液を用いて、電気銅めっきパターン上に
パラジウムめっき皮膜を形成し、次いで、該パラジウム
めっき皮膜上に電気金めっき液又は無電解金めっき液を
用いて金めっき皮膜を形成し、その後めっきレジストを
剥離した後、パラジウムめっき皮膜及び金めっき皮膜を
エッチングレジストとして、不要な銅金属部分をエッチ
ングにより除去して、回路を形成することによって、銅
金属の導体回路上にパラジウムめっき皮膜及び金めっき
皮膜を順次形成したプリント配線板を得る方法を挙げる
ことができる。As a second method for forming a palladium plating film and a gold plating film on copper metal, pattern plating is performed by electrolytic copper plating in a so-called pattern plating method or a method of manufacturing a printed wiring board by a semi-additive method. After that, using an electric palladium plating solution or an electroless palladium plating solution, a palladium plating film is formed on the electrolytic copper plating pattern, and then using an electro gold plating solution or an electroless gold plating solution on the palladium plating film. After forming a gold plating film and then removing the plating resist, the palladium plating film and the gold plating film are used as etching resists to remove unnecessary copper metal parts by etching to form a circuit, thereby forming a copper metal conductor. Palladium plating film and gold plating film are sequentially formed on the circuit. And a method of obtaining a printed wiring board.
【００２５】この方法では、パラジウムめっき皮膜及び
金めっき皮膜を形成する工程を除いては、通常のパター
ンめっき法又はセミアディティブ法と同様とすればよ
い。例えばパターンめっき法における電気銅めっきによ
るパターンめっきは、例えば、ガラスエポキシ、ポリイ
ミド等に銅箔をはり付けた銅張積層板に穴あけした後、
化学銅めっきを行ない、次いで硫酸銅めっき、ピロリン
酸銅めっき等の電気銅めっきにより、全面めっきを行な
った後、ドライフィルム、スクリーン印刷等により、め
っきレジストパターンを形成し、次いで硫酸銅めっき等
により電気銅めっきパターンを形成することにより行な
うことができる。セミアディティブ法では、紙フェノー
ル、紙エポキシ、ガラスエポキシ等を基材として、ゴム
系接着剤等を用いた銅箔なしの接着剤付積層板に、穴あ
けを行ない、化学銅めっき、化学Ｎｉめっき等により全
面化学めっきを行ない、次いで、スクリーン印刷等によ
り、フォトレジストを用いてめっきレジストパターンを
形成した後、硫酸銅めっき液等を用いて、電気銅めっき
のパターンめっきを行なうことができる。This method may be the same as the ordinary pattern plating method or the semi-additive method except for the step of forming the palladium plating film and the gold plating film. For example, pattern plating by electrolytic copper plating in the pattern plating method is, for example, glass epoxy, after making a hole in a copper clad laminate in which a copper foil is pasted on polyimide or the like,
Chemical copper plating is performed, and then electrolytic copper plating such as copper sulfate plating and copper pyrophosphate plating is performed on the entire surface, and then a plating resist pattern is formed by dry film, screen printing, etc., and then copper sulfate plating is performed. This can be done by forming an electrolytic copper plating pattern. In the semi-additive method, using adhesive such as paper-phenol, paper-epoxy, glass-epoxy, etc., without copper foil, using rubber-based adhesive, etc., holes are punched, chemical copper plating, chemical Ni plating, etc. Then, chemical plating is performed on the entire surface, and then a plating resist pattern is formed using a photoresist by screen printing or the like, and then pattern plating of electrolytic copper plating can be performed using a copper sulfate plating solution or the like.
【００２６】電気銅めっきによるパターン部分に、パラ
ジウムめっき皮膜を形成するためのパラジウムめっき液
としては、公知の無電解パラジウムめっき液及び電気パ
ラジウムめっき液をいずれも用いることができる。無電
解パラジウムめっき液としては、例えば前記したものと
同様のものが使用できる。電気パラジウムめっき液も特
に限定はなく、公知のものを通常のめっき条件と同様の
条件で用いればよい。無電解パラジウムめっきを行なう
場合には、前記方法と同様に、銅又は銅合金を選択的に
活性化する触媒液を用いて、銅金属に触媒を付与した
後、めっきを行なうことによって、初期析出時間を短縮
させることが好ましい。As the palladium plating solution for forming the palladium plating film on the pattern portion formed by electrolytic copper plating, both known electroless palladium plating solution and electrolytic palladium plating solution can be used. As the electroless palladium plating solution, for example, the same ones as described above can be used. The electropalladium plating solution is also not particularly limited, and known ones may be used under the same conditions as normal plating conditions. In the case of performing electroless palladium plating, similarly to the above method, a catalyst solution that selectively activates copper or a copper alloy is used to apply a catalyst to copper metal, and then plating is performed to perform initial deposition. It is preferable to shorten the time.
【００２７】また、必要に応じて、銅金属とパラジウム
めっき皮膜の間に、電気めっき法または無電解めっき法
により、他のめっき皮膜、例えばＮｉめっき皮膜等を形
成することもできる。If desired, another plating film such as a Ni plating film may be formed between the copper metal and the palladium plating film by electroplating or electroless plating.
【００２８】パラジウムめっき皮膜の膜厚は、特に限定
されるものではなく、導体回路形成に不要な銅部分をエ
ッチングする際のエッチングレジストとしての働きと、
回路形成後の部品実装時における銅回路部分の保護の働
きの両方に基づいて決める必要があり、通常は、無電解
パラジウムめっきによる場合には、０．１μｍ程度以
上、電気パラジウムめっきによる場合には、０．２μｍ
程度以上とすればよい。膜厚の上限は、特に限定はない
が、コストの点からは、１０μｍ程度以下とすることが
好ましい。また、パラジウムめっき皮膜の下地として、
Ｎｉめっき皮膜を形成する場合には、無電解パラジウム
めっき皮膜は、０．０５μｍ程度以上、電気パラジウム
めっき皮膜は、０．１μｍ程度以上の膜厚とすればよ
い。The film thickness of the palladium plating film is not particularly limited, and functions as an etching resist when etching a copper portion unnecessary for forming a conductor circuit,
It is necessary to decide on the basis of both the protection function of the copper circuit part at the time of mounting components after the circuit is formed. Usually, in the case of electroless palladium plating, it is about 0.1 μm or more, and in the case of electrolytic palladium plating, it is usually necessary. , 0.2 μm
It may be about a certain level or more. The upper limit of the film thickness is not particularly limited, but from the viewpoint of cost, it is preferably about 10 μm or less. Also, as the base of the palladium plating film,
When forming the Ni plating film, the electroless palladium plating film may have a thickness of about 0.05 μm or more, and the electropalladium plating film may have a film thickness of about 0.1 μm or more.
【００２９】パラジウムめっき皮膜上に、金めっき皮膜
を形成するために用いる金めっき液としては、公知の無
電解金めっき液及び電気金めっき液をいずれも用いるこ
とができる。無電解金めっき液としては、例えば前記し
たものと同様のものが使用できる。電気金めっき液も特
に限定はなく、公知のものを通常のめっき条件と同様の
条件で用いればよい。As the gold plating solution used for forming the gold plating film on the palladium plating film, both known electroless gold plating solution and electric gold plating solution can be used. As the electroless gold plating solution, for example, the same ones as described above can be used. The electrogold plating solution is also not particularly limited, and known ones may be used under the same conditions as normal plating conditions.
【００３０】金めっき皮膜の膜厚は、特に限定されるも
のではないが、第一の方法と同様に、０．００１〜０．
０３μｍ程度とし、好ましくは０．００３〜０．０１μ
ｍ程度とする。金めっき皮膜は、エッチングレジストと
しての働きを目的としたものではなく、回路形成後の部
品実装時において、特に、複数回熱処理を行なう際に、
そのはんだ付け性をパラジウムめっき皮膜単独の場合よ
り、更に改良することを目的としたものである。The film thickness of the gold plating film is not particularly limited, but 0.001 to 0.
It is about 03 μm, preferably 0.003 to 0.01 μm
It is about m. The gold plating film is not intended to act as an etching resist, and is used when mounting components after circuit formation, especially when performing heat treatment a plurality of times.
It is intended to further improve its solderability as compared with the case of using a palladium plating film alone.
【００３１】パラジウムめっき皮膜及び金めっき皮膜を
順次形成した後、常法に従ってめっきレジストを剥離
し、次いでパラジウムめっき皮膜及び金めっき皮膜をエ
ッチングレジストとして、不要な銅金属をエッチングに
より除去して導体回路を形成することによって、銅金属
による導体回路上にパラジウムめっき皮膜及び金めっき
皮膜を順次形成したプリント配線板を得ることができ
る。After the palladium plating film and the gold plating film are sequentially formed, the plating resist is peeled off by a conventional method, and then the palladium plating film and the gold plating film are used as etching resists to remove unnecessary copper metal by etching to form a conductor circuit. By forming the above, it is possible to obtain a printed wiring board in which a palladium plating film and a gold plating film are sequentially formed on a conductor circuit made of copper metal.
【００３２】上記した方法で得られたプリント配線板
は、更に必要に応じて、引き続き、常法に従って、ソル
ダーレジストパターンの形成等を行なえばよい。ソルダ
ーレジストパターンは、公知のレジスト材料を用いて、
写真法、スクリーン印刷等により形成できる。The printed wiring board obtained by the above-mentioned method may be further subjected to the formation of a solder resist pattern and the like according to a conventional method, if necessary. The solder resist pattern uses a known resist material,
It can be formed by a photographic method, screen printing or the like.
【００３３】以上示した各方法によって、銅金属による
導体回路を有するプリント配線板において、少なくとも
はんだ付けにより部品装着をすべき銅金属上にパラジウ
ムめっき皮膜及び金めっき皮膜を順次形成したプリント
配線板を得ることができる。このプリント配線板の文字
印刷、外形加工等は常法に従って行なえばよい。According to each of the methods described above, a printed wiring board having a conductor circuit made of copper metal, in which a palladium plating film and a gold plating film are sequentially formed on at least a copper metal on which components are to be mounted by soldering, is provided. Obtainable. Character printing, outer shape processing, and the like of this printed wiring board may be performed according to a conventional method.
【００３４】本発明のプリント配線板では、はんだ付け
により部品装着をすべき銅金属上に限らず、例えば、端
子部分、ボンディングパット部分等にも同様にパラジウ
ムめっき皮膜及び金めっき皮膜を形成してもよい。ま
た、パラジウムめっき皮膜及び金めっき皮膜を形成する
前又は後の適当な時期に、必要に応じて、端子部分、ボ
ンディングパット部分等に、金めっき皮膜、ロジウムめ
っき皮膜等の貴金属めっき皮膜を形成することもでき
る。この場合には、通常、ニッケルめっき等を下地めっ
きとするが、パラジウムめっき皮膜上に貴金属めっき皮
膜等を形成してもよい。また、端子部分、ボンディング
パット部分等にパラジウムめっき皮膜及び金めっき皮膜
を形成した後、これを剥離して、ニッケルめっき及び貴
金属めっきを行なってもよい。これらの場合の各めっき
厚は常法にしたがって決定すればよい。In the printed wiring board of the present invention, the palladium plating film and the gold plating film are similarly formed not only on the copper metal on which the components are to be mounted by soldering but also on the terminal portion, the bonding pad portion and the like. Good. In addition, before or after forming the palladium plating film and the gold plating film, if necessary, a noble metal plating film such as a gold plating film or a rhodium plating film is formed on the terminal portion, the bonding pad portion, etc. You can also In this case, nickel plating or the like is usually used as the base plating, but a noble metal plating film or the like may be formed on the palladium plating film. In addition, after forming the palladium plating film and the gold plating film on the terminal portion, the bonding pad portion, etc., they may be peeled off and nickel plating and noble metal plating may be performed. The thickness of each plating in these cases may be determined according to a conventional method.
【００３５】本発明プリント配線板に部品を装着するた
めには、通常の部品装着法をいずれも採用でき、例え
ば、ディスクリート部品の挿入実装による片面実装、表
面はディスクリート部品の挿入実装、裏面はチップ部品
の表面実装による両面実装、表面はディスクリート部品
の挿入実装とチップ部品の表面実装、裏面はチップ部品
の表面実装による両面実装、両面にチップ部品を表面実
装する両面実装、等の各種の方法を採用でき、これらは
公知の方法に従って行なえばよい。In order to mount the component on the printed wiring board of the present invention, any of the usual component mounting methods can be adopted. For example, one side mounting by discrete mounting of the discrete component, insertion mounting of the discrete component on the front side, and chip mounting on the back side. Various methods such as double-sided mounting by surface mounting of components, surface mounting of discrete components and surface mounting of chip components on the front side, double-sided mounting by surface mounting of chip components on the back side, double-sided mounting surface mounting of chip components on both sides, etc. It can be adopted, and these may be performed according to a known method.
【００３６】[0036]
【発明の効果】本発明のプリント配線板は、パラジウム
めっき皮膜及び金めっき皮膜による銅回路の保護皮膜を
有するものであり、部品装着時にはんだ付け等によって
複数回加熱される場合にも、銅回路を有効に保護し、は
んだ付け性の劣化、はんだ付け後の洗浄性の低下などを
生じることがない。また、パラジウムめっき皮膜及び金
めっき皮膜の膜厚のばらつきが小さいために、表面実装
部品の装着安定性が良く、また、スルーホールの穴づま
りの発生や回路の短絡が生じることもない。また、パラ
ジウムめっき皮膜及び金めっき皮膜を銅金属の保護膜だ
けでなく銅金属のエッチングレジストとしても用いる方
法では、エッチングレジストの剥離工程が省略できる点
で有利である。The printed wiring board of the present invention has a protective film for a copper circuit formed by a palladium plating film and a gold plating film, and even when the printed circuit board is heated a plurality of times by soldering etc. when mounting components, the copper circuit Is effectively protected, and deterioration of solderability and deterioration of cleaning performance after soldering do not occur. Further, since the variation in the film thickness of the palladium plating film and the thickness of the gold plating film is small, the mounting stability of the surface mount component is good, and the clogging of the through hole and the short circuit of the circuit do not occur. Further, the method of using the palladium plating film and the gold plating film not only as the protective film of copper metal but also as the etching resist of copper metal is advantageous in that the step of removing the etching resist can be omitted.
【００３７】本発明のプリント配線板は上記した様な優
れた特徴を有するものであり、特に部品装着時にはんだ
付け、接着剤硬化などにより複数回熱処理を行なう高密
度実装用プリント配線板において、銅金属の酸化による
はんだ付け性の低下を有効に防止できる点において非常
に有用性が高い。The printed wiring board of the present invention has the excellent characteristics as described above. Particularly, in the printed wiring board for high-density mounting, which is heat-treated a plurality of times by soldering, hardening of an adhesive, etc. when mounting components, copper It is extremely useful in that it can effectively prevent deterioration of solderability due to metal oxidation.
【００３８】[0038]
【実施例】以下、実施例を挙げて本発明を更に詳細に説
明する。実施例において用いたパラジウムめっき液及び
金めっき液の組成、並びにめっき条件は以下の通りであ
る。EXAMPLES The present invention will be described in more detail with reference to examples. The compositions of the palladium plating solution and the gold plating solution used in the examples and the plating conditions are as follows.
【００３９】無電解パラジウムめっき液(1) 塩化パラジウム ０．０１モル／ｌ エチレンジアミン ０．０８モル／ｌ チオジグリコール酸 ２０mg／ｌ 次亜リン酸ソーダ ０．０６モル／ｌ ｐＨ ８ 液温 ６０℃ 電気パラジウムめっき液(2) 塩化パラジウムアンモニウム ６．２５ｇ／ｌ 塩化アンモニウム １０ｇ／ｌ ｐＨ ０．３ 液温 ２５℃ Ｄｋ ０．５A/dm2 無電解金めっき液(3) 塩化金（III)酸ナトリウム ０．０１モル／ｌ 亜硫酸ナトリウム ０．２モル／ｌ チオ硫酸ナトリウム ０．１モル／ｌ 塩化アンモニウム ０．１モル／ｌ アスコルビン酸ナトリウム ０．１モル／ｌ ｐＨ ６ 液温 ６０℃ 撹拌 マグネチックスターラ
ー 電気金めっき液(4) 塩化金（III)酸ナトリウム ３ｇ／ｌ フェロシアン化カリウム １５ｇ／ｌ 炭酸ナトリウム １５ｇ／ｌ ｐＨ ６ 液温 ６０℃ Ｄｋ ０．５A/dm2 Electroless palladium plating solution (1) Palladium chloride 0.01 mol / l Ethylenediamine 0.08 mol / l Thiodiglycolic acid 20 mg / l Sodium hypophosphite 0.06 mol / l pH 8 Liquid temperature 60 ° C. Electro Palladium Plating Solution (2) Palladium Ammonium Chloride 6.25g / l Ammonium Chloride 10g / l pH 0.3 Liquid Temperature 25 ° C Dk 0.5A / dm 2 Electroless Gold Plating Solution (3) Sodium Chloride Gold (III) Acid 0.01 mol / l sodium sulfite 0.2 mol / l sodium thiosulfate 0.1 mol / l ammonium chloride 0.1 mol / l sodium ascorbate 0.1 mol / l pH 6 liquid temperature 60 ° C. stirring magnetic stirrer Electrogold plating solution (4) Sodium chloro (III) chloride 3g / l Potassium ferrocyanide 15g / l Sodium carbonate 15g / l pH 6 Liquid temperature 60 ℃ Dk 0.5A / dm 2
【００４０】[0040]
【実施例１】以下の方法で、銅板上にパラジウムめっき
皮膜及び金めっき皮膜を形成した試験片について、加熱
処理によるはんだ付け性の変化を調べた。Example 1 With respect to a test piece having a palladium plating film and a gold plating film formed on a copper plate by the following method, the change in solderability by heat treatment was examined.
【００４１】圧延銅板（２５×２５×０．３mm）に、電
解脱脂、酸洗、電気銅めっき（２５μｍ）、ソフトエッ
チング及び酸洗の各処理を行なった後、触媒液（ＰＤＣ
−１０（商標：石原薬品（株）製）２００ｍｌ／ｌ水溶
液）中に、３０℃で１分間浸漬して触媒を付与した。次
いで、無電解パラジウムめっき液(1) を用いて０．１μ
ｍのパラジウムめっき皮膜を形成し、該パラジウムめっ
き皮膜上に無電解金めっき液(3) を用いて０．００５μ
ｍの金めっき皮膜を形成した後、水洗し乾燥した。これ
らを試験片として、２３０℃で３０分の加熱又は２５０
℃で３０分の加熱を行ない、加熱前及び加熱後のはんだ
付け性を調べた。比較として、金めっきを行なっていな
い試料、及び上記と同様の工程で触媒付与後、無電解ニ
ッケルめっき皮膜（２μｍ）を形成し、更に該ニッケル
めっき皮膜上に無電解金めっき液(3) を用いて、０．０
０５μｍ、０．０５μｍ、０．１μｍ又は０．３μｍの
金めっき皮膜を形成した試験片についても同様にはんだ
付け性を調べた。試験方法は次の通りである。結果を下
記表１に示す。A rolled copper plate (25 × 25 × 0.3 mm) was subjected to electrolytic degreasing, pickling, electrolytic copper plating (25 μm), soft etching and pickling, and then a catalyst solution (PDC).
The catalyst was applied by immersing it in -10 (trademark: manufactured by Ishihara Yakuhin Co., Ltd.) 200 ml / l aqueous solution at 30 ° C. for 1 minute. Next, using the electroless palladium plating solution (1),
m palladium plating film is formed, and 0.005μ is formed on the palladium plating film by using the electroless gold plating solution (3).
After forming the gold plating film of m, it was washed with water and dried. Using these as test pieces, heat at 230 ° C for 30 minutes or 250
Heating at 30 ° C. was performed for 30 minutes, and the solderability before and after heating was examined. As a comparison, a sample not subjected to gold plating, and after applying a catalyst in the same process as above, an electroless nickel plating film (2 μm) was formed, and an electroless gold plating solution (3) was further formed on the nickel plating film. Use 0.0
The solderability of the test piece on which a gold plating film of 05 μm, 0.05 μm, 0.1 μm or 0.3 μm was formed was similarly examined. The test method is as follows. The results are shown in Table 1 below.
【００４２】＊はんだ付け性試験 ＪＩＳ規格 Ｚ ３１９７（１９８６）の広がり試験を
簡易化した以下の方法で、はんだペースト広がり試験を
行なった。* Solderability Test A solder paste spread test was carried out by the following method which simplified the spread test of JIS standard Z 3197 (1986).
【００４３】(a) はんだペースト試料：約０．０４〜
０．０５ｇのケスターソルダー製 Ｒ−２２９−２５
ＲＭＡタイプのはんだペースト ハロゲン（ペースト中）＜０．０１５ｗｔ．％ 遊離ハロゲン（ペースト中）＜０．００２ｗｔ．％ (b) 試験方法：試験片の上にはんだペーストをのせて、
試験片ごと２３０℃に加温したはんだポット中に浮か
せ、３０秒間融解してはんだペーストを試験片上に広が
らせた。次いで常温に放置して冷却した後、イソプロピ
ルアルコールを用いてフラックス残留物を取り除き、マ
イクロメータを用いてはんだ高さを測定し、下式より広
がり率を計算した。(A) Solder paste sample: about 0.04 to
0.05 g of Kester Solder R-229-25
RMA type solder paste Halogen (in paste) <0.015 wt. % Free halogen (in paste) <0.002 wt. % (B) Test method: Place solder paste on the test piece,
The whole test piece was floated in a solder pot heated to 230 ° C. and melted for 30 seconds to spread the solder paste on the test piece. Then, after leaving it at room temperature for cooling, the flux residue was removed using isopropyl alcohol, the solder height was measured using a micrometer, and the spread rate was calculated from the following formula.
【００４４】広がり率（％）＝１００×（Ｄ−Ｈ）／Ｄ Ｈ：広がったはんだの高さ（ｍｍ） Ｄ：試験に用いたはんだを球と見なした場合の直径（ｍ
ｍ） Ｄ＝１．２４Ｖ1/3 Ｖ：質量／比重 以上の試験方法では、広がり率が大きいほどはんだのぬ
れ性が良く、はんだ付け性が良好といえる。Spread ratio (%) = 100 × (D−H) / D H: Height of spread solder (mm) D: Diameter of solder used in the test as a sphere (m
m) D = 1.24V 1/3 V: mass / specific gravity In the above test method, the larger the spreading ratio, the better the solder wettability and the better the solderability.
【００４５】[0045]
【表１】 [Table 1]
【００４６】以上の結果から、銅金属上にパラジウムめ
っき皮膜及び金めっき皮膜を順次形成した場合に、熱処
理によるはんだ付け性の低下が少ないことがわかる。From the above results, it can be seen that when the palladium plating film and the gold plating film are sequentially formed on the copper metal, the solderability is less deteriorated by the heat treatment.
【００４７】[0047]
【実施例２】実施例１と同様の方法で無電解パラシウム
めっき液(1) を用いて０．００５〜１０μｍの間の各種
膜厚のパラジウムめっき皮膜を形成し、更に該パラジウ
ムめっき皮膜上に無電解金めっき液(3) を用いて、０．
０００５〜３μｍの間の各種膜厚の金めっき皮膜を形成
した。Example 2 A palladium plating film having various thicknesses of 0.005 to 10 μm was formed using the electroless palladium plating solution (1) in the same manner as in Example 1, and further formed on the palladium plating film. Using electroless gold plating solution (3),
Gold plating films with various thicknesses between 0005 and 3 μm were formed.
【００４８】実施例１と同様にして、熱処理前後のはん
だ付け性を調べた結果を下記表２に示す。The results of examining the solderability before and after the heat treatment in the same manner as in Example 1 are shown in Table 2 below.
【００４９】[0049]
【表２】 [Table 2]
【００５０】以上の結果から、０．０１μｍ以上のパラ
ジウムめっき皮膜を形成し、更に該パラジウムめっき皮
膜上に０．００１μｍ以上の金めっき皮膜を形成した場
合に、熱処理によるはんだ付け性の低下が少ないことが
わかる。From the above results, when a palladium plating film having a thickness of 0.01 μm or more is formed and a gold plating film having a thickness of 0.001 μm or more is further formed on the palladium plating film, the solderability is less deteriorated by heat treatment. I understand.
【００５１】[0051]
【実施例３】ガラスエポキシ銅張積層板に穴あけをし、
無電解銅めっき、電気銅めっきを行なった後、エッチン
グレジスト層を形成し、次いで、エッチング、エッチン
グレジスト層剥離、ソルダーレジスト印刷、文字印刷、
外形加工の工程を経て得られた両面表面実装部品と片面
挿入型部品の混在実装用の１００×１７０×１６mmの銅
めっきスルーホールプリント配線板５０枚について、以
下の処理を行なった。プリント配線板を浸漬脱脂、酸洗
した後、ソフトエッチングを行ない、次いで酸洗後、触
媒を付与し、無電解パラジウムめっき液(1) を用いて、
膜厚０．１μｍのパラジウムめっき皮膜を形成し、該パ
ラジウムめっき皮膜上に無電解金めっき液(3) を用いて
膜厚０．００５μｍの金めっき皮膜を形成し、水洗乾燥
した。Example 3 A hole was punched in a glass epoxy copper clad laminate,
After performing electroless copper plating and electrolytic copper plating, an etching resist layer is formed, and then etching, etching resist layer peeling, solder resist printing, character printing,
The following treatment was performed on 50 100 × 170 × 16 mm copper-plated through-hole printed wiring boards for mixed mounting of double-sided surface mounting components and single-sided insertion type components obtained through the outer shape processing step. After immersion degreasing and pickling of the printed wiring board, soft etching is performed, then pickling, and then applying a catalyst, using the electroless palladium plating solution (1),
A palladium plating film having a film thickness of 0.1 μm was formed, a gold plating film having a film thickness of 0.005 μm was formed on the palladium plating film using the electroless gold plating solution (3), washed with water and dried.
【００５２】このプリント配線板の片面について、はん
だペーストをパット上に印刷し、表面実装部品を搭載し
た後、全面加熱リフローソルダリングにより、はんだ付
けし、次に、他方の面にも同様に、表面実装部品をリフ
ローソルダリングによりはんだ付けした後、挿入型部品
を手はんだ付けにより接合した。５０枚のプリント配線
板の全箇所において、良好なはんだ付け接合が得られ、
不良率は０％であった。On one surface of this printed wiring board, solder paste was printed on the pad, surface-mounted components were mounted, and then soldering was carried out by full-heat reflow soldering, and then the other surface was similarly subjected. After the surface mount components were soldered by reflow soldering, the insert type components were joined by hand soldering. Good solder joints were obtained at all locations on the 50 printed wiring boards.
The defective rate was 0%.
【００５３】[0053]
【実施例４】１００×１７０×１６mmのガラスエポキシ
銅張積層板を用い、下記の工程で両面表面実装部品と片
面挿入型部品の混在実装用プリント配線板を作製した。Example 4 A printed wiring board for mixed mounting of double-sided surface mounting components and single-sided insertion type components was manufactured by using the glass epoxy copper clad laminate of 100 × 170 × 16 mm in the following steps.
【００５４】銅張積層板に穴あけを行ない、無電解銅め
っき（０．５μｍ）、電気銅めっき（１０μｍ）を行な
った後、めっきレジスト層を形成し、次いで、電気銅め
っきによりパターンめっき（２０μｍ）を行なった。次
いで、下記処理法Ａ〜Ｌの各方法で各種の膜厚のパラジ
ウムめっき皮膜を形成し、該パラジウムめっき皮膜上に
０．００５μｍの金めっき皮膜を形成した。触媒付与は
実施例１と同様にした。After drilling holes in the copper clad laminate and performing electroless copper plating (0.5 μm) and electrolytic copper plating (10 μm), a plating resist layer is formed and then pattern plating (20 μm) is performed by electrolytic copper plating. ) Was performed. Then, a palladium plating film having various thicknesses was formed by each of the following treatment methods A to L, and a 0.005 μm gold plating film was formed on the palladium plating film. The catalyst was applied in the same manner as in Example 1.
【００５５】Ａ：触媒付与→パラジウムめっき(1) →金
めっき(3) →乾燥 Ｂ：触媒付与→パラジウムめっき(1) →金めっき(4) →
乾燥 Ｃ：触媒付与→無電解Ｎｉめっき（２μｍ）→パラジウ
ムめっき(1) →金めっき(3) →乾燥 Ｄ：触媒付与→無電解Ｎｉめっき（２μｍ）→パラジウ
ムめっき(1) →金めっき(4) →乾燥 Ｅ：電気Ｎｉめっき（２μｍ）→パラジウムめっき(1)
→金めっき(3) →乾燥 Ｆ：電気Ｎｉめっき（２μｍ）→パラジウムめっき(1)
→金めっき(4) →乾燥 Ｇ：パラジウムめっき(2) →金めっき(3) →乾燥 Ｈ：パラジウムめっき(2) →金めっき(4) →乾燥 Ｉ：触媒付与→無電解Ｎｉめっき（２μｍ）→パラジウ
ムめっき(2) →金めっき(3) →乾燥 Ｊ：触媒付与→無電解Ｎｉめっき（２μｍ）→パラジウ
ムめっき(2) →金めっき(4) →乾燥 Ｋ：電気Ｎｉめっき（２μｍ）→パラジウムめっき(2)
→金めっき(3) →乾燥 Ｌ：電気Ｎｉめっき（２μｍ）→パラジウムめっき(2)
→金めっき(4) →乾燥 上記した各処理法でパラジウムめっき皮膜及び金めっき
皮膜を形成した後、めっきレジスト剥離、エッチングに
よる不要な銅部分の除去、ソルダーレジスト印刷、文字
印刷及び外形加工を順次行なうことによって、プリント
配線板を得た。A: catalyst application → palladium plating (1) → gold plating (3) → drying B: catalyst application → palladium plating (1) → gold plating (4) →
Dry C: catalyst applied → electroless Ni plating (2 μm) → palladium plating (1) → gold plating (3) → dry D: catalyst applied → electroless Ni plating (2 μm) → palladium plating (1) → gold plating (4 ) → Drying E: Electric Ni plating (2 μm) → Palladium plating (1)
→ Gold plating (3) → Dry F: Electric Ni plating (2μm) → Palladium plating (1)
→ Gold plating (4) → Dry G: Palladium plating (2) → Gold plating (3) → Dry H: Palladium plating (2) → Gold plating (4) → Dry I: Add catalyst → Electroless Ni plating (2 μm) → Palladium plating (2) → Gold plating (3) → Dry J: Apply catalyst → Electroless Ni plating (2 μm) → Palladium plating (2) → Gold plating (4) → Dry K: Electric Ni plating (2 μm) → Palladium Plating (2)
→ Gold plating (3) → Dry L: Electric Ni plating (2μm) → Palladium plating (2)
→ Gold plating (4) → Drying After forming the palladium plating film and the gold plating film by each of the above treatment methods, the plating resist is peeled off, unnecessary copper parts are removed by etching, solder resist printing, character printing and external processing are performed in sequence. A printed wiring board was obtained by carrying out.
【００５６】このプリント配線板を用いて、実施例３と
同様にして、片面に表面実装部品をはんだ付けし、他方
の面に表面実装部品と挿入型部品をはんだ付けした。Using this printed wiring board, in the same manner as in Example 3, surface mount components were soldered on one side and surface mount components and insertion type components were soldered on the other side.
【００５７】各処理法において、パラジウムめっき皮膜
の膜厚を変化させて、銅金属のエッチング時におけるパ
ターン部、スルホール部における腐食の発生の有無、及
び実装部品のはんだ付けにおける接合不良の有無を調べ
た。結果を表３に示す。In each processing method, the thickness of the palladium plating film was changed to check whether corrosion occurred in the pattern portion and through hole portion during etching of copper metal, and whether there was a joint failure during soldering of mounted components. It was The results are shown in Table 3.
【００５８】[0058]
【表３】 [Table 3]
【００５９】以上の結果から判るように、銅金属上に直
接パラジウム皮膜を形成する場合には、無電解パラジウ
ムめっき液では０．１μｍ以上、電気パラジウムめっき
液では０．２μｍ以上の膜厚でエッチング時の腐食やは
んだ付けにおける接合不良を防止できる。また、ニッケ
ルめっきによる下地めっきを行なう場合には、無電解パ
ラジウムめっき液では、０．０５μｍ以上、電気パラジ
ウムめっき液では、０．１μｍ以上の膜厚のパラジウム
めっき皮膜を形成すればよい。As can be seen from the above results, when the palladium film is directly formed on the copper metal, the electroless palladium plating solution has a thickness of 0.1 μm or more and the electropalladium plating solution has a thickness of 0.2 μm or more. It is possible to prevent corrosion at the time of joining and defective joining during soldering. When nickel-based undercoating is performed, a palladium plating film having a thickness of 0.05 μm or more may be formed with an electroless palladium plating solution, and a thickness of 0.1 μm or more may be formed with an electropalladium plating solution.
フロントページの続き (72)発明者 縄舟 秀美 大阪府高槻市真上町５丁目38−34 (72)発明者 水本 省三 兵庫県神戸市灘区大土平町２丁目４−９Continued Front Page (72) Hidemi Nawafune, 5-chome, Makamicho, Takatsuki City, Osaka Prefecture 38-34 (72) Inventor Shozo Mizumoto, 2-4-9, Ochidairacho, Nada-ku, Kobe City, Hyogo Prefecture
Claims (5)
線板において、少なくともはんだ付けにより部品装着を
すべき銅金属上に、パラジウムめっき皮膜及び金めっき
皮膜を順次形成してなるプリント配線板。1. A printed wiring board having a conductor circuit made of copper metal, in which a palladium plating film and a gold plating film are sequentially formed on at least copper metal on which components are to be mounted by soldering.
３μｍである請求項１に記載のプリント配線板。2. The thickness of the gold plating film is 0.001 to 0.0.
The printed wiring board according to claim 1, which has a thickness of 3 μm.
たソルダーレジストパターンを有するプリント配線板の
銅金属上に、無電解パラジウムめっき液を用いてパラジ
ウムめっき皮膜を形成し、次いで該パラジウムめっき皮
膜上に無電解金めっき液を用いて金めっき皮膜を形成す
ることを特徴とするプリント配線板の製造法。3. A palladium plating film is formed on a copper metal of a printed circuit board having a conductor circuit made of copper metal and a solder resist pattern formed thereon by using an electroless palladium plating solution, and then the palladium plating film is formed. A method for manufacturing a printed wiring board, characterized in that a gold plating film is formed on the top using an electroless gold plating solution.
線板の銅金属上に、無電解パラジウムめっき液を用いて
パラジウムめっき皮膜を形成し、次いで該パラジウムめ
っき皮膜上に無電解金めっき液を用いて金めっき皮膜を
形成した後、必要に応じて、ソルダーレジストパターン
を形成することを特徴とするプリント配線板の製造法。4. A palladium plating film is formed on a copper metal of a printed wiring board having a conductor circuit made of copper metal by using an electroless palladium plating solution, and then an electroless gold plating solution is used on the palladium plating film. A method for manufacturing a printed wiring board, which comprises forming a solder plating pattern as needed after the gold plating film is formed by the method.
によるプリント配線板の製造法において、電気銅めっき
によりパターンめっきを行なった後、電気パラジウムめ
っき液又は無電解パラジウムめっき液を用いて、銅めっ
きによるパターン部分にパラジウムめっき皮膜を形成
し、該パラジウムめっき皮膜上に電気金めっき又は無電
解金めっき液を用いて金めっき皮膜を形成し、次いでめ
っきレジストを剥離した後、銅金属のエッチングを行な
い、必要に応じて、ソルダーレジストパターンを形成す
ることを特徴とするプリント配線板の製造法。5. A method for manufacturing a printed wiring board by a pattern plating method or a semi-additive method, which comprises performing pattern plating by electrolytic copper plating and then patterning by copper plating using an electrolytic palladium plating solution or an electroless palladium plating solution. Form a palladium plating film on the part, form a gold plating film on the palladium plating film using an electro gold plating or an electroless gold plating solution, and then remove the plating resist, and then perform etching of copper metal, which is necessary. A method for manufacturing a printed wiring board, which comprises forming a solder resist pattern in accordance with the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12443792A JPH05327187A (en) | 1992-05-18 | 1992-05-18 | Printed circuit board and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12443792A JPH05327187A (en) | 1992-05-18 | 1992-05-18 | Printed circuit board and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05327187A true JPH05327187A (en) | 1993-12-10 |
Family
ID=14885476
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12443792A Pending JPH05327187A (en) | 1992-05-18 | 1992-05-18 | Printed circuit board and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05327187A (en) |
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| EP0884935A3 (en) * | 1997-06-11 | 2000-03-08 | International Business Machines Corporation | Universal surface finish for DCA SMT, and pad on pad interconnections |
| JP2002353375A (en) * | 2001-05-25 | 2002-12-06 | Kyocera Corp | Wiring board |
| JP2007016283A (en) * | 2005-07-08 | 2007-01-25 | C Uyemura & Co Ltd | Direct plating method and palladium conductive body layer forming solution |
| WO2010004856A1 (en) * | 2008-07-08 | 2010-01-14 | 日本高純度化学株式会社 | Catalyst-imparting liquid for palladium plating |
| JP2012153974A (en) * | 2011-01-25 | 2012-08-16 | Taiwan Uyemura Co Ltd | Chemical palladium/gold plating film structure, method for production thereof, palladium/gold plating film package structure bonded with copper wire or palladium/copper wire, and packaging process thereof |
| US8992756B2 (en) | 2006-11-06 | 2015-03-31 | C. Uyemura & Co., Ltd. | Direct plating method and solution for palladium conductor layer formation |
| JP2017519100A (en) * | 2014-04-30 | 2017-07-13 | ガルバニック リミテッド | Skin potential sensor |
| JP2017222891A (en) * | 2016-06-13 | 2017-12-21 | 上村工業株式会社 | Film formation method |
| JP2018059154A (en) * | 2016-10-05 | 2018-04-12 | 小島化学薬品株式会社 | Electroless palladium/gold plating process |
| KR20230005394A (en) | 2020-07-03 | 2023-01-09 | 오꾸노 케미칼 인더스트리즈 컴파니,리미티드 | Catalyst-applied liquid for electroless plating |
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| JPH01253990A (en) * | 1988-04-01 | 1989-10-11 | Nec Corp | Printed circuit board |
| JPH01257394A (en) * | 1988-04-06 | 1989-10-13 | Nec Corp | Manufacture of printed wiring board |
| JPH02262395A (en) * | 1989-04-03 | 1990-10-25 | Kihei Otsu | Manufacture of electrical inspecting jig plate for high-density printed-wiring board |
| JPH02265294A (en) * | 1989-04-05 | 1990-10-30 | Ibiden Co Ltd | Formation of bump on printed wiring board |
| JPH03237735A (en) * | 1989-12-18 | 1991-10-23 | Shinko Electric Ind Co Ltd | Tab tape |
| JPH03240293A (en) * | 1990-02-19 | 1991-10-25 | Matsushita Electric Ind Co Ltd | Manufacture of printed circuit board |
| JPH0484449A (en) * | 1990-07-27 | 1992-03-17 | Shinko Electric Ind Co Ltd | Tab tape |
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| JPS63224290A (en) * | 1987-03-13 | 1988-09-19 | 株式会社日立製作所 | Printed wiring board |
| JPH01117390A (en) * | 1987-10-30 | 1989-05-10 | Citizen Watch Co Ltd | Printed board surface treatment method |
| JPH01253990A (en) * | 1988-04-01 | 1989-10-11 | Nec Corp | Printed circuit board |
| JPH01257394A (en) * | 1988-04-06 | 1989-10-13 | Nec Corp | Manufacture of printed wiring board |
| JPH02262395A (en) * | 1989-04-03 | 1990-10-25 | Kihei Otsu | Manufacture of electrical inspecting jig plate for high-density printed-wiring board |
| JPH02265294A (en) * | 1989-04-05 | 1990-10-30 | Ibiden Co Ltd | Formation of bump on printed wiring board |
| JPH03237735A (en) * | 1989-12-18 | 1991-10-23 | Shinko Electric Ind Co Ltd | Tab tape |
| JPH03240293A (en) * | 1990-02-19 | 1991-10-25 | Matsushita Electric Ind Co Ltd | Manufacture of printed circuit board |
| JPH0484449A (en) * | 1990-07-27 | 1992-03-17 | Shinko Electric Ind Co Ltd | Tab tape |
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|---|---|---|---|---|
| EP0884935A3 (en) * | 1997-06-11 | 2000-03-08 | International Business Machines Corporation | Universal surface finish for DCA SMT, and pad on pad interconnections |
| JP2002353375A (en) * | 2001-05-25 | 2002-12-06 | Kyocera Corp | Wiring board |
| JP4683768B2 (en) * | 2001-05-25 | 2011-05-18 | 京セラ株式会社 | Wiring board |
| TWI424099B (en) * | 2005-07-08 | 2014-01-21 | Uyemura C & Co Ltd | A direct plating method and a palladium conductor layer to form a solution |
| JP2007016283A (en) * | 2005-07-08 | 2007-01-25 | C Uyemura & Co Ltd | Direct plating method and palladium conductive body layer forming solution |
| JP4662039B2 (en) * | 2005-07-08 | 2011-03-30 | 上村工業株式会社 | Direct plating method |
| US8992756B2 (en) | 2006-11-06 | 2015-03-31 | C. Uyemura & Co., Ltd. | Direct plating method and solution for palladium conductor layer formation |
| KR20110028312A (en) | 2008-07-08 | 2011-03-17 | 니혼 고쥰도가가쿠 가부시키가이샤 | Catalyst-imparting liquid for palladium plating |
| JP5567478B2 (en) * | 2008-07-08 | 2014-08-06 | 日本高純度化学株式会社 | Method for producing palladium plating film on copper-based metal and palladium plating film obtained by the production method |
| WO2010004856A1 (en) * | 2008-07-08 | 2010-01-14 | 日本高純度化学株式会社 | Catalyst-imparting liquid for palladium plating |
| JP2012153974A (en) * | 2011-01-25 | 2012-08-16 | Taiwan Uyemura Co Ltd | Chemical palladium/gold plating film structure, method for production thereof, palladium/gold plating film package structure bonded with copper wire or palladium/copper wire, and packaging process thereof |
| JP2017519100A (en) * | 2014-04-30 | 2017-07-13 | ガルバニック リミテッド | Skin potential sensor |
| JP2017222891A (en) * | 2016-06-13 | 2017-12-21 | 上村工業株式会社 | Film formation method |
| WO2017217125A1 (en) * | 2016-06-13 | 2017-12-21 | 上村工業株式会社 | Film formation method |
| US10941493B2 (en) | 2016-06-13 | 2021-03-09 | C. Uyemura & Co., Ltd. | Film formation method |
| JP2018059154A (en) * | 2016-10-05 | 2018-04-12 | 小島化学薬品株式会社 | Electroless palladium/gold plating process |
| WO2018066217A1 (en) * | 2016-10-05 | 2018-04-12 | 小島化学薬品株式会社 | Electroless palladium/gold plating process |
| KR20230005394A (en) | 2020-07-03 | 2023-01-09 | 오꾸노 케미칼 인더스트리즈 컴파니,리미티드 | Catalyst-applied liquid for electroless plating |
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