JPH05316429A - Drive method for solid-state image pickup device - Google Patents

Abstract

PURPOSE:To always obtain an excellent reproduced picture by suppressing blooming and highlight after-image when a highlight is picked up. CONSTITUTION:The drive method of the solid-state image pickup device in which a photoconductive film and an ITO electrode are formed on a solid-state image pickup element chip is featured in that before the signal charge stored in a storage diode 11 is read to a vertical CCD 12, a pulse is applied to an ITO electrode to weaken the electric field of the photoconductive film more than the electric field for a usual storage time to allow the excess charge in the signal charge stored in the storage diode 11 to be escaped to the ITO electrode. After the electric field of the photoconductive film is returned to the electric field for a usual storage time, a pulse is applied to a read electrode 13 to allow a vertical CCD 12 to read the signal charge in the storage diode 11 and the excess charge in the signal charge read by the vertical CCD 12 is returned to the storage diode 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a photoconductive film stack type solid-state image pickup device, and more particularly to a method for driving a solid-state image pickup device for improving blooming characteristics and highlight afterimage characteristics.

[0002]

2. Description of the Related Art A solid-state image pickup device having a two-story structure in which a photoconductive film is laminated on a solid-state image pickup device chip (multilayer type solid-state image pickup device) can increase the opening area of a photosensitive portion, and thus has high sensitivity and It has the excellent feature of low smear. Therefore, this solid-state imaging device is regarded as a promising camera for various monitoring televisions, high-definition televisions, and the like. The solid-state image sensor chip mentioned here means a storage diode (signal charge storage section), a signal charge reading section, and vertical and horizontal CCD channels (signal charge transfer section) formed on a semiconductor substrate, and the storage diode is formed on the uppermost layer. And a pixel electrode connected to.

However, this type of solid-state image pickup device has the following problems. That is, since the capacitances of the storage diode and the vertical CCD channel differ greatly,
As shown in FIG. 3, a blooming phenomenon and a highlight afterimage phenomenon occurred, and the image quality on the reproduced image was significantly deteriorated.

This phenomenon will be described in some detail. Typically, the storage diode capacitance is about five times larger than the vertical CCD channel capacitance. Therefore, when a signal charge larger than the capacity that can be transferred in the vertical CCD channel is read from the storage diode, the signal charge overflows in the vertical CCD channel in the vertical direction, and blooming as shown in FIG. 13A occurs. In addition, in the operation of adding the signal charges of a plurality of pixels, for example, the field accumulation operation, the signal charges transferred in the vertical CCD channels are for the added pixels, so that this blooming phenomenon easily occurs.

On the other hand, the signal charge not read from the storage diode remains in the storage diode in the next field, and the remaining signal charge is read out even if the input light is blocked or reduced. This phenomenon appears on the reproduced image as a highlight afterimage as shown in FIG. 13B, especially when the input light is moving.

[0006]

As described above, in the conventional photoconductive film stack type solid-state imaging device, blooming and highlight afterimages are generated with respect to strong input light, which is a factor that deteriorates the quality of reproduced images. Was becoming.

The present invention has been made in consideration of the above circumstances, and an object thereof is to suppress blooming and highlight afterimage when capturing highlight light, and always obtain a good reproduced image. It is an object of the present invention to provide a method for driving a solid-state imaging device that can obtain the above-mentioned characteristics.

[0008]

The essence of the present invention is that, in a photoconductive film stack type solid-state image pickup device, when the signal charges are read from the signal charge storage part to the signal charge transfer part, the transfer capacitance of the signal charge transfer part is There is a drive for pushing back a large excess charge to the signal charge storage portion and a drive for discarding the pushed back excess charge to the transparent electrode side.

That is, according to the present invention, a solid state in which a signal charge storage portion, a signal charge reading portion, and a signal charge transfer portion are formed on a semiconductor substrate, and a pixel electrode electrically connected to the signal charge storage portion is formed on the uppermost layer. In a method for driving a solid-state image pickup device in which a photoconductive film and a transparent electrode are formed on an image pickup device chip, the transparent electrode is read before the signal charge stored in the signal charge storage unit is read from the signal charge reading unit to the signal charge transfer unit. Pulse is applied to make the electric field of the photoconductive film weaker than the electric field during the normal accumulation time, the excess charges of the signal charges accumulated in the signal charge accumulation unit are released to the transparent electrode side, and then the electric field of the photoconductive film is reduced. After returning to the electric field of the normal charge time, a pulse is applied to the electrode of the signal charge read section to read the signal charge of the signal charge storage section once to the signal charge transfer section, and then to the signal charge read section. U Of an excessive amount of electric charge method to return to the signal charge storage portion. The following are preferred embodiments of the present invention.

(1) The signal accumulating operation constitutes one frame of the A field and the B field, and has an operation of adding the signal charges of the pixels in the odd columns and the pixels in the even columns adjacent in the signal charge transfer direction in each field. thing.

(2) In addition to (1), in the A field, the signal charges of the pixels in the odd columns are read out first, the excess charges are returned to the pixels in the even columns, and in the B field, the signal charges of the pixels in the even columns are preceded. Read out and return excess charge to pixels in odd columns.

(3) As the operation of pushing back the excess charge to the signal charge storage part, the voltage of the electrode of the signal charge transfer part other than the electrode for reading the signal charge from the signal charge storage part may be controlled.
That is, when the voltage of the electrode adjacent to the reading electrode is lowered, the push-back charge amount can be increased, and when it is raised, the push-back charge amount can be decreased.

[0013]

According to the present invention, of the signal charges read from the signal charge storage unit, excess charges larger than the transfer capacity of the signal charge transfer unit are pushed back to the signal charge storage unit. The signal charge does not leak from the signal charge transfer section. Therefore, even if the highlight light is imaged, the image due to the highlight light does not spread vertically on the monitor screen, and blooming can be reliably suppressed. In addition, since the excess charge pushed back to the signal charge storage section is discarded to the transparent electrode side, highlight afterimage can be surely suppressed.

In particular, in the method of adding the signal charges of a plurality of pixels, the above-mentioned blooming and highlight light afterimage become a big problem, but in the present invention, after the addition of the signal charges, there is an excess amount larger than the transfer capacity of the signal charge transfer section. The charges are pushed back to the signal charge storage unit, and the excess charges pushed back to the signal charge storage unit are discarded to the transparent electrode side, so that blooming and highlight afterimage can be effectively suppressed.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the schematic arrangement of a video camera used in the method of the first embodiment of the present invention.
In the figure, 10 is a PSID element (photoconductive film laminated type solid-state imaging device), 20 is a signal processing circuit, 30 is a synchronous pulse generation circuit, 40 is a blooming suppression timing generation circuit, and 50
Is a driver, 60 is a condenser lens, 70 is a highlight afterimage suppression timing generation circuit, and 80 is a driver. The driver 50 is connected to the vertical CCD electrode of the PSID element 10, and the driver 80 is connected to the ITO electrode of the PSID element 10.

In this apparatus, the optical input signal is condensed by the lens 60 and focused on the PSID element 10. The output signal of the PSID element 10 is output after being subjected to γ (gamma) correction, black level reproduction, etc. in the signal processing circuit 20. Also, PS
When the ID element 10 is driven, the timing required for blooming suppression is generated by the blooming suppression timing generation circuit 50, and other standard timings are supplied from the synchronization pulse generation circuit 30.

Next, the specific structure of the PSID element 10 and its driving method will be described. FIG. 2 is a plan view showing the basic configuration of the PSID element 10. The PSID element 10 includes a storage diode 11, a pixel electrode (not shown), a vertical CCD 12, a transfer electrode (including a read electrode) 13 (φV _{1 to} φV ₄ ), and the like. In addition,
As will be described later, the PSID element 10 has a laminated structure in which amorphous silicon is provided on the upper portion as a photoelectric conversion film, and a transparent electrode (ITO electrode) is provided on the upper portion thereof. Then, it is a method of adding the signal charges of two pixels which are vertically adjacent to each other.

The signal charges Q1 and Q2 stored in the storage diode 11 are read out to the vertical CCD 12 by applying the field shift voltage V _FS to φV1 and φV3 of the transfer electrode 13 at different times. At this time, the three electrodes other than the electrode to which V _FS is applied are set to the low level V _L. The read signal charges are transferred in the direction (a) by applying an LS pulse to the transfer electrodes φV1, φV2, φV3, and φV4.

When the signal charge Q1 + Q2 is larger than the transfer capacity Qv _{-CCDMAX of the} vertical CCD 12 (in particular, in the PSID element, Qv _-CCDMAX <Q1 + Q2 is _likely to occur).
Accumulates excess charge by the operation of (a) diode 1
Push back to 1. By performing this operation, the vertical CCD 12
Blooming does not occur because excess charges can be suppressed at. Furthermore, since the excess charges pushed back to the photosensitive pixel are discarded to the ITO electrode side, the highlight afterimage is suppressed.

Here, a specific one pixel structure of the PSID element
The formation will be described with reference to FIG. 110 in the figure
Is a p-type Si substrate, 111 is p⁺ Mold element isolation layer, 112
n⁺ Vertical CCD channel (signal charge transfer
Sending section), 113 is n⁺⁺Type storage diode (signal charge storage
Part), 114 is a signal charge read gate, 115a, 11
5b is a transfer gate, 116 is a first insulating layer, 117 is a lead-out
Electrode, 118 is the second insulating layer, 120 is the pixel electrode, 12
1 is a photoconductive film such as a-Si: H, and 122 is a transparent film such as ITO.
The bright electrode is shown. In addition, a part of the transfer electrode 115a is
It also serves as the signal charge read gate 114.
It

In the structure of FIG. 3, the light incident from the transparent electrode 122 is photoconductively converted by the photoconductive film 121, whereby electron-hole pairs are formed. Since the potential of the pixel electrode 120 electrically connected to the storage diode 113 is higher than that of the transparent electrode 122, electrons are emitted from the pixel electrode 12
The holes move toward 0 toward the transparent electrode 122. The holes flow out to the external circuit through the transparent electrode 122,
The electrons are stored in the storage diode 113 connected to the pixel electrode 120, and the potential of the diode 113 is lowered. When the signal charge read pulse is applied to the read gate 114, the signal charge (electrons) accumulated for a certain period is
It is read from the storage diode 113 to the vertical CCD channel 112. The charges read out and transferred to the vertical CCD channel 112 are output through a horizontal CCD channel (not shown).

Next, the operation of reading out, pushing back and discharging the signal charge in the above-mentioned PSID element will be specifically described. FIG. 4 shows a pulse applied to each electrode of the PSID element, and FIGS. 5 and 6 show a signal storage operation of the storage diode when the pulse is applied.

In FIG. 4, VBL indicates vertical blanking, and one field is composed of A field and B field. ITO is a pulse applied to the transparent electrode, φV1, φ
V2 represents a pulse applied to the vertical transfer electrode. Vb, V
I before the field shift (FS pulse) indicated by c
A voltage V higher than the voltage Vd applied to the TO during the normal storage time
a is applied for t _A period (the electric field applied to the photoelectric conversion film becomes weak). Then, FS is applied to the vertical CCD transfer electrode φV1.
The pulse is applied for t _B period, and then the FS pulse is applied to the vertical CCD transfer electrode φV3 for t _C period. The FS pulse applied to the vertical CCD transfer electrode in the B field is A
Opposite the field. That is, φV3 comes first and φV1 comes later. The LS pulse is a pulse for sequentially transferring the signal charges in the vertical CCD to the horizontal CCD (not shown).

The operation of one pixel will be described. In FIG. 5, (a) is a cross-sectional view of one pixel, and (b) to FIG. 5 and FIG.
(E) is a figure which shows the change of the potential well formed under it. 5 (b) is in a state immediately before t _A, a state in which excess charge Q _L and the normal charge Q _S1 is stored in the storage diode 11. The t _A period discard field of ITO weakly to the excess charge Q _L as shown in FIG. 5 (c) to the ITO side. In the t _b period, an FS pulse is applied to φV1 to read out the normal charge Q _s1 accumulated in the accumulation diode 11 to the vertical CCD 12 as shown in FIG. 5 (d). Then, as shown in FIG. 5 (e), Q _S1 is transferred to the vertical CCD 12 (under φV3) corresponding to the adjacent pixel. At this time,
The storage diode 11 stores the signal charge Q _S2 .

In the period t _c , an FS pulse is applied to φV3 to read Q _S2 into the vertical CCD 12 as shown in FIG. 6 (b). FIG. 6C shows the state immediately after t _c , and shows the vertical CC
Excess charges exceeding the capacity that can be transferred by D12 are pushed back to the storage diode 11. Here, Q _S2 is divided into two to be Q _S2A and Q _S2B . The signal charges Q _S1 and Q _S2A transferred from φV1 are capacitances that can be transferred by the vertical CCD 12, and the excess (excess) charge Q _S2B is pushed back to the storage diode 11. FIG. 6D shows the state of the signal accumulation period. In FIG. 4, it is from after the t _c period to near the end of the A field. In the next B field, the normal signal charge Q _S3 , the extra charge Q _S2B pushed back in the A field, and the accumulated excess charge Q
_L2 is stored in the storage diode 11. During this period, the previous Q _S1 and Q _S2A are transferred to the horizontal CCD 12 by the line shift operation.

FIG. 6 (e) shows the t _A period of the next B field. The Q _L obtained by adding the Q _S2B and Q _L2 to weak ITO field discarding the ITO electrode. At this time, a part of Q _S2 is returned from the vertical CCD 12 to the storage diode 11,
Since the normal signal charge Q _S2 is newly added to this signal charge Q _S2 , when the ITO electrode is weakened, the unevenness that occurs due to the different threshold values in each pixel occurs when the signal charge is large, so that the reproduction is performed. There is little effect on image deterioration.

Next, the operation of reading out and pushing back the signal charges in the PSID element will be described in more detail. In FIG. 7, transfer electrodes φV1 to
The pulse applied to φV4 is shown. Transfer electrodes φV1 to φV4
The pulse shown in the figure is applied to. The signal charge is read from the storage diode 11 to the vertical CCD 12 by the applied voltage of V _FS . During the period from t1 to t9, the signal charges Q1 and Q2 are added to push back excess signal charges larger than the transfer capacity of the vertical CCD 12 to the storage diode 11. After that, the signal charges Q1 + Q2 are transferred in the direction (A) from the vertical CCD 12 by the LS pulse.

Here, the flow of the signal charges from t0 to t9 will be described with reference to FIG. FIG. 8 shows a cross section taken along the line AA ′ of FIG. 2 and a transfer state of signal charges in the cross section.

At t0, the photoelectrically converted signal charges Q1 and Q2 are stored in the storage diode 11, respectively. t
Potential phi _FS next under φV1 electrodes by applying a V _FS voltage 1 at φV1 electrodes, signal charges Q1 are read under φV1 electrode. At the time t2, the signal charge Q1 has been read. From t2 to t6, the signal charge Q1 under the φV1 electrode is transferred to under the φV3 electrode. Next, at time t7, the V _FS electrode is applied to the φV3 electrode, and the potential under the φV3 electrode is set to φ _FS to read the signal charge Q2,
This is added to the signal charge Q1. Vertical CCD at t8
Excessive signal charge Q _2B from the transfer capacitance 12 is pushed back to the storage diode 11. By this operation, blooming is suppressed. The excess charge can be pushed back by either the storage diode 11 adjacent to φV1 or φV3.

FIG. 9 shows a push-back relationship of excess charges in the A field and the B field. This figure shows the VBL period of the A field and the VB of the B field described in FIG.
The operation in the L period is shown.

As shown in FIG. 9A, in the A field, first, the signal charge accumulated in the accumulation diode 11 on the φV1 electrode side is read out by the FS pulse. Next, the signal charge accumulated in the accumulation diode 11 on the φV3 electrode side is F
Read with S pulse. Next, the signal charge accumulated in the accumulation diode 11 on the .phi.V3 electrode side is read by the FS pulse. At this time, excess charges exceeding the transfer capacity of the vertical CCD 12 are pushed back to the storage diode 11 on the φV3 electrode side.

Further, as shown in FIG. 9B, in the B field, the signal charge accumulated in the accumulation diode 11 on the φV3 electrode side is first read out by the FS pulse. Then φ
The signal charge stored in the storage diode 11 on the V1 electrode side is read by the FS pulse. At this time, excess charges exceeding the transfer capacity of the vertical CCD 12 are pushed back to the storage diode 11 on the φV1 electrode side. That is, by making the pixels for pushing back excess charge different between the A field and the B field, the excess charge amount in the unit accumulation diode can be halved.
The unnaturalness of the reproduced image due to the remaining signal of the storage diode corresponding to one of the fields is solved.

FIG. 10 shows the effect of suppressing blooming by the method of this embodiment. The horizontal axis represents the amount of input light and the vertical axis represents the amount of spread of blooming. The standard light amount was 1, and the state in which blooming did not occur was 1. Standard light intensity of 100
Conventionally, the image of the highlight light spreads to a size of about 5 times (actually 10 times as it is in the vertical direction of the monitor screen) when the amount of light is 0, but blooming is suppressed by adopting the method of this embodiment. We were able to. Further, it was possible to suppress the spread to a slight extent even with 10,000 times light.

As described above, according to the method of this embodiment, after the signal charges of the two pixels are added, the excess charges larger than the transfer capacity of the vertical CCD 12 are pushed back to the storage diode 11, so that the signal charges are transferred. Further, the signal charge does not leak from the vertical CCD 12. Therefore, even if the highlight light is imaged, the image due to the highlight light does not spread vertically on the monitor screen, and blooming can be reliably suppressed. In addition, since the excess charges pushed back to the storage diode 11 are discarded to the ITO side, highlight afterimage can be surely suppressed.

Next, a second embodiment method of the present invention will be described with reference to FIGS. 11 and 12. The difference of this embodiment from the previous embodiment is that the signal charges are accumulated not only under the transfer electrodes of φV1 and φV3 but also under the transfer electrodes of φV2.

FIG. 11 shows pulses applied to the transfer electrodes φV1 to φV4. The pulses shown in the figure are applied to the transfer electrodes φV1 to φV4. Here, the difference from FIG. 7 is that
The pulses applied to the φV2 and middle level V _M during field shift operation is made higher than the normal low level V _L. The flow of signal charges in this case is shown in FIG.

At t0, the signal charges Q1 and Q2 are stored in the storage diode 11 as in the previous embodiment. t
By applying the V _FS voltage to the φV 1 electrode at 1 o'clock, the potential under the φV 1 electrode becomes φ _FS , and the signal charge Q1 is read. At this time, the potential of .phi.V2 is not at the low level either, so that part of the signal charge Q1 is also accumulated under the .phi.V2 electrode. From t2 to t6, the signal charges Q1 under the φV1 and φV2 electrodes are transferred to under the φV3 and φV2 electrodes. Then
At time t7, V _FS is applied to the φV3 electrode and the potential under the φV3 electrode is set to φ _FS , whereby the signal charge Q2 is read and added to the signal charge Q1. Vertical CCD1 at t8
The excess signal charge Q _2B from the transfer capacity of 2 is pushed back to the storage diode 11. At this time, the transfer capacity of the vertical CCD 12 is larger than that of the previous embodiment by the amount below the .phi.V2 electrode.

By carrying out such a drive, blooming that has occurred at the time of capturing the highlight light can be suppressed as in the previous embodiment, and the vertical CCD 12 can be suppressed.
It is possible to increase the amount of saturation signal transferred by, which also makes it possible to suppress blooming more reliably.

The present invention is not limited to the above embodiments. Although the method of adding the signal charges of two pixels is used in the embodiment, a method of adding three or more pixels may be used, and further, a method of not adding the signal charges may be applied. Further, the transfer electrodes of the vertical CCD are not limited to four-phase driving, but may be two-phase or three-phase driving, and can be appropriately changed according to the number of added pixels. Other,
Various modifications can be implemented without departing from the scope of the present invention.

[0041]

As described above in detail, according to the present invention, in the stacked type solid-state image pickup device, an excess charge, which is larger than the transfer capacity of the signal charge transfer section, among the signal charges read from the signal charge transfer section is generated. Highlight light input generated by the imbalance of the capacitance of the signal charge storage unit and the signal charge transfer unit by performing the operation of pushing back to the signal charge storage unit and discarding the excess charge pushed back to the signal charge storage unit to the transparent electrode side. Blooming and highlight afterimage can be suppressed and a good reproduced image can always be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a video camera used in a first embodiment method,

FIG. 2 is a plan view showing a specific configuration of a PSID element,

FIG. 3 is a cross-sectional view specifically showing one pixel configuration of a PSID element,

FIG. 4 is a signal waveform diagram showing pulses applied to transfer electrodes,

FIG. 5 is a schematic diagram for explaining the operation when the pulse of FIG. 4 is applied,

6 is a schematic diagram for explaining the operation when the pulse of FIG. 4 is applied,

FIG. 7 is a signal waveform diagram showing pulses applied to transfer electrodes during a vertical blanking period,

8 is a schematic diagram for explaining the flow of signal charges due to the applied pulse in FIG.

FIG. 9 is a schematic diagram for explaining the relationship between excessive charge pushback pixels in A and B fields,

FIG. 10 is a characteristic diagram showing an effect of blooming suppression by the method of the first embodiment;

FIG. 11 is a signal waveform diagram showing an applied pulse in a vertical blanking period in the method of the second embodiment,

FIG. 12 is a schematic diagram for explaining the flow of signal charges due to the applied pulse in FIG.

FIG. 13 is a characteristic diagram for explaining a problem of the conventional stacked solid-state imaging device.

[Explanation of symbols]

 10 ... PSID element (photoconductive film laminated type solid-state imaging device), 20 ... Signal processing circuit, 30 ... Synchronous pulse generation circuit, 40 ... Blooming suppression timing generation circuit, 50, 80 ... Driver, 60 ... Condensing lens, 70 ... Highlight afterimage suppression timing generation circuit, 11, 113 ... Storage diode (signal charge storage part), 12, 112 ... Vertical CCD (signal charge transfer part), 13, 115 ... Vertical transfer electrode, 114 ... Readout electrode (signal charge read-out) Part), tA ... ITO weak electric field period, tB ... field shift period, tC ... field shift period.

Claims (2)

[Claims] 1. A solid-state image sensor chip having a signal charge storage part, a signal charge read-out part and a signal charge transfer part formed on a semiconductor substrate, and a pixel electrode electrically connected to the signal charge storage part formed on the uppermost layer. In a method of driving a solid-state imaging device having a photoconductive film and a transparent electrode formed on the transparent electrode, the signal charge stored in the signal charge storage unit is read from the signal charge read unit to the signal charge transfer unit. Applying a pulse to make the electric field of the photoconductive film weaker than the electric field during the normal storage time, and allowing excess charge of the signal charge stored in the signal charge storage portion to escape to the transparent electrode side; After returning the electric field of the film to the electric field of the normal storage time, applying a pulse to the electrode of the signal charge reading section to read the signal charge of the signal charge storage section to the signal charge transfer section, and then the signal charge transfer section. To the department The driving method of the solid-state imaging device which comprises a step of returning the excess charge amount of the signal charges out to the signal charge storage portion. 2. The solid-state image pickup device constitutes one frame of A field and B field, and has an operation of adding signal charges of pixels in odd columns and pixels in even columns which are adjacent in the signal charge transfer direction in each field. In the field A, the signal charges of the pixels in the odd columns are read out first, the excess charges are returned to the pixels in the even columns, and in the field B, the signal charges of the pixels in the even columns are read out first, and the excess charges are read in the pixels in the odd columns. The method for driving a solid-state image pickup device according to claim 1, wherein