JPH1013748A - Solid-state image pickup device, its drive method and camera using the solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress blooming and smear components in an output signal and to reduce a screen size by applying a charge sweep-out pulse to an image pickup element board for all horizontal blanking periods for one vertical synchronization period after light reception. SOLUTION: A shutter pulse SP is generated by a timing generating circuit 21 as a charge sweep-out pulse for all horizontal blanking periods for one vertical synchronization period after light reception and the charge sweep-out pulse is fed to a board 17 while superimposing a board bias Vsub with the shutter pulse SP. Thus, the period when the signal charge is stored in the sensor section 11 is only one horizontal scanning period (1H) and even when an excess light is made incident onto the sensor section 11, since the period to store the signal charge is short, the signal charges generated in the sensor section 11 are not excessive. As a result, even in the case of incidence of excess light, the signal charges are not overflowed to surrounding picture elements and a blooming component is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device and a driving method thereof, and a camera using the solid-state imaging device.
The present invention relates to a solid-state imaging device suitable for use in an electronic still camera equipped with an automatic control device such as an automatic white balance control device, a driving method thereof, and a camera using the solid-state imaging device.

[0002]

2. Description of the Related Art In recent years, digital electronic still cameras have become widespread. This electronic still camera is equipped with automatic control devices such as an automatic focus control device, an automatic iris control device, and an automatic white balance control device. Control in these control devices is performed using output signals from an image sensor mounted on an electronic still camera.
When a CCD (Charge Coupled Device) solid-state imaging device is used as an imaging device, normal processing cannot be performed if a blooming or smear component is included in an output signal of the CCD solid-state imaging device. .

[0003] Here, blooming refers to a phenomenon in which signal charge generated in a light receiving portion becomes excessive with respect to excessive incident light, overflows to peripheral pixels, and a white portion spreads around. In addition, smear refers to a phenomenon in which, when a high-luminance subject is imaged, a white tail is vertically drawn on a monitor screen.
To suppress this blooming and smear component, CC
In the D solid-state imaging device, various improvements have been made in the structure of a light receiving unit (pixel), a vertical transfer unit, and the like.

[0004]

On the other hand, for use in electronic still cameras of higher image quality and lower cost, it is desired to increase the number of pixels of the CCD solid-state image pickup device and reduce the size of the optical system, that is, reduce the pixel size. . Along with this, suppression of blooming and smear components becomes severe on the structure of the CCD solid-state imaging device. On the other hand, electronic still cameras equipped with automatic control devices such as an automatic focus control device, an automatic iris control device, and an automatic white balance control device enable normal processing of the control and improve the accuracy of each function. In order to achieve this, suppression of blooming and smear components is strongly desired.

The present invention has been made in view of the above problems, and an object of the present invention is to suppress blooming and smear components in an output signal of a solid-state imaging device when used in processing of various control systems. Another object of the present invention is to provide a solid-state imaging device capable of coping with a reduction in the pixel size of a solid-state imaging device, a driving method thereof, and a camera using the solid-state imaging device.

[0006]

A solid-state imaging device according to the present invention has a plurality of sensor units arranged in a matrix for performing photoelectric conversion and a transfer unit for transferring signal charges read from these sensor units. A solid-state imaging device, and a drive system that applies a charge sweep-out pulse to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period after light reception by the plurality of sensor units in a predetermined operation mode. It is provided with a configuration.

A driving method according to the present invention is directed to a solid-state image sensor having a plurality of sensor units arranged in a matrix for performing photoelectric conversion and a solid-state imaging device having a transfer unit for transferring signal charges read from these sensor units. In the imaging apparatus, in a predetermined operation mode, a charge sweeping pulse is applied to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period after light reception by the plurality of sensor units.

In the solid-state imaging device and the method of driving the solid-state imaging device having the above-described configuration, in a predetermined operation mode, for example, in an operation mode in which an output signal of the solid-state imaging device is used for processing of various control systems, a plurality of sensor units receive light after receiving light. When a charge sweeping pulse is applied to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period, the period in which signal charges are accumulated in each sensor unit is only one horizontal scanning period. Therefore, even if excessive light is incident on the sensor unit, the period in which signal charges are accumulated is short,
The signal charges generated in the sensor section do not become excessive, so that the blooming component in the output signal of the solid-state imaging device is largely suppressed.

A camera according to the present invention comprises: a plurality of sensor units arranged in a matrix for performing photoelectric conversion; a solid-state imaging device having a transfer unit for transferring signal charges read from these sensor units; A solid-state imaging device comprising: a driving system that applies a charge sweeping-out pulse to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period after light reception by a plurality of sensor units in a mode. A configuration including an optical system that guides incident light to an imaging area of the solid-state imaging device, and an automatic control device that automatically controls characteristics of the solid-state imaging device and the optical system based on an output signal of the solid-state imaging device. ing.

In the camera having the above configuration, when the output signal of the solid-state image sensor is used for control processing of the automatic control device,
Signal charges generated in the sensor unit by applying a charge sweeping-out pulse to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period after light reception by the plurality of sensor units of the solid-state imaging device. Does not become excessive, and the blooming component in the output signal of the solid-state imaging device is largely suppressed. Therefore, in the automatic control device, the control process is performed normally.

[0011]

Embodiments of the present invention will be described below in detail with reference to the drawings. In the present embodiment, a case where the present invention is applied to an interline transfer (IT) type CCD solid-state imaging device will be described as an example.

FIG. 1 is a schematic configuration diagram showing an example of a solid-state imaging device according to the present invention. In FIG. 1, a plurality of sensor units 11 are arranged in a matrix in a row (vertical) direction and a column (horizontal) direction, and convert incident light into signal charges having a charge amount corresponding to the light amount and accumulate them. Sensor unit 11
And a plurality of vertical CCDs 13 that are provided for each of the vertical columns and vertically transfer signal charges read from the sensor units 11 by the read gate unit 12.
Is configured.

In this imaging area 14, the sensor unit 1
Numeral 1 is a PN junction photodiode, for example. The signal charges accumulated in the sensor unit 11 are read out to the vertical CCD 13 by applying a readout pulse XSG described later to the readout gate unit 12. The vertical CCD 13 is, for example, a four-phase vertical transfer clock φV1 to φV1.
The signal charges transferred and driven by φV4 and read out are transferred to one scanning line (one line) in a part of the horizontal blanking period.
Are sequentially transferred in the vertical direction by the portion corresponding to.

Here, in the vertical CCD 13, the transfer electrodes of the first phase and the third phase also serve as the gate electrodes of the read gate unit 12. For this reason, of the four-phase vertical transfer clocks φV1 to φV4, the transfer clock φV1 of the first phase and the transfer clock φV3 of the third phase are set to have three values of low level, intermediate level and high level. The third high-level pulse becomes the read pulse XSG of the read gate unit 12.

A horizontal CCD 15 is arranged below the imaging area 14 in the drawing. This horizontal CCD 15 has
Signal charges corresponding to one line are sequentially transferred from the plurality of vertical CCDs 13. The horizontal CCD 15 is transferred and driven by, for example, two-phase horizontal transfer clocks φH1 and φH2, and sequentially transfers the signal charges for one line transferred from the plurality of vertical CCDs 13 in the horizontal direction during the horizontal scanning period after the horizontal blanking period. Forward.

At the end of the transfer destination of the horizontal CCD 15, a charge-voltage converter 16 having, for example, a floating diffusion amplifier configuration is provided. The charge-voltage converter 17 sequentially converts signal charges horizontally transferred by the horizontal CCD 15 into voltage signals and outputs the voltage signals. After passing through an output circuit (not shown), this voltage signal is derived as a CCD output OUT corresponding to the amount of incident light from the subject.

The above-described sensor unit 11, readout gate unit 12, vertical CCD 13, horizontal CCD 15, charge-voltage converter 16 and the like are composed of a semiconductor substrate (hereinafter simply referred to as a substrate) 1.
7 is formed. Thus, the CCD solid-state imaging device 10 of the interline transfer system is configured. This C
The four-phase vertical transfer clocks φV1 to φV4 and the two-phase horizontal transfer clocks φH1 and φH2 for driving the CD solid-state imaging device 10 are generated from the timing generation circuit 21.

Four-phase vertical transfer clocks φV1 to φV4
Are terminals (pads) 22-1 to 22-2 formed on the substrate 17
It is supplied to the vertical CCD 13 via 2-4. The two-phase horizontal transfer clocks φH1 and φH2 are supplied to the horizontal CCD 15 via the terminals 23-1 and 23-2. In addition to these transfer clocks, the timing generation circuit 21 also appropriately generates various timing signals such as a shutter pulse SP for sweeping out signal charges accumulated in the sensor unit 11 to the substrate 17.

FIG. 2 is a cross-sectional view showing the structure around the sensor section 11 in the substrate depth direction. In FIG. 2, for example, N
A P-type well region 31 is formed on the surface of a D-type substrate 17. An N ⁺ -type signal charge storage region 32 is formed on the surface of the well region 31, and a P ⁺ -type hole storage region 33 is further formed thereon, thereby forming a so-called HA.
A sensor unit 11 having a D (hole storage diode) structure is configured.

The signal charges e accumulated in the sensor section 11
Is an overflow barrier OFB composed of a P-type well region 31 as shown in the potential distribution diagram of FIG.
Is determined by the height of the potential barrier. That is, the overflow barrier OFB is
When the accumulated charge exceeds the saturation signal charge, the excess charge is swept out to the substrate 17 side over the potential barrier.

The saturation signal charge is determined by the S / N of the device.
The height of the potential barrier of the overflow barrier OFB varies depending on the characteristics, the amount of charge handled by the vertical CCD 13, and the like. The height of the potential barrier of the overflow barrier OFB can be controlled by a bias voltage (hereinafter, referred to as a substrate bias) Vsub applied to the substrate 17.

In the lateral direction of the sensor section 11, an N ⁺ -type signal charge transfer area 35 and a P ⁺ -type channel stopper area 36 are formed via a P-type area 34 constituting the readout gate section 12. Below the signal charge transfer region 35, a P ⁺ type impurity diffusion region 37 for preventing the smear component from being mixed is formed. Further, above the signal charge transfer region 35, a transfer electrode 39 made of, for example, polycrystalline silicon is disposed via a gate insulating film 38, thereby forming the vertical CCD 13. Transfer electrode 39
The portion located above the P-type region 34 also serves as the gate electrode of the readout gate unit 12.

Above the vertical CCD 13, a transfer electrode 39 is provided.
, An Al (aluminum) light-shielding film 41 is formed via an interlayer film 40. This Al light shielding film 41
Are selectively removed by etching in the sensor section 11, and light L from the outside enters the sensor section 11 through the opening 42 formed by the etching and removal. As described above, the substrate bias Vsub that determines the amount of signal charges stored in the sensor unit 11, that is, determines the height of the potential barrier of the overflow barrier OFB is applied to the substrate 17, as described above. ing.

The substrate bias Vsub in the substrate bias generating circuit 24 shown in FIG. 1 takes into consideration the variation in the height of the potential barrier of the overflow barrier OFB (see FIG. 3) in the sensor section 11 due to the manufacturing variation of each device. The voltage is set to an optimum value for each chip, applied to the terminal 26 via the clamping diode 25, and supplied to the substrate 17. Between the terminal 26 and the ground,
The resistor 27 is connected.

On the other hand, during the electronic shutter operation, the shutter pulse SP generated by the timing generation circuit 21 is DC-cut by the capacitor 28, and the low level is clamped by the clamping diode 25 to the DC level of the substrate bias Vsub. , Terminal 26 via substrate 26
Is applied to The timing generation circuit 21, the substrate bias generation circuit 24 and peripheral circuit elements (diode 25, resistor 27, capacitor 28, etc.)
A drive system of the CCD solid-state imaging device 10 is configured.

In the CCD solid-state imaging device 10 according to this embodiment having the above-described configuration, the substrate 17 has an arbitrary constant substrate bias Vs set by the substrate bias generating circuit 24.
ub is applied, and as is apparent from the timing chart of FIG.
When the SG is applied to the read gate unit 12, signal charges are read from each sensor unit 11 to the vertical CCD 13. In this embodiment, as described above, the first phase,
The third-phase vertical transfer clocks φV1 and φV3 (FIG.
The third high-level pulse (indicating φV1) is the read pulse XSG.

In the normal operation mode, as shown in FIG. 5, the substrate 17 always has a constant substrate bias Vsu.
b is applied to the previous read pulse XS
One field period from the occurrence of G to the generation of the current readout pulse XSG is a charge accumulation period, and signal charges are accumulated in each sensor unit 11 during this charge accumulation period. In this example, the field readout type CCD is used.
The case of a solid-state imaging device is described as an example.

On the other hand, in the electronic shutter operation mode, FIG.
As shown in the figure, the shutter pulse S of a certain voltage ΔVsub
When P is superimposed on the substrate bias Vsub once (or several times) and applied to the substrate 17 during the vertical synchronization period, the charge accumulation period is limited. That is, the voltage ΔV
By applying the sub shutter pulse SP to the substrate 17, the overflow barrier O on the substrate side in FIG.
The FB collapses, and the signal charges accumulated in the sensor unit 11 up to that point are discharged to the substrate 17. Then, a period from the discharge to the generation of the next read pulse XSG is a charge accumulation period (shutter speed).

In the present invention, by utilizing the principle of the electronic shutter operation, in a predetermined operation mode, for example, when the CCD solid-state imaging device 10 is used as an imaging device of an electronic still camera, the electronic still camera is provided. The automatic control device that automatically controls the characteristics of the CCD solid-state imaging device 10 and the optical system, such as the automatic focus control device, the automatic iris control device, the automatic white balance control device, etc.
When using the output signal of the CD solid-state imaging device 10, it is characterized in that blooming and smear components included in the output signal are suppressed.

More specifically, as shown in FIG. 7, in at least one vertical synchronizing period (one field) after the light is received by the sensor unit 11, the shutter pulse SP is changed to a charge sweeping pulse every horizontal blanking period. The charge sweep-out pulse generated by the timing generation circuit 21 is superimposed on the substrate bias Vsub and applied to the substrate 17 similarly to the shutter pulse SP.

Thus, the period during which signal charges are accumulated in the sensor section 11 is only one horizontal scanning period (1H). Therefore, even if excessive light is incident on the sensor unit 11, the signal charge is accumulated in a short period, so that the signal charge generated in the sensor unit 11 does not become excessive. As a result, even when an excessive amount of light is incident, the signal charges do not overflow into the surrounding pixels, so that the blooming component is largely suppressed.

Here, the above processing can be performed, for example, in an electronic still camera, by using an output signal of the CCD solid-state imaging device 10, an automatic focus control device, an automatic iris control device, and an automatic white balance control device. In the operation mode for controlling the automatic control device such as that described above, it takes a certain time for feedback to be applied to the iris and shutter speed of the lens, so that a signal during the period is not necessarily required.

In FIG. 7, the area indicated by the dotted line of the charge sweeping-out pulse indicates the variable width of the generation period of the charge sweeping-out pulse. In the present embodiment, the signal charge is read out every other field. . This is because in an electronic still camera, feedback control of automatic control devices such as an automatic focus control device, an automatic iris control device, and an automatic white balance control device is performed with higher accuracy.

That is, if the signal charges are read out for each field, only the pixel information up to the line in the middle of one field can be read. Therefore, the feedback control is performed only based on the pixel information of a part of one field. However, by reading out the signal charges every other field, the feedback control can be performed based on all the pixel information of one field, so that the control can be performed with higher accuracy.

In this embodiment, the vertical CCD 13 is driven at a high speed just before reading out the signal charge from the sensor section 11 in order to sweep out the electric charge in the vertical CCD 13. The high-speed transfer driving of the vertical CCD 13 can be realized by setting the frequency of the vertical transfer clocks φV1 to φV4 generated by the timing generation circuit 21 high (in FIG. 7, the high-speed transfer clock corresponds to this). By this high-speed transfer drive, the vertical CCD 1 is read before the signal charge is read.
Since the smear, blooming, and dark (dark current) components accumulated in 3 are swept away through the horizontal CCD 15, a better signal in which the smear, blooming, and dark components are suppressed is output as the CCD solid-state imaging device 10. Is obtained.

As a result, for example, the number of pixels of the CCD solid-state imaging device 10 and the size of the optical system are reduced, that is, the pixel size is reduced. Even if blooming and smear components increase in the device structure, For example, in an operation mode for controlling each automatic control device when applied to an electronic still camera, blooming and smear components contained in an output signal of the CCD solid-state imaging device 10 can be suppressed. It will be possible to cope with the reduction in size.

In the above-described operation mode, signal charges are read out every other field, so that image information can be obtained only every other field. By performing the conversion, moving image display can be realized.

Further, in the above embodiment, the case where the present invention is applied to an interline transfer type CCD solid-state imaging device has been described. However, the present invention is not limited to this. The present invention is similarly applicable to a CCD solid-state imaging device.

FIG. 8 is a schematic configuration diagram of, for example, an electronic still camera using the CCD solid-state imaging device 10 according to the present invention as an imaging device. In FIG. 8, a subject (not shown)
Is incident on an imaging area of a CCD solid-state imaging device 53 through an optical system such as a lens 51 and an iris (aperture) 52. As the CCD solid-state imaging device 53, the above-described CCD solid-state imaging device according to the present embodiment is used. The output signal of the CCD solid-state imaging device 53 is subjected to various signal processing such as automatic white balance control in a signal processing circuit 54.

In order to realize automatic white balance control, the signal processing circuit 54 receives input signals R (red),
A primary color separation circuit 541 for separating into primary color signals of G (green) and B (blue) (hereinafter referred to as R, G, B signals);
White balance amplifiers 542R and 542R for obtaining white balance by adjusting the gain between the B signals.
42G and 542B are provided. Here, to take the white balance means to make the ratios of the R, G, and B signals equal.

In this embodiment, the white balance is adjusted by fixing the gain of the white balance amplifier 542G and controlling the gains of the other two white balance amplifiers 542R and 542B based on the G signal. . Therefore, the white balance amplifier 542G for the G signal can be omitted.

The output signal of the signal processing circuit 54 is derived to the outside as an image pickup signal, and is supplied to a detection circuit 55. The detection circuit 55 temporally integrates the output signal of the CCD solid-state imaging device 53 that has passed through the signal processing circuit 54 to obtain a detection voltage. This detection voltage is supplied to a control circuit 56 configured by, for example, a CPU or the like that controls the entire camera system.

The control circuit 56 controls the white balance amplifiers 542R and 542R based on the detection voltage from the detection circuit 55.
A white balance control signal for obtaining white balance by controlling each gain of the iris 52B is supplied to the signal processing circuit 54.
An iris control signal for adjusting the exposure by controlling the opening of the iris is supplied to the drive system 57 of the iris 52, and further, the focus is adjusted by controlling the position of the iris 52 in the optical axis direction. Focus control signal to lens 51
Is supplied to the driving system 58.

As described above, the CCD solid-state image pickup device 10 according to the present invention is used as an image pickup device in an electronic still camera equipped with an automatic control device such as an automatic focus control device, an automatic iris control device, and an automatic white balance control device. As a result, an output signal in which smear, blooming, and dark components are suppressed can be obtained from the CCD solid-state imaging device 10, so that each control process can be performed more accurately based on the output signal. Accuracy can be improved.

[0045]

As described above, according to the present invention,
For example, in an operation mode in which an output signal of a solid-state imaging device is used for processing of various control systems, a charge sweeping pulse is output for every horizontal blanking period in at least one vertical synchronization period after light reception by a plurality of sensor units. By applying the voltage to the element substrate, the signal charge is accumulated in each sensor section only during one horizontal scanning period. Even if excessive light is incident on the sensor section, the signal charge is accumulated. Since the period is short, the signal charge generated in the sensor unit does not become excessive, and the blooming component in the output signal of the solid-state imaging device can be largely suppressed.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a solid-state imaging device according to the present invention.

FIG. 2 is a cross-sectional structure diagram around a sensor unit.

FIG. 3 is a potential distribution diagram in a depth direction of a sensor unit.

FIG. 4 is a timing chart of a basic operation of the CCD solid-state imaging device.

FIG. 5 is a timing chart during normal operation.

FIG. 6 is a timing chart during an electronic shutter operation.

FIG. 7 is a timing chart during operation according to the embodiment.

FIG. 8 is a schematic configuration diagram of an electronic still camera according to the present invention.

[Explanation of symbols]

10 CCD solid-state imaging device 11 Sensor unit 12
Readout gate unit 13 Vertical CCD 15 Horizontal CCD 17 Semiconductor substrate 21 Timing generation circuit 24 Substrate bias generation circuit

Claims (5)

[Claims] 1. A solid-state imaging device having a plurality of sensor units arranged in a matrix for performing photoelectric conversion and a transfer unit for transferring signal charges read from these sensor units, and a plurality of the plurality of sensor units in a predetermined operation mode. A drive system for applying a charge sweep-out pulse to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period after light reception by the sensor unit. . 2. The driving system according to claim 1, wherein the driving unit drives the transfer unit at a high speed to sweep out the charges in the transfer unit immediately before reading the signal charges from the plurality of sensor units to the transfer unit. The solid-state imaging device according to claim 1. 3. A solid-state imaging device comprising: a plurality of sensor units arranged in a matrix and performing photoelectric conversion; and a solid-state imaging device having a transfer unit that transfers signal charges read from the sensor units. A driving method comprising applying a charge sweeping-out pulse to the substrate of the solid-state imaging device in every horizontal blanking period in at least one vertical synchronization period after light reception by the plurality of sensor units in the operation mode. 4. The transfer unit according to claim 3, wherein immediately before reading out the signal charges from the plurality of sensor units to the transfer unit, the transfer unit is driven at high speed so as to sweep out the charges in the transfer unit. Drive method. 5. A solid-state imaging device having a plurality of sensor units arranged in a matrix for performing photoelectric conversion, and a transfer unit for transferring signal charges read from these sensor units, and a plurality of said plurality of sensor units in a predetermined operation mode. A driving system for applying a charge sweeping pulse to the substrate of the solid-state imaging device for every horizontal blanking period in at least one vertical synchronization period after light reception by the sensor unit; An optical system that guides incident light to an imaging area of the device; and an automatic controller that automatically controls characteristics of the solid-state imaging device and the optical system based on an output signal of the solid-state imaging device. Features camera.