JPH05315321A - Manufacture of plated wiring - Google Patents

Abstract

PURPOSE:To provide a method of manufacturing a plated wiring improved so as to effectively remove a power-supply electrode to which a voltage is applied at electrolytic plating when a wiring is formed by selective plating. CONSTITUTION:A lower electrode 12 and a protective film 13 are formed on a substrate 11. A lower layer resist film 14 is formed on the protective film 13 containing this lower layer electrode 12 part and an opening 141 is formed so as to reach the lower electrode 12 in this lower layer resist film 14. A power- supply electrode 15 is vapor-deposited and formed on the lower layer resist film 14, including the opening 141 and its surrounding step 142 part, and an upper layer resist film 16 is formed on the power-supply resist electrode 15, and an opening 17 is formed in this upper layer resist film 16 corresponding to the opening 141 so that its step 142 may not expose. A wiring 18 is formed in this opening 17 part by electrolytic plating, and thereafter this power-supply electrode 15 is removed by lift-off, containing a layer of the power-supply electrode 15 in the step 142 part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION This invention relates to a microwave monolithic I by selective plating method using a noble metal such as Au.
C, a method for manufacturing a plated wiring for forming a wiring layer such as a field effect transistor.

[0002]

2. Description of the Related Art As a wiring material for a transistor or an IC used at a high frequency, a low resistance material made of a noble metal such as Au is used in order to suppress a high frequency propagation loss, and a film thickness of this wiring layer. Also needs to be set to a sufficient thickness. Since the noble metal such as Au used here is difficult to pattern by etching and the material itself is expensive, the wiring forming means by the selective plating method is generally adopted.

In order to form a wiring layer having a film thickness of several μm required for wiring by such selective plating, an electrolytic plating method must be adopted. In order to selectively use electrolytic plating to form such a wiring layer, a power supply electrode layer is deposited on the entire surface of the substrate on which wiring is to be performed, and wiring of a predetermined pattern is formed by selective electrolytic plating. After the layer is formed, it is necessary to remove the unnecessary power supply electrode layer other than the wiring portion.

A method such as lift-off or etching is adopted as a means for removing the power supply electrode, but if the power supply electrode is removed by lift-off, there is a problem that burrs remain around the removed portion. Moreover, when etching is used, damage to the substrate occurs.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, in which the power supply electrode layer to be entirely formed on the upper surface of the substrate has the wiring formed by the selective plating method. It is possible to prevent burrs from being generated in the power supply electrode when the power supply electrode layer is removed later by, for example, a lift-off method, and when the power supply electrode layer is removed by etching, the substrate is damaged. It is an object of the present invention to provide a method for manufacturing a plated wiring, which is surely provided without being given a reliability of the semiconductor device.

[0006]

A method of manufacturing a plated wiring according to the present invention forms a lower layer resist film having an opening so that a specified portion on a substrate is exposed. The power supply electrode layer is formed on the surface of the film by a film forming means including a step portion around the opening and having a strong directivity. Then, an upper layer resist film is formed on the power feeding electrode layer, and the power feeding electrode layer corresponding to the opening of the lower layer resist film is exposed with respect to the upper layer resist film and is formed in a step portion around the opening. The plating layer forming pattern is formed so as not to expose the feeding electrode layer, an electrolytic plating voltage is applied to the feeding electrode, and a wiring layer is formed by electrolytic plating in the opening corresponding to the wiring pattern. Then, the lift-off process is performed to remove the portion of the power supply electrode except the portion corresponding to the wiring layer.

Further, the power supply electrode layer including the peripheral step portion is exposed corresponding to the opening of the lower resist film to form a plating layer forming pattern, and an electrolytic plating voltage is applied to the power supply electrode to set the pattern. A wiring layer is formed by electrolytic plating corresponding to the wiring pattern, and the power feeding electrode layer except the wiring layer portion is removed by etching.

[0008]

According to such a method of manufacturing a plated wiring, the power supply electrode layer becomes thin in the step portion around the opening formed in the lower resist film. When the wiring layer is formed by electrolytic plating so as not to contact the power feeding electrode layer portion of the stepped portion, burrs of the power feeding electrode layer are effectively generated when the power feeding electrode layer is removed by the lift-off method. To be prevented.

Further, when the power supply electrode layer is removed by etching, the thin portion of the power supply electrode layer in the step portion of the lower resist film is covered with the wiring layer by electrolytic plating. Etching damage to the underlying layer from the stepped portion of the lower resist film on which the thin power feeding electrode layer is set is effectively prevented.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a sequence of steps for forming a plated wiring. First, as shown in FIG. 1A, corresponding to a predetermined electrode wiring lead-out portion on the surface of a semiconductor substrate 11 where a transistor or the like will be formed. The lower layer electrode 12 is formed, and the surface of the substrate 11 other than the lower layer electrode 12 has a protective film 13
Is covered by.

The surfaces of the lower layer electrode 12 and the protective film 13 are to be covered with the lower layer resist film 14, and the lower layer electrode 12 corresponds to the lower layer electrode 12 portion. 14 so that the main part of the opening is exposed
1 is formed. In this case, the step around the opening 141
The 142 part is composed of a tapered surface that is widened in the direction of the lower electrode 12.

Next, as shown in FIG. 3B, a power supply electrode 15 for applying a plating voltage when selective plating is applied is vapor-deposited on the entire surface including the opening 141 by means such as electron beam vapor deposition. At this time, if the power supply electrode 15 is formed from a direction nearly perpendicular to the surface of the substrate 11 by a film forming method having a strong directional property such as vapor deposition means, a step difference in the opening 141 of the lower resist film 14 is formed.
The film thickness of the power supply electrode 15 formed on the 142 portion is thinner than that of other portions.

If the power supply electrode 15 is formed in this way,
An upper resist film 16 is formed on the power supply electrode 15 as shown in FIG. In this upper layer resist film 16, an opening 17 corresponding to the wiring pattern is formed corresponding to the opening 141 part of the lower layer resist film 14, and the opening 17 corresponds to the bottom of the opening 141. 15 are exposed. In this case, the feeding electrode 15 in the portion corresponding to the step 142 of the opening 141 is not exposed by the opening 17,
The upper resist film 16 is arranged so as to cover it.

In this way, if the selective plating pattern is formed in the upper resist film 16 by the opening 17,
As shown in FIG. 3D, selective plating of Au, for example, is performed in a state where a predetermined voltage is set to the power supply electrode 15, and the selective plating causes the opening 17 of the upper resist film 16 to be formed.
The wiring 18 is formed by Au plating corresponding to the pattern.

When the wiring 18 is formed by selective plating in this way, the lower layer resist film 14 and the upper layer resist film 16 are dissolved and removed with acetone or the like. In this step, the power supply electrode 15 is also lifted off. ,
(E) Wiring by selective plating with Au as shown in the figure
18 is formed.

In such a manufacturing process, particularly in the process shown in FIG. 6C, the step 142 around the opening 141 of the lower resist film 14 is covered with the upper resist film 16.
Therefore, the wiring 18 is not in contact with the thin portion of the power feeding electrode 15 corresponding to the step 142.

Therefore, the step 142 of the lower resist film 14 is formed.
The power supply electrode 15 corresponding to the thin film is easily lifted off and removed, and the remaining power supply electrode 15 is removed.
A wiring structure is obtained by the selective plating method as shown in FIG.

Since the power feeding electrode 15 is thin at the step 142 of the lower resist film 14 as described above, it is very advantageous when removing the power feeding electrode 15 by lift-off. However, when removing the unnecessary power supply electrode 15 by etching instead of the lift-off method, the lower resist film is used.
There is a problem of damage due to etching from the thin portion of the power supply electrode 15 on the step 142 of 14 to the base.

FIG. 2 shows an embodiment assuming such a case. First, after the power supply electrode 15 is formed on the lower resist film 14 by the steps of FIGS. 1A and 1B,
An upper resist film 16 is formed as shown in FIG.
The opening 171 is formed in the upper resist film 16 so as to include all the openings 141 of the lower resist film 14, specifically, the step 142. That is, the thin portion of the power feeding electrode 15 corresponding to the step 142 is exposed by the opening 171.

After that, as shown in FIG.
A metal such as Au is selectively plated while the voltage of electrolytic plating is applied to the wiring 18 so that the wiring 18 is formed.
In this case, the wiring 18 is formed in contact with the power feeding electrode 15 at the step 142, and the thin portion of the power feeding electrode 15 is covered with the wiring 18.

When the wiring 18 is formed by selective plating in this way, the upper resist film 16 is formed as shown in FIG.
Of the power supply electrode 15 exposed from the wiring 18
Are removed by etching by means such as wet etching, RIE and sputter etching to obtain a structure as shown in FIG. And finally, the lower resist film 14
Is removed by means such as ashing or acetone immersion,
The wiring structure having the structure of (E) is completed.

According to such a manufacturing method, as shown in FIG.
As shown in FIG. 7, the portion corresponding to the thinned step 142 of the power supply electrode 15 is covered with the wiring 18 by selective plating. Therefore, when removing the upper layer resist film 16 in FIG. The lower resist film 14 is attacked from the thin feed electrode 15 portion on the step 142 of the film 14 to protect the protective film 13
It is reliably prevented that the underlayer such as the lower electrode 12 is exposed and the underlayer is damaged in the etching process of the power supply electrode 15 in the process of FIG.

Further, since the power feeding electrode 15 in the step 142 portion of the lower resist film 14 is thin, it is previously etched,
It is also surely prevented that the base of this portion is particularly damaged by etching.

In each of FIG. 1E and FIG. 2E, there is a portion where the lower layer electrode 12 is exposed. This is a protection formed around the lower layer electrode 12. If the opening of the film 13 is made smaller than the opening 141 of the upper resist film 14, this exposed portion can be eliminated, and sufficient reliability can be secured.

Although the above-mentioned embodiments show the case where the wiring 18 is formed on the lower layer electrode 12 by the selective plating, even when the thick film wiring is formed on the protective film 13 by the selective plating. It can be applied.

In FIG. 3A, the protective film 13 is formed on the entire surface of the substrate 11, and the lower resist film 14 is formed on the protective film 13. Then, an opening 141 corresponding to the wiring pattern is formed in the lower resist film 14, and a step 142 is formed around the opening 141. Then, the power supply electrode 15 is formed by vapor deposition on the lower resist film 14 including the opening 141 as in the case of the previous embodiment.

In this case, the portion of the power supply electrode 15 corresponding to the step 142 is thin, and the upper layer resist film 16 is formed on the power supply electrode 15 and the upper layer resist film 16 is formed. In the same state as in FIG. 1C, the opening 17 corresponding to the wiring pattern is formed. This opening 17 has a step 142
Is formed so as not to expose the thin portion of the power supply electrode 15 corresponding to the above, and the wiring 18 is formed corresponding to this opening 17 by selective plating.

As described above, if the thin portion of the power feeding electrode 15 corresponding to the step 142 is covered with the wiring 18 and the power feeding electrode 15 and the like are removed by lift-off, as shown in FIG. Complete wiring structure is completed.

In the embodiment shown in FIG. 4, the upper layer resist film 16 is formed on the lower layer resist film 13 formed on the protective film 13, and the step 14 of the lower layer resist film 14 is formed on the upper layer resist film 16.
The opening 171 is formed so as to include the thin portion of the power supply electrode 15 corresponding to 2. That is, similar to the embodiment of FIG. 2, the opening 171 is formed so that the thin portion of the power feeding electrode 15 corresponding to the step 142 is exposed.
The wiring 18 is formed by selective plating so as to correspond to the opening 171.

This embodiment corresponds to the case where the power supply electrode 15 is removed by the etching shown in FIG.
By removing the power supply electrode 15 and the like by etching similarly to the embodiment of FIG. 5, the structure shown in FIG.

[0031]

As described above, according to the method of manufacturing a plated wiring according to the present invention, the power supply electrode to which the voltage is applied and set during electrolytic plating is removed without causing unnecessary burrs or the like due to lift-off. Further, even when the power supply electrode is removed by etching, it is possible to reliably prevent etching damage from reaching the base.
For example, a plated wiring using a noble metal such as Au is formed so that sufficient reliability can be obtained.

[Brief description of drawings]

FIG. 1A to FIG. 1E are views sequentially illustrating a manufacturing process of a plated wiring according to an embodiment of the present invention.

2A to 2E are views for sequentially explaining manufacturing processes according to another embodiment of the present invention.

3A and 3B are views for explaining the manufacturing process of the third embodiment of the present invention.

4A and 4B are views for explaining the manufacturing process of the fourth embodiment of the present invention.

[Explanation of symbols]

11 ... Substrate, 12 ... Lower layer electrode, 13 ... Protective film, 14 ... Lower layer resist film, 141 ... Opening, 142 ... Step, 15 ... Feed electrode, 16 ... Upper layer resist film, 17 ... Opening, 18 ... Wiring.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hirose Ikeda 1-1, Showa-cho, Kariya, Aichi Prefecture, Nihon Denso Co., Ltd. (72) Inventor Hideo Matsuki 1-1, Showa-cho, Kariya, Aichi Prefecture, Nippon Denso Within the corporation

Claims (2)

[Claims] 1. A first resist film forming step of forming a lower resist film in which an opening for exposing a wiring forming portion is formed on a substrate, and a step around the opening on the surface of the lower resist film. An electrode layer forming step of forming a feeding electrode layer by a film-forming means having a strong directional property including a portion; a second resist film forming step of forming an upper layer resist film on the feeding electrode layer; A wiring pattern forming step of exposing the power supply electrode layer corresponding to the opening of the lower resist film, and forming a plating layer formation pattern by opening so as not to expose the power supply electrode layer formed in the step portion around the opening; A plated wiring layer type in which an electrolytic plating voltage is applied and set to the power supply electrode exposed corresponding to the wiring pattern, and a wiring layer is formed by electrolytic plating in the opening corresponding to the wiring pattern Process and method of manufacturing the wire for plating, characterized by comprising and a liftoff step of removing the power supply electrode layer in a portion except for the portion corresponding to the wiring layer. 2. A first resist film forming step of forming a lower resist film in which an opening for exposing a wiring forming portion is formed on a substrate, and a step around the opening on the surface of the lower resist film. An electrode layer forming step of forming a feeding electrode layer by a film-forming means having a strong directional property including a portion; a second resist film forming step of forming an upper layer resist film on the feeding electrode layer; A wiring pattern forming step of forming an opening of a plating layer forming pattern by exposing the feeding electrode layer including a peripheral step portion corresponding to the opening of the lower resist film, and feeding exposed in correspondence with the wiring pattern. Electroplating voltage is applied to the electrodes, and a plating wiring layer forming step of forming a wiring layer by electroplating in the openings corresponding to the wiring pattern, and a portion excluding the portion corresponding to the wiring layer. Method for producing a plated wiring, characterized by comprising an etching step of removing the serial feeding electrode.