JPH05315211A - Control apparatus of wafer for semiconductor use - Google Patents

Abstract

PURPOSE:To simply control and treat a wafer by a method wherein, when a malfunction is eliminated, an integrated microcomputer changes its own recorded data to a state that an abnormality is eliminated by an operator and an integrated program is resumed and completed on the basis of the changed and recorded data. CONSTITUTION:An integrated microcomputer 1 comprehensively controls the operation situation of individual devices in the whole process. In addition, it comprehensively controls the wafer treatment parameter of the individual devices in the whole process. In addition, it comprehensively controls the location and the state of respective wafers. When a conveyance error, a trouble or the like is caused and an abnormal state that the wafers are broken or the like is caused, the microcomputer corrects its own control data on the basis of a wafer number which is input manually or automatically and which indicates that the abnormal state has been caused. The microcomputer changes the control data to data indicating a new state that the abnormal state has been eliminated; the data is transferred to microcomputers 2 in the individual devices.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvement of a semiconductor wafer management device. In particular, it is an object of the present invention to provide a semiconductor wafer management device capable of simplifying wafer management and processing when a malfunction occurs in the semiconductor wafer management device and improving production efficiency. Regarding improvement.

[0002]

2. Description of the Related Art A conventional semiconductor wafer management apparatus will be described below with reference to the drawings.

FIG. 4 is an explanatory view of the configuration of a semiconductor manufacturing apparatus and a wafer management apparatus in, for example, an etching step in the semiconductor manufacturing process. Referring to FIG. 4, in the figure, 3 is a general microcomputer for monitoring the wafer processing / transportation status in the entire etching process and accumulating the wafer processing results, and 4 is provided in each of the processing equipment and the transportation equipment, and each of them It is a microcomputer controlled based on the program. Reference numeral 5 is an etching processing apparatus, and 6 is a wet processing apparatus. Reference numeral 7 is a wafer transfer device installed between the etching processing device 5 and the wet processing device 6.

Next, the above-mentioned integrated microcomputer and the microcomputers provided in the respective processing devices / conveying devices will be described in detail. FIG. 5 is a diagram showing a configuration of a semiconductor wafer management apparatus according to a conventional technique, a general microcomputer, and management contents managed by each microcomputer.

As shown in the figure, the microcomputer provided in each processing device / transport device manages the operation status of the device based on the management table of the installed device, and performs wafer processing in each device. Wafer processing management based on the parameter management table,
Wafer status management (whether before processing, during processing, or processing completion status) is based on the wafer status management table, and the integrated microcomputer
Based on the management information transferred from the individual microcomputers described above, the overall management of the operating status of each device in the overall process (device management) and the overall management of the wafer processing parameters of each device in the overall process (wafer processing management )
And the comprehensive management of the location and status of each wafer (wafer status management) are management contents. The wafer status management described above is a management table (FIG. 6) indicating which number of wafer is in which apparatus, and a status management table indicating the status of wafers in each apparatus (before processing, during processing, or after processing). (FIG. 7) and the transfer management table (FIG. 8) indicating where the wafer is on the way of transfer.

In the above-described conventional wafer management apparatus, if an abnormal state such as a wafer crack occurs due to a transfer error or failure, the apparatus is temporarily stopped and cracked. Replace the existing wafer with a new one, maintain the initially planned number of wafers in the equipment, and manage the wafers without disturbing the order of healthy wafers, or Are carried in reverse, all the wafers are collected, and the process is repeated from the beginning.

[0007]

As described above, in the semiconductor wafer management apparatus according to the prior art, when an abnormal state occurs in the wafer due to a transfer error or a failure, the processing is temporarily stopped. However, it is impossible to continue manufacturing unless the wafer in which this abnormal state has occurred is replaced with a new wafer, or the wafer is reversely transported and all the wafers are collected and restarted from the beginning. There is a drawback that the processing takes a long time and the production efficiency is remarkably reduced.

An object of the present invention is to eliminate this drawback, and it is possible to simplify the management and processing of wafers when a malfunction occurs in the semiconductor wafer management apparatus, and to improve the production efficiency. An object of the present invention is to provide a semiconductor wafer management apparatus capable of performing the above.

[0009]

The above object can be achieved by any of the following means.

The first means is installed so that a plurality of processing devices or transfer devices, which are controlled by a microcomputer, which are each controlled by an individual program, operate sequentially, and are controlled by a general program. When a malfunction occurs in the semiconductor wafer management device that is comprehensively controlled by the microcomputer, the operation of the semiconductor wafer management device is temporarily stopped, and the operator manually operates the semiconductor wafer management device. The abnormal condition of the management device is eliminated, and the number of the wafer in which this abnormal condition exists and is eliminated is manually input to the general microcomputer, and then the general microcomputer is corrected by the worker. Change the recorded data of the self, and the changed recorded data Based in a management device of the semiconductor wafer is completed to resume the overall program of the.

The second means is installed so that a plurality of processing devices or transfer devices controlled by a microcomputer, which are each controlled based on an individual program, sequentially operate, and is controlled based on a comprehensive program. When this operation occurs in the semiconductor wafer management apparatus that is comprehensively controlled by the microcomputer, the operation of the semiconductor wafer management apparatus is once stopped, and the worker manually operates the semiconductor wafer management apparatus. The abnormal condition of the wafer management device is eliminated, and then the integrated microcomputer automatically changes its own recording data to the state in which the abnormality has been resolved by the worker, and based on the changed recording data. hand,
This is a semiconductor wafer management device which is completed by restarting the comprehensive program.

[0012]

In the semiconductor wafer management apparatus according to the present invention, the integrated microcomputer is additionally provided with a function of correcting its own management data.
The microcomputer of each processing device / conveying device is additionally provided with a function of correcting its own management data according to the corrected management data transferred from the general microcomputer. If an abnormal condition such as a wafer breaks due to a transport error or failure, the number of the wafer in which the above abnormal condition occurs after the abnormal condition is resolved by a worker or the like. To the general microcomputer manually or automatically, and the general microcomputer corrects its own management data to a new state in which the above abnormal condition is resolved (for example, the wafer number in which the abnormal condition occurs is treated as a missing number). ). Then, the corrected management data is transmitted to the microcomputers of the respective processing devices and transfer devices, and the management data of the microcomputers of the respective devices described above is corrected according to the transmitted management data to process and transfer the wafers. Is resumed.

Therefore, even if an abnormal state occurs in a wafer due to a transport error or a failure, the conventional technique is to replace the wafer with a new wafer or reversely transport the wafer to recover all the wafers and start over from the beginning. Since it is not necessary to perform the processing, it is possible to restart the wafer processing and transfer in an extremely short time as compared with the conventional technique.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor wafer management apparatus according to an embodiment of the present invention will be described below with reference to the drawings.

The present embodiment is an apparatus for managing a semiconductor wafer in a semiconductor manufacturing process, for example, an etching process. In the etching process, the semiconductor wafer is subjected to an etching process in an etching processing apparatus, and then the first
Is carried by the second carrying device, carried into the wet processing device, wet-processed in the wet processing device, and then returned to the etching processing device. This step is the same as in the case of the conventional technique shown in FIG. The processing device and the transporting device are each provided with a microcomputer that is controlled based on each individual program, and an integrated microcomputer is provided above these microcomputers. This computer constitutes a semiconductor wafer management device.

FIG. 1 is a diagram showing a configuration of a semiconductor wafer management apparatus according to an embodiment of the present invention, a general microcomputer, and management contents managed by each microcomputer.

Referring to FIG. 1, in the figure, 1 is an integrated microcomputer, and 2
Is a microcomputer of each processing device / transport device.

As shown in the figure, the microcomputer 2 provided in each processing device / conveying device manages the operating condition of the device based on the individual program based on the management table of the device in which it is installed. , Wafer processing management by the wafer processing parameter management table in each device, wafer status (whether before processing, during processing, or after processing) wafer status management by the management table When an abnormal state such as a failure occurs, a correction process of correcting its own management data is executed according to the correction data transferred from the general microcomputer. Further, the comprehensive microcomputer 1 manages the operation status of each device in the overall process based on the integrated program based on the management information transferred from the individual microcomputers 2. Wafer processing management that comprehensively manages the wafer processing parameters of the equipment, wafer status management that comprehensively manages the location and status of each wafer, and abnormal conditions such as wafer cracking due to transport errors or failures When an error occurs, it corrects the management data that it has based on the number of the abnormal state occurrence wafer that is manually or automatically input, and changes the management data to a new state where the abnormal state is resolved, The correction processing to be transferred to the computer is executed.

FIGS. 2 and 3 show flowcharts of management data correction when the above-mentioned abnormal state occurs. 2 and FIG. 3. FIG. 2 is a flowchart of correction in the integrated microcomputer, and FIG. 3 is a flowchart of correction in the microcomputer of each device.

The flow chart of the correction in the integrated microcomputer is as follows. Wafer state management information in a state in which the abnormal state is resolved is collected (a).

Wafer state management information for each device stored before the occurrence of the abnormal state is corrected based on the collected management information, and the corrected management data is created in the work area (b).

The data in the work area is transferred to the microcomputer of each apparatus and a correction request is made (c). Again, the wafer state management information of the microcomputer of each device is collected (d).

It is judged whether the wafer state management information of the microcomputer of each apparatus is corrected, and if not corrected, the step (a) and the subsequent steps are repeated (e). If it has been corrected, the data in the work area is copied to the management table, the correction is completed, and the wafer processing / transfer is restarted (f).

The flow chart of the correction in the microcomputer of each device is as follows. Wafer state management information in a state in which the abnormal state is resolved is transferred to the general microcomputer (a).

The corrected management data is received from the integrated microcomputer (b). It is judged whether or not its own wafer state management information matches the received management data (c).

If they match, the correction data transferred from the integrated microcomputer is copied to the wafer state management table (d). When they do not match and when the copying is completed in the step (d), the wafer management information is transferred to the integrated microcomputer (e).

[0027]

As described above, the semiconductor wafer management apparatus according to the present invention includes a microcomputer for controlling the wafer processing apparatus or the transfer apparatus based on each individual program, and a superordinate program for the microcomputer. Comprised of a comprehensive microcomputer controlled based on the above, the microcomputer provided in each device is added to the device management, wafer processing management, and wafer status management, respectively, and when an abnormal condition occurs, its own wafer status management table Perform the correction process to correct the data of
In addition, the integrated microcomputer adds to the overall device management, the overall wafer processing management, and the overall wafer status management over the entire process, and corrects the data in its own overall management table when an abnormal condition occurs. Since it is necessary to perform processing, when an abnormal condition occurs, in the conventional technology, the wafer in which an abnormality such as a crack has occurred is replaced with a new wafer, or the wafer is transported backwards and all the wafers are collected and restarted from the beginning. It is possible to smoothly restart the wafer processing step by simply correcting the data in the management table without the need of performing such processing.

Therefore, the present invention provides a semiconductor wafer management apparatus capable of simplifying wafer management / processing when a malfunction occurs in the semiconductor wafer management apparatus and improving production efficiency. Can be provided.

[Brief description of drawings]

FIG. 1 is a configuration diagram and a management content explanatory diagram of a semiconductor wafer management apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart of management data correction in the integrated microcomputer when an abnormal state occurs.

FIG. 3 is a flowchart of management data correction in a microcomputer of each device when an abnormal state occurs.

FIG. 4 is a configuration explanatory view of a semiconductor manufacturing apparatus and a wafer management apparatus in an etching process.

FIG. 5 is an explanatory diagram of a configuration and management content of a semiconductor wafer management apparatus according to a conventional technique.

FIG. 6 is a wafer management table (wafer number and wafer number) in the integrated microcomputer.

FIG. 7 is a wafer state management table in the integrated microcomputer.

FIG. 8 is a wafer transfer management table between each device in the integrated microcomputer.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Comprehensive microcomputer (present invention) 2 Microcomputer of each apparatus (present invention) 3 General microcomputer (conventional technology) 4 Microcomputer of each apparatus (conventional technology) 5 Etching processing apparatus 6 Wet processing apparatus 7 Wafer transfer apparatus

Claims (2)

[Claims] 1. A general microcomputer, which is installed so that a plurality of processing devices or transfer devices, each controlled by a microcomputer controlled by a respective program, operate sequentially, and which is controlled by a general program. When a malfunction occurs in the controlled semiconductor wafer management apparatus, the operation of the semiconductor wafer management apparatus is temporarily stopped, and the operator manually operates the semiconductor wafer management apparatus in an abnormal state. To eliminate
Further, the number of the wafer that has been eliminated due to the presence of the abnormal condition is manually input to the general microcomputer, and then the general microcomputer changes the recorded data of itself to a state in which the abnormality has been resolved by the worker, A semiconductor wafer management apparatus, wherein the integrated program is restarted and completed based on the changed recording data. 2. A general microcomputer which is installed so that a plurality of processing devices or transfer devices, each of which is controlled by a microcomputer which is controlled by a respective program, are sequentially operated, and which is controlled by a general program. When a malfunction occurs in the controlled semiconductor wafer management apparatus, the operation of the semiconductor wafer management apparatus is temporarily stopped, and the operator manually operates the semiconductor wafer management apparatus in an abnormal state. Then, the comprehensive microcomputer automatically changes its own recording data in a state in which the abnormality is resolved by the worker, and restarts the comprehensive program based on the changed recording data. A semiconductor wafer management device characterized by being completed.