JPH05313195A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the power consumption of the integrated circuit of a driving circuit part and to eliminate a leak current due to the parasitic channel of the switching transistor of a pixel part by making a specific semiconductor single-crystal silicon layer thinner than the silicon layer in an area where a driving circuit element group is formed. CONSTITUTION:At the driving circuit part, the thickness t3 of the single crystal silicon in the area of an N type MOS transistor is made thicker than the thickness t2 of the single crystal silicon in the area of a P type MOS transistor. Consequently, neither of the bottoms of the source electrode 1007 and drain electrode 1008 of the N type MOS transistor contacts a silicon oxide film 11 as a substrate and the bottom of a field oxide film 1005 in the area where the N type MOB transistor is formed, i.e., in a P well 1006 does not contacts the silicon oxide film 11 as the substrate. Consequently, the parasitic channel of the N type MOS transistor is not generated and the leak current is suppressed small.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat plate type light valve driving substrate device used in a direct view type display device, a projection type display device and the like. More specifically, the present invention relates to a semiconductor integrated circuit board device in which a pixel electrode group, a switch element group, and a drive circuit element group are formed on a semiconductor silicon single crystal film on an electrically insulating material. This substrate device is integrally incorporated in a liquid crystal panel, for example, and constitutes a so-called active matrix device.

[0002]

2. Description of the Related Art Conventionally, active matrix devices are
Amorphous silicon or polycrystalline silicon is formed on an electrically insulating material, such as a transparent glass substrate or a transparent quartz substrate, and pixel electrode groups, switch element groups,
And a part or all of the drive circuit element group. However, no attempt has been made to form all of the pixel electrode group, the switch element group, and the drive circuit element group on the semiconductor silicon single crystal film on the electrically insulating material.

[0003]

There are five problems to be solved by the present invention. One is the power consumption of the drive circuit, 2
The third is the leakage current of the switching transistor in the pixel portion due to light, the third is the fixing of the substrate potential of the switching transistor in the pixel portion, and the fourth is the N specific to the single crystal silicon wafer (hereinafter referred to as the SOI wafer) on the insulating substrate. Type M
The fifth is the leakage current of the OS transistor and the fifth is the operation of the drive circuit formed on the semiconductor silicon single crystal film on the electrically insulating material.

The greatest advantage of forming the drive circuit and the switching transistor of the pixel portion on the monocrystalline silicon integrated with each other is high speed because the mobility of the transistor is high as compared with the case of forming on the polycrystalline silicon or amorphous silicon. It can be said that there is sex. As will be described later, when a MOS transistor is formed on a thin semiconductor silicon single crystal on an electrically insulating substrate, an N-type MOS transistor tends to generate a leak current. Therefore, it can be considered that both the drive circuit and the switching transistor in the pixel portion are made of the P-type MOS transistor alone. However, in this case, the power consumption due to the DC component of the drive circuit increases.

In a semiconductor device for a light valve substrate using a liquid crystal, light is applied to the region formed in the pixel electrode group through the liquid crystal. Usually, each switching transistor for selectively supplying power to the pixel electrode group is formed at a position very close to each corresponding pixel electrode. For this reason,
Even if an attempt is made to block light only in a region where each switching transistor is present, some of the light is incident on the switching transistor region due to the wraparound of the light with which the pixel electrode portion is irradiated. When single crystal silicon is irradiated with light, the amount of electron-hole pairs generated in the single crystal silicon varies depending on the wavelength of the light, but a large amount of electrons
Generate a pair of holes. Switching transistor is MO
If it is an S-type transistor, one of the electrons and holes flows into the drain electrode and the other into the substrate electrode, resulting in a leak current. If this leakage current is large, the ratio of the drain current when the switching transistor is ON and when it is OFF (hereinafter simply referred to as ON / OFF ratio) cannot be made large, and a semiconductor device for a light valve substrate with a high contrast ratio cannot be obtained. ..

In the pixel portion, hundreds of thousands of switching transistors are independently formed. At this time, when the substrate potential is taken from the substrate terminal outside the pixel portion to fix the substrate potential of the switching transistor, the resistance of the substrate is high because the single crystal silicon on the insulating substrate is thin and each transistor has a high resistance. It is difficult to firmly fix the substrate potential of. Further, when each switching transistor in the pixel portion is isolated in an island shape, the substrate potential cannot be supplied from the substrate terminal outside the pixel portion through the inside of the single crystal silicon substrate.

If the substrate potential is not firmly fixed,
When the switching transistor in the pixel portion is a MOS transistor, carriers of either electrons or holes generated in the drain are easily accumulated in the substrate, which makes the transistor characteristics unstable. Further, since the thickness of the single crystal silicon on the electrically insulating material is thin, there is a problem that a leak current is likely to occur especially in the N-type MOS transistor.

Finally, single crystal silicon (SOI: Silicon On Insulator) on an electrically insulating material
In general, those having a thickness in the range of several Å to 2 μm are often used. Complementary metal oxide semiconductor circuit (hereinafter referred to as CMO) formed in normal single crystal silicon.
If a drive circuit consisting of an S circuit) is directly formed on a thin silicon layer of an SOI wafer, it may not operate. This is because if the silicon thickness of the SOI wafer is too thin and you want to fix the potential at a certain position on the silicon substrate,
This is because, if an attempt is made to obtain the substrate potential with the contact electrode at a position apart from that position, the substrate potential cannot be firmly fixed because the resistance between the substrate and the contact is too high.

The present invention has the above-mentioned five problems, namely, the power consumption of the driving circuit, the leak current of the switching transistor due to light, the fixing of the substrate potential of the switching transistor, and the semiconductor silicon single crystal film on the electrically insulating material. The purpose is to solve the operation of the drive circuit formed above.

[0010]

The present invention has the following means in order to solve the above-mentioned problems. (1) The drive circuit for selectively operating the switching transistor of the pixel portion is composed of at least a CMOS circuit. (2) The thickness of the single crystal silicon layer in the region where the switching transistor of the pixel portion is formed is smaller than the thickness of the single crystal silicon layer in the region where the drive circuit is formed.

(3) The switching transistor in the pixel portion is formed of a P-type MOS transistor. (4) A high-concentration impurity of the same type as that of the substrate is provided in the immediate vicinity of the switching transistor in the pixel portion including the MOS transistor. The metal wiring arranged to supply the substrate potential from the drive circuit is electrically connected to the high concentration impurity region.

(5) In the CMOS circuit forming the driving circuit, the lower parts of the source and drain of the N-type MOS transistor are separated from the electrically insulating material. (6) In the CMOS circuit forming the drive circuit, the lower part of the field oxide film for element isolation in the P well made of the P type impurity in which the N type MOS transistor is formed is an electrically insulating material. Away from.

(7) In the drive circuit section including the CMOS circuit, the thickness of the single crystal silicon layer in the region where the N-type MOS transistor is formed is the same as that of the single crystal silicon layer in the region where the P-type MOS transistor is formed. Thicker than thickness.

[0014]

With the above-mentioned means, the semiconductor device for a light valve substrate according to the present invention consumes less power in the drive circuit and has a low power consumption.
The leak current of the type MOS transistor is small, the substrate potential can be fixed, and stable operation becomes possible.
Further, the switching transistor of the pixel portion of the semiconductor device of the present invention has a small leak current both when light is irradiated and when light is not irradiated, and the substrate potential in the region where the transistor is formed is stably fixed. , And ON / OFF
It has excellent characteristics that enable stable operation with a high ratio.

[0015]

FIG. 2 is a perspective view showing the structure of a semiconductor device for a light valve substrate which is an active matrix type device. Two
1 is a silicon oxide film (SiO 2) which is an electrically insulating substrate.
₂ films) and 22 are semiconductor single crystal silicon films on the electrically insulating substrate 21. Reference numeral 23 denotes a drive electrode for driving each pixel, and no opaque single crystal silicon remains under the drive electrode 23. Reference numeral 24 is a switching transistor for selectively supplying power to the drive electrode of each pixel. In FIG. 2, this switching transistor comprises a field effect MOS transistor. Reference numeral 25 denotes a signal line connected to the drain electrode of each switching transistor 24. Reference numeral 26 indicates a scanning line connected to the gate electrode of each switching transistor 24. 27 is each signal line 2
An X driver for giving a signal to 5 and a Y driver for giving a signal to each scanning line 26 are shown. Drive electrode 23 of each pixel, switching transistor 24, signal line 2
5, scan line 26, X driver 27, Y driver 28
Is formed in the semiconductor single crystal silicon film 22 or on the semiconductor single crystal silicon film 22 via an insulating film.

The semiconductor device of the present invention is characterized in that the X driver 27 and the Y driver 28 shown in FIG. 2 are CMOS circuits. A single N-type MOS transistor or a single P-type MOS transistor circuit consumes a large amount of DC component, and a CMOS circuit consumes less power in a stationary state, and a low power consumption semiconductor device for a light valve substrate is provided. realizable.

The drive circuit of the present invention basically needs to be composed of a CMOS circuit, and may be composed of a so-called BiCMOS circuit in which a bipolar circuit is further added to the CMOS circuit. FIG. 3 shows a cross-sectional view of the switching transistor of the pixel portion. Reference numeral 31 is an electrically insulating substance having a thickness of about 1 micron of SiO ₂ film, 32 is a semiconductor single crystal silicon island-shaped formed on the electrically insulating substance SiO ₂ film 31, and 33 and 34 are P-type A source electrode and a drain electrode of the MOS transistor, 35 is a gate electrode made of a polycrystalline silicon film, and 36 is a gate oxide film made of a SiO ₂ film. Reference numeral 37 indicated by a broken line represents a boundary of a depletion layer which occurs when a negative voltage is applied to the drain electrode 34 and the gate electrode 35. Depletion layers occur above and to the right of dashed line 37. Reference numeral 38 represents incident light, and 39 and 310 represent electrons and holes generated in the depletion layer by the incident light 38, respectively. The holes 310 generated by the light reach the drain electrode due to the electric field in the depletion layer and become a drain current. On the other hand, the electrons reach the substrate electrode if it is nearby, but if they do not exist, they accumulate near the boundary 37 of the depletion layer, lower the potential barrier between the source and the substrate, and play the role of extracting holes from the source electrode. I will end up. As described above, the electron-hole pair generated in the depletion layer by light increases the leak current and serves to lower the transistor characteristics, particularly the ON / OFF ratio.

To reduce the leak current due to this light,
The volume of silicon in which the transistor is formed may be made as small as possible. However, when the desired current value of the transistor is determined, the length and width of the transistor are naturally determined. In that case, in order to reduce the volume of silicon, it is sufficient to reduce the thickness of silicon in the region where the transistor is formed. That is, the thickness ts of silicon shown in FIG. 3 may be made as small as possible.

FIG. 4 shows the relationship between the drain current and the gate voltage when light is applied and when it is turned off. The broken line shows the characteristics when the light is irradiated, and the solid line shows the characteristics when the light is turned off. When the gate voltage becomes a sufficiently large value and a sufficiently large current flows in the channel of the transistor, the current values at the time of light irradiation and at the time of OFF become equal. Here, the light leakage current is the drain current i _ol during light irradiation when the gate voltage Vg is zero.

FIG. 5 shows the measurement results of the light leakage current i _0l and the silicon thickness ts when the silicon transistors of the MOS transistor having the same length and width are changed and the same intensity of light is irradiated. As expected, the thinner the silicon thickness ts, the smaller the light leakage current. Figure 6
FIG. 3 is a cross-sectional structural view in the length direction of an N-type MOS transistor formed in single crystal silicon of an electrically insulating material. 6
1 is a P-well made of P-type impurities, 62 is a gate oxide film, 63 is a gate electrode made of a polycrystalline silicon film, and 64 is a gate electrode.
And 65 are a source and a drain made of high-concentration N-type impurities, 66 is an underlying silicon oxide film (SiO ₂ film) having a thickness of several thousand Å to 1 μm, 67 is a field oxide film for separating transistors. Reference numeral 68 denotes a silicon oxide film for electrically separating the metal wiring (not shown) from the gate electrode 63.

In FIG. 6, the single crystal silicon layer is a P well made of P type impurities, a source 64 and a drain 65.
Consists of. As shown in FIG. 6, when the thickness of this single crystal silicon layer is thin, the bottom surfaces of the source 64 and the drain 65 are in contact with the underlying silicon oxide film 66. Similarly, the bottom surface of the field oxide film 67 is also in contact with the underlying silicon oxide film 66.

Normally, in the boron forming the P well, the boron concentration is extremely thin on the single crystal silicon side due to the segregation of boron at the boundary between the single crystal silicon and the silicon oxide film. When the source 64 and the drain 65 are in contact with the underlying silicon oxide film 66, the concentration of boron forming the P well at the boundary 69 between the P well and the underlying silicon oxide film is very thin, so that the boundary 69 is newly formed. It becomes a parasitic channel, resulting in a leak current.

FIG. 7 is a cross-sectional structural view in the width direction of an N-type MOS transistor formed in single crystal silicon which is an electrically insulating material. The sectional structure diagram of FIG. 7 is a sectional structure diagram in a direction perpendicular to the sectional structure diagram of FIG. 6. Reference numeral 71 is a P-well made of P-type impurities, 72 is an underlying silicon oxide film (SiO ₂ film) having a thickness of several thousand Å to 1 μm, 73 is a gate oxide film, 74 is a field oxide film, and 75 is a polycrystal also serving as a gate electrode. A silicon film 76 is a silicon oxide film for electrically separating the metal wiring (not shown) from the gate electrode 75. The source and the drain are on the front side and the rear side in the direction perpendicular to the paper surface, and the direction of the electric current is also in the direction perpendicular to the paper surface.

The end portion of the field oxide film 74 is usually formed in a tapered shape, and the portion 77 is called a bird's beak. After forming the field oxide film 74, a very thin single crystal silicon layer is formed under the bird's beak 77. Boron is usually used as the P-type impurity forming the well 71. When the single crystal silicon is oxidized, boron existing near the silicon surface is more likely to be incorporated in the silicon oxide film than remains in the silicon. Therefore, when field oxidation is performed, a considerable amount of boron at the portion 78 of the single crystal silicon under the bird's beak is absorbed in the field oxide film, and the boron concentration at that portion becomes considerably low.

Generally, in the case of an insulated gate field effect transistor, a portion where a current flows is called a channel, which is directly under the gate insulating film. If the boron concentration in the channel portion is high to some extent, the gate voltage for forming the channel (hereinafter abbreviated as Vth) is also high. When the source 64 and the drain 65 are in contact with the underlying oxide film 66,
The area 78 where the boron concentration is very low under the bird's beak
It creates a new current path between the source and drain.
In addition, Vth for forming the new current path
Is very low.

FIG. 8 is a plan view of an N-type field effect insulated gate transistor. Reference numeral 81 is a source, 82 is a drain, 83 is a gate made of polycrystalline silicon, and 84 is a field oxide film formed on island silicon. The boron concentration becomes lower under the bird's beak of the field oxide film.
A low h h parasitic channel occurs.

With this parasitic channel, if the gate voltage is raised, current will begin to flow at the point 85 below the bird's beak before current will flow to the original channel immediately below the gate insulating film. When this transistor is used as a switching transistor for supplying power to the pixel electrode, the ON / OFF ratio of the transistor (the ratio of the current flowing through the transistor when the transistor is conducting and not conducting: i _on / i
_off ) has to take a value of, for example, 6 digits or more, but the presence of the parasitic channel at 85 in FIG.
It becomes a value of about 4 digits. Thus, the N-type MO formed on the thin single crystal silicon film on the electrically insulating material
The S transistor has a large leak current and is not suitable as a switching transistor for supplying power to the pixel electrode.

In the case of a P-type MOS transistor formed on a thin single crystal silicon film on an electrically insulating material, an N well is formed in a very thin single crystal silicon layer under the bird's beak shown at 78 in FIG. The concentration of the N-type impurities (for example, phosphorus and arsenic) existing therein is high because they remain in the single crystal silicon rather than being trapped in the oxide film. Therefore, Vth in this region is high, and in the P-type MOS transistor, a parasitic channel does not occur in the region of the extremely thin single crystal silicon layer below the bird's beak. Therefore, the present invention is characterized in that a P-type MOS transistor is adopted as the switching transistor for supplying power to the pixel electrode.

FIG. 9 is a plan view showing the structure of the active matrix type device. 91 is single crystal silicon on an electrically insulating material, 92 is a scanning line made of polycrystalline silicon,
Reference numeral 93 is a drive electrode for driving each pixel made of polycrystalline silicon having a thickness of several hundred liters, 94 is a source made of a high-concentration impurity layer in single-crystal silicon, and 95 is also a high-concentration source in the single-crystal silicon. A drain composed of an impurity layer, 96
Is a contact hole that connects each source 94 to each pixel drive electrode 93, and 97 is a contact hole that connects each drain 95 to a signal line made of aluminum.

FIG. 10 shows a sectional view in the length direction of each transistor in the pixel portion, that is, a sectional view taken along the line AA 'in FIG. This transistor is a P-type MOS transistor. 101 is an N well made of N-type impurities, 102
Is a gate oxide film, 103 is a gate electrode made of a polycrystalline silicon film, 104 and 105 are sources and drains each made of high-concentration P-type impurities, 106 is an underlying silicon oxide film having a thickness of several thousand Å to several μm, 107 Is a field oxide film for isolation between transistors, 108 is a thin polycrystalline silicon film that connects the source 104 and the pixel drive electrode,
109 is a silicon oxide film for separating the polycrystalline silicon film for the gate electrode and the polycrystalline silicon 108 for the pixel drive electrode, 110 is a signal line made of Al (aluminum), 1
Reference numeral 11 is a signal line 110 and polycrystalline silicon 1 for pixel drive electrodes.
8 shows an intermediate insulating film (silicon oxide film) for separating 08.

The signal line 110 and the drain 105 are electrically connected. In FIG. 10, the single crystal silicon layer is composed of a well 101 made of P-type impurities, a source 104 and a drain 105. As shown in FIG. 10, when the single crystal silicon layer is thin, the bottom surfaces of the source 104 and the drain 105 are in contact with the underlying silicon oxide film 106.

Since the thickness ts of the single crystal silicon on the underlying silicon oxide film 106 is thin, the bottom of the field oxide film 107 contacts the underlying oxide film 106. The potential of the N well 101 must be firmly fixed for stable operation of the transistor in the pixel portion. If the potential of the N well 101 is to be the same as the substrate potential of single crystal silicon, the field oxide film 10 shown in FIG.
7 does not have single crystal silicon, or although not shown, since single crystal silicon below the field oxide film 107 is very thin, a region where the drive circuit outside the pixel portion is formed, that is, Even if an attempt is made to obtain a substrate potential from the substrate terminal in the X driver 27 or the Y driver 28 shown in FIG. 2 through the inside from the single crystal substrate, it is impossible or nearly impossible.

FIG. 11 is a plan view showing an example of the structure of the active matrix type device of the present invention. 111 is single crystal silicon on an electrically insulating material, 112 is a scanning line made of polycrystalline silicon, 113 is a drive electrode for driving each pixel made of polycrystalline silicon having a thickness of several hundred liters, 1
Reference numeral 14 is a source made of a high concentration P-type impurity layer in single crystal silicon, 115 is a drain also made of a high concentration P-type impurity layer in single crystal silicon, 116 is a high concentration N-type impurity layer region, and 117 is Source 114 and pixel drive electrode 1
13 is a contact hole for connecting 13; 118 is a contact hole for connecting the drain 105 and a signal line made of aluminum; 119
Indicates a contact hole that connects the high-concentration N-type impurity layer region and another aluminum that provides a ground potential.

FIG. 12 is a cross-sectional view in the length direction of transistors in the pixel portion of the active matrix type device of the present invention,
That is, it shows a cross-sectional view of the straight line BB 'in FIG. This transistor is a P-type MOS transistor. 1
Reference numeral 21 is an N well made of N-type impurities, 122 is a gate oxide film, 123 is a gate electrode made of a polycrystalline silicon film,
Reference numeral 124 is a source made of high-concentration P-type impurities, 125 is a high-concentration N-type impurity layer region, and 126 is a thickness of several thousand Å to several μ.
m is a base silicon oxide film, 127 is a field oxide film for separating transistors, and 128 is a source 1
24, a thin polycrystalline silicon film that connects the pixel driving electrodes with 24
Reference numeral 29 is a silicon oxide film for separating the polycrystalline silicon film for the gate electrode and polycrystalline silicon 128 for the pixel drive electrode, 1210 is an aluminum wire for giving a ground potential, 12
Reference numeral 11 denotes an intermediate insulating film (silicon oxide film) for separating the aluminum line 1210 for giving the ground potential and the polycrystalline silicon 128 for pixel driving electrodes.

In FIG. 12, the drain region is not drawn. The drain region is on the back side of this drawing. X
Since the aluminum wire 1210 for giving a ground potential drawn from the driver region or the Y driver region is electrically connected to the high-concentration N-type impurity layer region, it is in contact with the high-concentration N-type impurity layer region. N well 121
The potential of is fixed to the ground potential ,.

FIG. 13 is a longitudinal sectional view of an N-type MOS transistor provided in a drive circuit of a semiconductor device for a light valve substrate according to the present invention. 131 is a P-well made of P-type impurities, 132 is a gate oxide film, 133 is a gate electrode made of a polycrystalline silicon film, 134 and 135 are sources and drains made of high-concentration N-type impurities, 13
6 is an underlying silicon oxide film (Si having a thickness of several thousand Å to 1 μm).
O ₂ film), 137 is a field oxide film for separating transistors, and 138 is a silicon oxide film for electrically separating a metal wiring (not shown) from the gate electrode 133. ing.

As is apparent from FIG. 13, the source 134
The drain 135 is not in contact with the underlying silicon oxide film 136. Therefore, in FIG. 6, a parasitic channel that occurs at the boundary 69 between the P well 61 and the underlying silicon oxide film 66 as described above occurs at the boundary 139 between the P well 131 and the underlying silicon oxide film in FIG. do not do.

FIG. 14 is a cross-sectional view in the width direction of an N-type MOS transistor provided in the drive circuit of the semiconductor device for a light valve substrate according to the present invention. The sectional structure view of FIG. 14 is shown in FIG.
FIG. 3 is a sectional structural view in a direction perpendicular to the sectional structural drawing of FIG. 1
Reference numeral 41 is a P-well made of P-type impurities, 142 is an underlying silicon oxide film (SiO ₂ film) having a thickness of several thousand Å to 1 μm, 1
43 is a gate oxide film, 144 is a field oxide film, 14
5 is a polycrystalline silicon film which also serves as a gate electrode, and 146 is
A silicon oxide film for electrically separating the metal wiring (not shown) from the gate electrode 145 is shown. The source and the drain are on the front side and the rear side in the direction perpendicular to the paper surface, and the direction of the electric current is also in the direction perpendicular to the paper surface.

The end portion of the field oxide film 144 is usually formed in a tapered shape, and the portion 147 is called bird's beak. In the semiconductor device for a light valve substrate of the present invention, the bird's beak 1 is formed after the field oxide film 144 is formed.
Underneath 47, a single crystal silicon layer having a certain thickness remains. Therefore, P at 148 just below the bird's beak
The concentration of boron, which is a P-type impurity forming the well, is such that boron is supplied from inside the P well below 148 immediately below the bird's beak during the oxidation when forming the field oxide film 144, and directly below the bird's beak in FIG. Significantly higher than the boron concentration at 78. Therefore, in the semiconductor device for a light valve substrate of the present invention, the parasitic channel that occurs at both ends in the width direction of the transistor as described in FIGS. 7 and 8 does not occur.

FIG. 1 is a structural sectional view of a drive circuit section and a pixel section of a semiconductor device for a light valve substrate according to the present invention. Figure 1
Shows a structural sectional view of the pixel portion on the right side 1/3 and a structural sectional view of the drive circuit on the left side 2/3. In FIG. 1, 1
Reference numeral 1 denotes an electrically insulating silicon oxide film having a thickness of about several thousand Å to 1 μm. In the semiconductor single crystal silicon film, 12 is a P well made of a P-type impurity having a low concentration, 13 is a drain electrode made of a P-type impurity having a high concentration, 14 is a source electrode also made of a P-type impurity having a high concentration, and 15 is a source electrode. Gate electrode made of polycrystalline silicon, 16
Indicates a gate electrode made of a silicon oxide film,
From these, a P-type MOS transistor serving as a switching transistor of the pixel electrode is formed. By forming the switching transistor of the pixel electrode by the P-type MOS transistor in this way, even if the thickness t ₁ of the single crystal silicon layer of the transistor portion is thinned, the parasitic channel is not formed, the leak current is small, and it is thin. Since a single crystal layer can be formed, even if light is applied to this transistor portion, few electron-hole pairs are generated in the transistor, and it is possible to suppress the leak current generated by light irradiation to a small value.

A signal line 25 made of aluminum 12 is electrically connected to the drain electrode 13 in FIG. The gate electrode 15 also serves as the scanning line 26 leading to the pixel portion. Reference numeral 17 denotes a driving electrode of a pixel portion which is made of a polycrystalline silicon film having a thin thickness of several hundreds to 1000 Å so as to maintain transparency, and is directly electrically connected to the source electrode 14 of the switching transistor.

Reference numeral 18 denotes a silicon oxide film covering the pixel electrode 17, and 19 denotes a field oxide film formed at the boundary between the pixel portion and the driving circuit. The field oxide film 19 has a step difference between the pixel portion side and the drive circuit portion side. In FIG. 1, 1000 is a P-type MOS in the drive circuit.
This is an N well made of a lightly doped N-type impurity in a region forming a transistor. Reference numerals 1001 and 1002 denote a drain electrode and a source electrode made of high-concentration P-type impurities, respectively. Reference numeral 1003 denotes a gate insulating film made of a silicon oxide film, and 1004 denotes a gate electrode made of a polycrystalline silicon film. The P-type MOS transistor in the driving circuit portion includes an N well 1000, a drain electrode 1001, a source electrode 1002, a gate insulating film 1003, and a gate electrode 10.
It is formed from 14. In FIG. 1, reference numeral 1005 denotes a field oxide film at the boundary between a P-type MOS transistor and an N-type MOS transistor, which are complementary MOS transistors constituting a drive circuit, and electrically separates these two types of transistors. Is. This field oxide film 1005 also has a step like the field oxide film 19.

Reference numeral 1006 denotes a P well made of a lightly doped P-type impurity, 1007 and 1008 a source electrode and a drain electrode respectively made of a high-concentration N-type impurity, 1009 a gate insulating film made of a silicon oxide film, and 1010 a polycrystal. A gate electrode made of silicon. These P well 1006, source electrode 1007, drain electrode 100
8, the gate insulating film 1009, and the gate electrode 1010 form an N-type MOS transistor in the driving circuit portion.

In this drive circuit portion, the thickness t ₃ of the single crystal silicon in the region of the N-type MOS transistor is P-type MO.
It is thicker than the thickness t ₂ of single crystal silicon in the region of the S transistor. Since the thickness t ₃ of the single crystal silicon of the drive circuit portion is large, the bottoms of the source electrode 1007 and the drain electrode 1008 of the N-type MOS transistor are not in contact with the underlying silicon oxide film 11. Further, in the drive circuit portion, the bottom of the field oxide film 1005 in the region where the N-type MOS transistor is formed, that is, in the P well is not in contact with the underlying silicon oxide film 11. By
The parasitic channel of the N-type MOS transistor described above does not occur, and the leak current can be suppressed to a small value.

Reference numeral 1011 is a gate electrode 1 of each transistor.
5, 1004, 1010 and a metal wiring 1013 made of aluminum in the drive circuit section or a signal line 1012 made of aluminum in the pixel section are formed of a silicon oxide film for electrical isolation. 1014 is a silicon nitride film which is a passivation film, 1015 is a transparent adhesive, 1016
Indicates a transparent glass substrate having a thickness of about 500 μm to 1 mm. The adhesive 1015 bonds the semiconductor substrate having the integrated circuit formed on the electrically insulating substrate and the transparent glass substrate 1016 serving as the supporting substrate thereof.

Reference numeral 1017 denotes a light shielding film for shielding the entire integrated circuit forming the switching transistor and the driving circuit of the pixel portion. As the light-shielding film, for example, chromium having a thickness of several thousand Å is used. Although not shown in FIG. 1, liquid crystal is incorporated under the pixel portion. Furthermore, of liquid crystal,
A common electrode is formed on the side opposite to the side where the pixel transistor section is formed (lower side in the drawing), and a voltage is applied between this common electrode and the pixel electrode 17 to orient the liquid crystal in a desired direction. .. In this way, the semiconductor device for a light valve substrate of the present invention is formed.

In FIG. 1, the N-type M of the drive circuit is used.
The thicknesses of the single crystal silicon of the three types of transistor portions, that is, the OS transistor, the P-type MOS transistor, and the P-type MOS transistor, which is a switching transistor of the pixel portion, are different, but in the semiconductor device for a light valve substrate of the present invention, The P-type MOS transistor of the drive circuit section and the P-type MOS transistor section, which is a switching transistor of the pixel section, may have the same thickness of single crystal silicon. At that time, of course, the thickness of the single crystal silicon of the N-type MOS transistor portion of the drive circuit portion is thicker than the thickness of the single crystal silicon of the P-type MOS transistor portion of both the drive circuit portion and the pixel portion.

[0048]

As described above in detail, in the semiconductor device for a light valve substrate of the present invention, the power consumption of the integrated circuit of the driving circuit portion is small, and there is no leakage current due to the parasitic channel of the switching transistor of the pixel portion. Moreover, the light leakage current due to the light irradiation is small, and the N-type MOS transistor as well as the P-type transistor in the drive circuit section has an excellent property that the leakage current due to the parasitic channel is small.

[Brief description of drawings]

FIG. 1 is a structural sectional view of a semiconductor device for a light valve substrate of the present invention.

FIG. 2 is a perspective view showing a configuration of a semiconductor device for a light valve substrate.

FIG. 3 is a cross-sectional view of a switching transistor structure of a pixel portion of the present invention.

FIG. 4 is a graph showing the relationship between gate voltage and drain current when light is irradiated and when light is not irradiated.

FIG. 5 is a graph showing the relationship between the thickness of a transistor having the same length and width and the light leakage current when irradiated with light of the same intensity.

FIG. 6 is a structural cross-sectional view in the longitudinal direction of an N-type MOS transistor on an electrically insulating material.

FIG. 7 is a cross-sectional structural view of an N-type MOS transistor on an electrically insulating material in the width direction.

FIG. 8 is a plan view of an N-type MOS transistor on an electrically insulating material.

FIG. 9 is a plan view showing the configuration of an active matrix type device.

FIG. 10 is a structural cross-sectional view in the length direction of a transistor in a pixel portion.

FIG. 11 is a plan view showing a configuration of an active matrix type device of the present invention.

FIG. 12 is a structural cross-sectional view in the length direction of a transistor of a pixel portion of the present invention.

FIG. 13 is a structural cross-sectional view in the length direction of an N-type MOS transistor on an electrically insulating material according to the present invention.

FIG. 14 is a cross-sectional structural view in the width direction of an N-type MOS transistor on an electrically insulating material according to the present invention.

[Explanation of symbols]

 11 Base Silicon Oxide Film 16, 1003, 1009 Gate Oxide Film 15, 1004, 1010 Gate Electrode 12, 1000 N Well 1006 P Well 14, 1002, 1007 Source Electrode 13, 1001, 1008 Drain Electrode 19, 1005 Field Oxide Film 1012 Aluminum Signal line 1014 Passivation 1015 Transparent adhesive 1016 Transparent glass substrate 1017 Light-shielding film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Internal reference number FI Technical indication location H01L 29/784 (72) Inventor Tsuneo Yamazaki 6-31-1, Kameido, Koto-ku, Tokyo Seiko Denshi Industry Co., Ltd.

Claims (6)

[Claims] 1. A switch element group for selectively feeding power to a pixel electrode group and a drive circuit element group for selectively operating the switch element group are formed on a semiconductor silicon single crystal film on an electrically insulating material. In the semiconductor device for a light valve substrate, the drive circuit element group is formed of at least a complementary MOS transistor integrated circuit, and semiconductor single crystal silicon in a region in which a switch element group for selectively feeding power to the pixel electrode group is formed. A semiconductor device for a light valve substrate, wherein a thickness of the layer is thinner than a thickness of the semiconductor single crystal silicon layer in a region where the drive circuit element group is formed. 2. The semiconductor device for a light valve substrate according to claim 1, wherein the switch element group that selectively feeds power to the pixel electrode group is a P-type insulated gate field effect transistor. 3. The high-concentration impurity region of the same type as that of the substrate is provided in the pixel electrode group in the immediate vicinity of a switch element for selectively feeding power. Semiconductor device for light valve substrate. 4. In a drive circuit formed of at least a complementary MOS transistor integrated circuit, the bottoms of the source electrode and drain electrode of the N-type MOS transistor in the drive circuit are separated from the electrically insulating material. The semiconductor device for a light valve substrate according to claim 1, 2, or 3. 5. A drive circuit formed of at least a complementary MOS transistor integrated circuit is in a P-type impurity region, that is, a P-well region, which is a region of the drive circuit in which an N-type MOS transistor is formed. 5. The semiconductor device for a light valve substrate according to claim 1, wherein the bottom of the field oxide film is separated from the electrically insulating material. 6. A switch element group for selectively feeding power to a pixel electrode group and a drive circuit element group for selectively operating the switch element group are formed on a semiconductor silicon single crystal film on an electrically insulating material. In the semiconductor device for a light valve substrate, in the region where the drive circuit element group is formed, the thickness of the single crystal silicon in the region where the N-type MOS transistor is formed is the same as the region where the P-type MOS transistor is formed. 6. The semiconductor device for a light valve substrate according to claim 1, wherein the semiconductor device is thicker than the single crystal silicon.