JPH05308141A - Field effect transistor - Google Patents

Abstract

PURPOSE:To obtain a field effect transistor at a low cost wherein the gate length is small, high frequency characteristics are excellent, and the back gate effect is not generated, so that isolation characteristics is excellent. CONSTITUTION:On a semiconductor substrate 1, an island type semiconductor part having a wall surface vertical to the main surface of the substrate is formed by mesa etching. The whole part of the island type semiconductor forms an active layer 2 of a conductivity type. So as to be in contact with the island type semiconductor part wherein the active layer 2 is formed on the whole part, the following are formed in order around the semiconductor part by vapor- deposition; a source electrode 3 composed of Au: Ge, Ni, Au, an insulating film 4, a gate electrode 5 composed of Ti, Pt, Au, an insulating film 4', and a drain electrode 6 composed of Au: Ge, Ni, Au. These constitute a laminate structure. The source electrode 3 and the drain electrode 6 form ohmic junctions with the active layer 2, and the gate electrode 5 forms a Schottky junction.

Description

Description: FIELD OF THE INVENTION The present invention relates to a field effect transistor,
In particular, it relates to a MES type Schottky barrier field effect transistor. FIG. 4 is a sectional view showing a conventional example. An active layer 12 is formed on the semiconductor substrate 11 by selective ion implantation or epitaxial growth. On the active layer 12, a source electrode 13 and a drain electrode 14, which are formed by sequentially stacking Au: Ge, Ni, and Au, for example, are formed on the active layer 12 by a photolithography process. I am doing it. At the center of the source electrode 13 and the drain electrode 16, for example, Ti, Pt,
A gate electrode 15 is formed by sequentially stacking Au. The gate electrode 15 forms a Schottky junction with the active layer 12. Generally, in such a field effect transistor (FET), it is known that the high frequency characteristics are improved by reducing the gate length (Lg in the figure) of the gate electrode 15. As a method of forming the gate electrode 15, first, a photoresist is spin-coated, exposure is performed using a photomask on which a pattern of the gate electrode is formed, and the photoresist on the gate electrode region is developed,
Using this photoresist as a mask, Ti, Pt, Au
Are sequentially deposited, and unnecessary Ti, Pt, and Au are lifted off from the photoresist, so that the gate electrode 15 is formed. Therefore, the gate length Lg of the gate electrode 15 can be reduced by shortening the pattern of the gate electrode of the photomask.
Is shortened. As described above, in the conventional example, the gate electrode is formed by using the photolithography process. In this photolithography process, UV exposure is usually performed, but with UV exposure, when the gate length is 0.5 μm or less, and the length is about the same as the wavelength, it becomes difficult to form the gate electrode. Therefore, in order to form a fine gate electrode having a short gate length, an expensive apparatus such as an EB exposure apparatus or a reduction exposure apparatus must be used, which causes a problem of high cost. Further, when forming a semiconductor integrated circuit using the field effect transistor of the conventional example, a so-called back gate effect occurs in which a current from an adjacent element seeps out from the FET semiconductor substrate to the active layer. Therefore, there is a drawback that good isolation characteristics cannot be obtained. According to the field effect transistor of the present invention, an island-shaped semiconductor portion is formed on a semiconductor substrate, and an active layer is formed on at least a wall surface of the island-shaped semiconductor portion. A source electrode, a gate electrode, and a drain electrode are formed in a laminated shape so that at least a part of each electrode is in contact with the active layer. Further, the field effect transistor of the present invention is characterized in that the entire island-shaped semiconductor portion is an active layer. In the field effect transistor of the present invention, since the gate length is controlled by the film thickness of the gate electrode, even a fine gate electrode having a short gate length can be formed by ordinary UV exposure. .. In addition, in the present invention, when the entire island-shaped semiconductor portion is used as the active layer, there is no possibility that a current from an adjacent element permeates into the active layer, and the back gate effect does not occur. FIG. 1 is a sectional view showing an embodiment of the present invention. An embodiment of the present invention will be described in detail below with reference to this drawing. An island-shaped semiconductor portion having a wall surface of a regular mesa is formed on the semiconductor substrate 1 by mesa etching. An active layer 2 of one conductivity type is formed on the wall surface of the island-shaped semiconductor portion by selective ion implantation or epitaxial growth. Au: Ge, N so as to contact the active layer 2
Source electrode 3 made of i, Au, insulating film 4, Ti, P
gate electrode 5 made of t, Au, insulating film 4 ', Au: G
The drain electrodes 6 made of e, Ni, and Au are sequentially vapor-deposited to form a laminated structure. At this time, the order of the source electrode 3 and the drain electrode 6 may be reversed. The source electrode 3 and the drain electrode 6 are the active layer 2
Ohmic junction and the gate electrode 5 is Schottky junction. Further, the gate length Lg of the gate electrode 5 is controlled by the film thickness of Ti, Pt, Au deposited, and the film thickness can be easily and accurately controlled by the deposition time or the like. In this embodiment, when the film thickness is d, the gate length Lg = dsin θ. Therefore, it is possible to form the gate electrode 5 having a short gate length which cannot be controlled by the ultraviolet exposure apparatus. FIG. 2 is a sectional view showing another embodiment of the present invention. In this embodiment, an island-shaped semiconductor portion having a wall surface perpendicular to the main surface is formed on the semiconductor substrate 1 by mesa etching. In this case, when the film thickness is d, the gate length Lg = d. FIG. 3 is a sectional view showing still another embodiment of the present invention. In this embodiment, an island-shaped semiconductor portion having a wall surface perpendicular to the main surface is formed on the semiconductor substrate 1.
It is formed by mesa etching. The entire island-shaped semiconductor portion is the active layer 2 of one conductivity type, and the source electrode 3, the insulating film 4, the gate electrode 5, and the insulating film 4 ′ are formed on the opposite two surfaces of the wall surface or on the entire wall surface. The drain electrode 6 is formed in a laminated shape. When the source electrode 3 and the like are formed on two opposing wall surfaces of the island-shaped semiconductor portion, the source electrode 3 or the drain electrode 6, the insulating films 4, 4 ', and the gate electrode 5 are divided. The divided gate electrode 5 and source electrode 3 or drain electrode 6 are electrically connected to each other by bonding. Since the field effect transistor of the present invention has a short gate length, it has good high frequency characteristics. Also,
Even a fine gate electrode with a short gate length can be formed inexpensively and easily by a normal ultraviolet exposure device without using an expensive device such as an EB exposure device or a reduction exposure device, and has good high-frequency characteristics. Is. Further, in the present invention, when the entire island-shaped semiconductor portion is used as the active layer, the back gate effect does not occur, and therefore the isolation characteristic is good.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view showing an example of the present invention. FIG. 2 is a sectional view showing another embodiment of the present invention. FIG. 3 is a sectional view showing still another embodiment of the present invention. FIG. 4 is a cross-sectional view showing a conventional example. [Description of Reference Signs] 1 semiconductor substrate 2 active layer 3 source electrode 4 insulating film 4'insulating film 5 gate electrode 6 drain electrode 11 semiconductor substrate 12 active layer 13 source electrode 14 drain electrode 15 gate electrode

Claims (1)

What is claimed is: 1. An island-shaped semiconductor portion is formed on a semiconductor substrate, an active layer is formed on at least a wall surface of the island-shaped semiconductor portion, and at least a part of each electrode is in contact with the active layer. A field-effect transistor having a source electrode, a gate electrode, and a drain electrode formed on and in a laminated shape. 2. The field effect transistor according to claim 1, wherein the entire island-shaped semiconductor portion is an active layer.