JPH05307618A - Microcomputer - Google Patents

Abstract

PURPOSE:To prevent an A/D converter from being dropped at its A/D conversion accuracy by allowing a central processing unit(CPU) to queue during the A/D conversion of an A/D converter. CONSTITUTION:When the A/D converter 8 stops its operation, the CPU 5 executes convensional operation. When an A/D conversion start signal is inputted to the converter 8, the converter 8 outputs a signal indicating the execution of A/D conversion to the CPU 5 through a signal line (r). The CPU 5 receiving the signal stops the execution of operation and executes queuing processing. At the time of completing A/D conversion, the converter 8 releases the signal indicating the execution of A/D conversion through the signal line (r) and then the CPU 5 restarts operation. Since the CPU 5 stops its operation during the period from the start of operation of the converter 8 up to its end, a memory is not accessed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer incorporating an AD converter.

[0002]

2. Description of the Related Art An AD converter incorporated in a microcomputer compares an analog signal input from the outside of the microcomputer with a reference voltage separately input from the outside, and a plurality of bits based on the ratio with the reference voltage. It is converting to digital data. FIG. 5 is a block diagram of a system using a microcomputer having a built-in AD converter showing an example of a conventional technique. In FIG. 5, the inside of the frame indicated by 1 is a microcomputer,
2 is a peripheral device, 3 is a peripheral system address bus, 4
Is a peripheral system data bus, 5 is a CPU (central processing unit), 6 is a ROM (read-only memory), and 7 is a RAM
(Read-write memory), 58 is an AD converter, 9 is an address port, 10 is a data port, 11 is a 4-bit programmable input / output port, 12 is an address bus, and 13
Is a data bus. a is the address output line of the CPU 5,
b is a data input / output line of the CPU 5, c is an address input line of the ROM 6, d is a data output line of the ROM 6, and e is a RAM 7.
Address input line, f is a data input / output line of RAM 7, g
Is an address input line of the AD converter 58, h is the AD converter 5
8 data input / output lines, i is an address signal line of the address port 9, j is a data signal line of the data port 10, k is an address signal line of the programmable input / output port 11, and 1 is a data signal to the programmable input / output port 11. Line, m
Is an address output line from the address port 9 to the outside, n is a data input / output line between the data port 10 and the outside, o is an address input line of the peripheral device 2, p is a data input / output line of the peripheral device 2, and q0 to q3 Indicate bit 0, bit 1, bit 2 and bit 3 of the programmable input / output port 11, respectively. FIG. 6 is a block diagram showing an example of an 8-bit AD converter 58 incorporated in the microcomputer. 6, 18 is an AD ladder resistor, 19 is a successive approximation register, 20 is an AD register, 2
Reference numeral 1 is an AD conversion control circuit, and 23 is a comparator. A is a reference voltage line input from the outside, B is G input from the outside
ND line, C is an analog input line input from the outside, D0
˜D7 are from the successive approximation register 19 to the AD ladder resistor 18
8-bit data input line to E, E is a comparison voltage output line from the AD ladder resistor 18, F is a control signal line of the comparator 23, and G is a control signal line.
Is the comparison result signal line of the comparator 23, H is the control signal line of the successive approximation register 19, I is the AD conversion result in the AD register 2
A signal line input to 0, and J is a data output line of the AD register 20.

Next, the operation of a system using a conventional microcomputer with a built-in AD converter is shown in FIG.
Will be explained. Microcomputer has internal ROM
6, the CPU 5 outputs the address to the ROM 6 through the address output line a → address bus 12 → address input line c, and the program from the ROM 6 is transmitted through the signal line d → data bus 13 → data. The calculation is performed by fetching it through the input / output line b. When the CPU 5 is using the ROM 6 in the microcomputer 1 to perform an operation, the operation as described above is always performed, and the address bus 12 and the data bus 13 are always "L" →
It changes from "H", "H" to "L". In the inside 1 of the microcomputer, the address bus 12 and the data bus 13 have a large capacity, and the transistors for driving these have a high driving capability. Therefore, when the CPU 5 is operating, inside the microcomputer There may be noise on the power supply. When accessing the external memory, such as when the microcomputer operates using an external memory (not shown) connected as one of the peripheral devices 2, the address output line a → the address bus 12 → the address signal line. i
→ Address port 9 → Address output line m → Peripheral system address bus 3 → Address is output to external memory via address input line o, and data from external memory is input / output line p → Peripheral system data bus 4 → Data Input / output line n → data port 10 → output line j → data bus 13 →
The calculation is performed by loading the data into the CPU 5 via the data input / output line b. When an external memory is accessed, noise is added to the power supply inside the microcomputer 1 and the peripheral system bus is "L" → "H", "H".
→ There may be noise on the power supply of the peripheral board due to the change to "L" and current consumption in peripheral devices. As described above, when the CPU of the microcomputer is performing an operation, it is possible that noise is applied to the power supply inside the microcomputer and the power supply of the peripheral board due to various influences.

Next, the operation of the conventional AD converter in the microcomputer will be described with reference to FIG. First, the reference voltage line A has 5.12 [V], GND
0 [V] for line B and 2.00 for analog input line C
It is assumed that [V] is input. AD ladder resistance 1
In 8, the voltage input to the reference voltage line A is decomposed into 256 steps, and the voltage selected by the value of the 8-bit data D0 to D7 input from the successive approximation register 19 is output to the comparison voltage output line E. Here, the output comparison voltage is “comparison voltage = (reference voltage / 256) × successive comparison register value−reference voltage / 512”. At the start of AD conversion, bit 7 (8-bit data input line D7) is set to “1” and bits 0 to 0 are set as initial values in the successive approximation register.
6 (8-bit data input lines D0 to D6) is set to "0", that is, "10000000B" (binary number),
The comparison voltage output line E outputs a corresponding comparison voltage of 2.55 [V], which is input to the comparator 23.
The comparator 23 controls the control signal line F from the AD conversion control circuit 21.
The above comparison voltage is compared with the voltage of the analog input line C. Since the comparison voltage (2.55 [V])> analog input voltage (2.00 [V]), the signal indicating that the comparison voltage is higher is sent to the AD conversion control circuit 21 via the comparison result signal line G. Is output. As a result, the AD conversion control circuit 21 changes the bit 7 (8-bit data input line D7) to “0” for the successive approximation register 19 via the control signal line H because the comparison voltage is high, and the bit 6 A control signal for setting "1" to (8-bit data input line D6) is output. Then, the successive approximation register 19 stores "0
Since 1000000B "is set, the AD ladder resistor 18 has a corresponding comparison voltage of 1.27 [V].
Is output. As a result of comparison between the comparison voltage and the input voltage by the comparator 23, the comparison voltage (1.27 [V]) <analog input voltage (2.00 [V]). Outputs a signal that is low.
As a result, since the AD conversion control circuit 21 has a low comparison voltage, the bit 6 (8-bit data input line D6) is not changed to the successive approximation register 19 and the bit 5 (8
A control signal for setting "1" to the bit data input line D5) is output. The above operation is repeated eight times in total until bit 0 is determined, and after the 8-bit data is determined, the contents of the successive approximation register are output to the AD register, and the AD conversion is completed. As described above, the analog input voltage is converted into 8-bit digital data by the method described above, but the minimum resolution of the 8-bit AD converter is 20.
Since it is [mV], A in the microcomputer
The D converter is easily affected by fluctuations in the power supply.

[0005]

In the conventional microcomputer having the built-in AD converter, the AD converter operates as a peripheral function separately from the operation of the CPU, and therefore, in the cycle in which AD conversion is performed. Also CPU
, The address bus and the data bus are inverted to "L" → "H", "H" → "L", and noise is applied to the power supply inside the microcomputer and the peripheral board. As a result, for example, in the AD converter of FIG. 6, the analog input voltage is input from the analog input line, the analog input voltage is compared with the reference voltage input from the reference voltage line A by the comparator 23, and AD conversion control is performed. The circuit 21 sets the digital value in the successive approximation register 19. However, this digital value has to be set to, for example, "01111111B" due to the influence of power supply noise, but actually "10000000B".
Therefore, there is a problem in that the accuracy of AD conversion in the AD converter may deteriorate.

The present invention has been made in order to solve the above problems, and makes the CPU stand by during AD conversion to prevent noise from being applied to the power supply inside the microcomputer and the peripheral board. Therefore, it is an object of the present invention to obtain a microcomputer capable of preventing the deterioration of the accuracy of AD conversion.

[0007]

In the microcomputer according to the first aspect of the present invention, as shown in FIG. 1, a central processing unit for performing processing such as calculation and control, and for performing standby processing by inputting an external signal. A microcomputer including at least a (CPU 5) and an AD converter 8 for AD-converting an analog signal into a digital signal, is provided with AD conversion detection means for outputting a signal to the outside when the AD converter is performing AD conversion. When the AD converter is in the process of AD conversion, the output signal of the AD conversion detection means (signal of the signal line r) is input to the central processing unit so that the central processing unit performs the standby processing. I chose In the microcomputer according to the second aspect of the present invention, as shown in FIG. 3, when the AD converter 8 is performing AD conversion, the signal line S indicating the AD conversion from the AD conversion means in the AD converter is being performed. The signal is sent to the central processing unit (CPU
5) Setting means (register 1) for setting whether or not to input
4 etc.). In the microcomputer according to the third aspect of the present invention, as shown in FIG. 4, a central processing unit (CPU5) that performs processing such as calculation and control and performs standby processing by inputting an external signal, and the external signal An external input terminal (input terminal 1) provided to input from the outside
7) and an AD converter 8 for AD-converting an analog signal into a digital signal, in a microcomputer, AD conversion detecting means for outputting a signal on the signal line x to the outside when the AD converter is performing AD conversion. And an external output terminal (output terminal 16) provided to output the output signal from the AD conversion detecting means to the outside, and by connecting the external input terminal and the external output terminal to each other, When the AD converter is in the process of AD conversion, the central processing unit is made to perform a standby process.

[0008]

In the microcomputer according to the first aspect of the present invention, while the AD converter 8 is performing the AD conversion from the analog signal to the digital signal, the AD conversion detecting means detects the AD conversion and outputs the signal. The output signal from the AD conversion means is input to the input terminal of the central processing unit (CPU 5) which performs a standby process. Then, the standby processing is performed by the central processing unit. As a result, during the AD conversion of the AD conversion, the power supply noise caused by the arithmetic processing of the central processing unit is eliminated, and the AD conversion accuracy in the AD converter can be prevented from being lowered. This second
In the microcomputer according to the invention, whether or not the signal from the AD converter for causing the central processing unit (CPU 5) to perform the standby processing is input to the central processing unit while the AD converter is performing AD conversion. It is set by the setting means (register 14 or the like). In the microcomputer according to the third aspect of the present invention, the external output terminal (output terminal 16) and the external input terminal (input terminal 17) are connected, and the same operation as the microcomputer of the first aspect is performed.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a system using a microcomputer incorporating an AD converter according to an embodiment (embodiment 1) of the first invention. In FIG. 1, the same parts as those in the conventional example of FIG. Reference numeral r in FIG. 1 is a signal line for notifying the central processing unit (CPU) that AD conversion is in progress. FIG. 2 is an 8-bit AD which is built in the microcomputer of FIG. 1 and has a function of notifying externally that AD conversion is in progress.
It is a block diagram which shows an example of a converter. In FIG.
18 is an AD ladder resistor, 19 is a successive approximation register, 20
Is an AD register, 21 is an AD conversion control circuit, 23 is a comparator, and 24 is an AD conversion start register as AD conversion detection means. The AD converter 8 has an AD ladder resistor 18
, Successive approximation register 19, AD register 20, A
It is composed of a D conversion control circuit 21, a comparator 23, and an AD conversion register 24. A is a reference voltage line input from the outside, B is a GND line input from the outside, C is an analog input line input from the outside, D0 to D7 are 8-bit data from the successive approximation register 19 to the AD ladder resistor 18. An input line, E is a comparison voltage output line from the AD ladder resistor 18, F is a control signal line of the comparator 23, G is a comparison result signal line of the comparator 23, H is a control signal line of the successive approximation register 19, and I is A signal line for inputting the AD conversion result to the AD register 20, J is a data output line of the AD register 20, and K is AD.
An input signal line to the conversion start register 24, L is an AD conversion start signal, M is an AD conversion end signal line, and N is a signal notifying the outside of the AD converter that AD conversion is in progress.

Next, the operation of the first embodiment will be described with reference to FIG.
Will be explained. When the AD converter 8 is not operating, the CPU 5 operates similarly to the conventional example (FIG. 5). A
When an AD conversion start request is input to the D converter 8, a signal indicating that AD conversion is in progress is output to the CPU 5 via the signal line r. Upon receiving the above signal, the CPU 5 stops the execution of the calculation and performs the waiting process. A
When the D conversion is completed, the AD converter releases the signal on the signal line r indicating that the AD conversion is being performed, and thereby C
PU5 restarts the calculation. By these series of operations,
From the time when the AD converter 8 starts the operation to the time when it ends, the CPU 5 has stopped the operation, and the memory is not accessed. When the CPU 5 does not access the memory, that is, in the standby process, the address bus 12 and the data bus 1 in the microcomputer internal 1
No. 3 is fixed to "H" or "L", and these buses are not inverted from "L" to "H" or "H" to "L", so that noise of the power supply does not occur. Further, since the level of the peripheral system address bus 3 is also fixed, the data output from the external memory is also stopped, and the level of the peripheral system data bus 4 is also fixed, which occurs when these buses change. The noise of the power supply of the peripheral board does not occur. Next, the operation inside the AD converter according to the first embodiment will be described with reference to FIG. In FIG.
The operation during AD conversion is the same as that of the AD converter of FIG. When the operation of the AD converter is started, the AD converter 8 starts its operation by writing "1" data to the AD conversion start register 24 by the program executed by the CPU. In this case, the “0” data written from the data bus 22 via the input signal line K is held in the AD conversion start register 24, and the AD conversion control circuit 21 starts the AD conversion via the AD conversion start signal line L. It is output as a signal. When the AD conversion ends and the operation of the AD converter stops, the AD conversion control circuit 21 outputs an AD conversion end signal via the AD conversion end signal line M, and the value of the AD conversion start register 24 at that time. Is cleared to "0". When the AD converter is operating according to the above operation, the value of the AD conversion start register 24 is "1", and when the AD converter is stopped, the value of the AD conversion start register 24 is "0". Become. Therefore, by outputting the value of the AD conversion start register 24 to the outside through the signal line N, AD
It can notify the outside that conversion is in progress. As described above, according to the first embodiment, by making the CPU 5 stand by during the AD conversion, it is possible to prevent the noise of the power supply inside the microcomputer and the peripheral board and prevent the deterioration of the AD conversion accuracy. .. Further, in the first embodiment, an example in which the CPU operation is stopped when the AD conversion is started and the CPU operation is restarted when the AD conversion is completed has been described. The CPU calculation may be stopped only in a cycle susceptible to noise.

FIG. 3 is a block diagram of a system using a microcomputer incorporating an AD converter according to an embodiment (embodiment 2) of the second invention. In FIG. 3, the same parts as those in the conventional example (FIG. 5) are designated by the same reference numerals and the description thereof will be omitted. In FIG. 3, 14 is a central processing unit (C
PU) 5 is a 1-bit register as setting means for setting standby processing, and 15 is a matching circuit. s is a signal line notifying that the AD converter 8 is performing AD conversion, t is a signal line for inputting the register value to the coincidence circuit, u is a signal line for making the CPU stand by, v is an address input line for the register, and w
Is a data input / output line of the register. Next, the operation of the second embodiment will be described with reference to FIG. The decode address is input to the 1-bit register 14 via the address input line v by the operation of the CPU 5, and the data input / output line w
It is written by inputting data via.
The value written in this register is input to the matching circuit 15 via the signal line t. When the value of this register is "0", the matching circuit 15 does not output a signal for making the CPU 5 stand by on the signal line u regardless of the signal input via the signal line s. When the value of the register is "1" and the signal indicating that AD conversion is being performed is not input through the signal line s, the signal for causing the CPU to stand by is not output to the signal line u. When the value of the register is "1" and a signal indicating that AD conversion is being performed is input through the signal line s, a signal for making the CPU stand by is output through the signal line u. Due to the operation of these coincidence circuits 15, when the register value is "0", the same operation as that of the microcomputer incorporating the conventional AD converter 8 is performed and the register value is "1".
In this case, the same operation as that of the microcomputer including the AD converter according to the first embodiment is performed. As described above, according to the second embodiment, when the register value is "1", by making the CPU stand by during the AD conversion, it is possible to prevent the noise of the power supply inside the microcomputer and the power supply of the peripheral board.
It is possible to prevent deterioration of AD conversion accuracy. Further, when the register value is "0", the same operation as the conventional microcomputer having the built-in AD converter can be performed.

FIG. 4 is a block diagram of a system using a microcomputer incorporating an AD converter according to an embodiment (embodiment 3) of the third invention. In FIG. 4, the same parts as those in the conventional example (FIG. 5) are designated by the same reference numerals and the description thereof will be omitted. In FIG. 4, reference numeral 16 is an output terminal as an external output terminal for notifying the outside of the microcomputer that AD conversion is in progress, and 17 is an input as an external input terminal having a function of making the existing CPU stand by in this microcomputer. It is a terminal. Further, x is a signal line notifying that AD conversion is in progress, y is a connection line outside the microcomputer, and z is a signal line for making the CPU stand by. Next, the operation of the fourth embodiment will be described with reference to FIG. AD
When the converter 8 starts operating, a signal indicating that AD conversion is being performed is output to the output terminal 16 via the signal line x.
For example, when the AD converter 8 starts operating, the output terminal 1
"0" is output to 6 and "1" is output to the output terminal 16 when the AD converter is not operating.
The input terminal 17 is a terminal having a function of making the CPU stand by at a certain level.
When "0" is input to, the signal for stopping the operation is input to the CPU via the signal line z, and when "1" is input, the signal for executing the operation is input to the CPU via the signal line z. Have the ability to As described above, in the microcomputer including the terminal having the above-mentioned function, the output terminal 16 and the input terminal 17 are connected by the external connection line y so that the CPU starts when the AD converter starts operating. Stops the operation, and when the AD converter stops operating, the CPU starts the operation. As described above, according to the third embodiment, as in the first embodiment, by making the CPU stand by during the AD conversion, it is possible to prevent the noise of the power supply inside the microcomputer and the power supply of the peripheral board.
It is possible to prevent deterioration of AD conversion accuracy.

[0013]

As described above, according to the first aspect of the present invention, since the central processing unit is made to stand by while the AD converter is performing AD conversion, noise is generated in the power source of the inside of the microcomputer and the peripheral board. It is possible to prevent this from happening, and it is possible to prevent a decrease in the accuracy of AD conversion of the AD converter. According to the second aspect of the present invention, the user can freely set whether or not the central processing unit should be on standby. Therefore, in addition to the effect of the first aspect, it is necessary to perform the function processing for the central processing unit. There is an effect that can be freely selected according to. According to the third aspect of the present invention, the AD conversion for outputting the signal to the outside while the AD converter is performing the AD conversion to the microcomputer having the external input terminal for inputting the signal for causing the central processing unit to perform the standby processing Detection means,
Since the external output terminal for outputting the output signal from the AD conversion detecting means to the outside is provided and the external input terminal and the external output terminal are connected, the input terminal is provided in addition to the effect of the first invention. It has an effect that it can be easily used in the microcomputer.

[Brief description of drawings]

FIG. 1 is a block diagram of a system using a microcomputer incorporating an AD converter showing an embodiment of the first invention.

FIG. 2 is a block diagram showing an example of an AD converter incorporated in the microcomputer of FIG.

FIG. 3 is a block diagram of a system using a microcomputer incorporating an AD converter showing an embodiment of the second invention.

FIG. 4 is a block diagram of a system using a microcomputer incorporating an AD converter showing an embodiment of the third invention.

FIG. 5 is a block diagram of a system using a microcomputer having a built-in AD converter according to the related art.

FIG. 6 is a block diagram showing an example of an AD converter incorporated in the microcomputer of FIG.

[Explanation of symbols]

 1 Microcomputer Internal 2 Peripheral device 3 Peripheral system address bus 4 Peripheral system data bus 5 CPU 6 ROM 7 RAM 8, 58 AD converter 9 Address port 10 Data port 11 Programmable input / output port 12 Address bus 13 Data bus 14 1-bit register 15 coincidence circuit 16 output terminal 17 input terminal 18 AD ladder resistance 19 successive approximation register 20 AD register 21 AD conversion control circuit 22 data bus 23 comparator

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] October 1, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction content]

Next, the operation of the conventional AD converter in the microcomputer will be described with reference to FIG. First, the reference voltage line A has 5.12 [V], GND
0 [V] for line B and 2.00 for analog input line C
It is assumed that [V] is input. AD ladder resistance 1
In 8, the voltage input to the reference voltage line A is decomposed into 256 steps, and the voltage selected by the value of the 8-bit data D0 to D7 input from the successive approximation register 19 is output to the comparison voltage output line E. Here, the output comparison voltage is “comparison voltage = (reference voltage / 256) × successive comparison register value−reference voltage / 512”. At the start of AD conversion, bit 7 (8-bit data input line D7) is set to “1” and bits 0 to 0 are set as initial values in the successive approximation register.
6 (8-bit data input lines D0 to D6) is set to "0", that is, "10000000B" (binary number),
The comparison voltage output line E outputs a corresponding comparison voltage of 2.55 [V], which is input to the comparator 23.
The comparator 23 controls the control signal line F from the AD conversion control circuit 21.
The above comparison voltage is compared with the voltage of the analog input line C. Since the comparison voltage (2.55 [V])> analog input voltage (2.00 [V]), the signal indicating that the comparison voltage is higher is sent to the AD conversion control circuit 21 via the comparison result signal line G. Is output. As a result, the AD conversion control circuit 21 changes the bit 7 (8-bit data input line D7) to “0” for the successive approximation register 19 via the control signal line H because the comparison voltage is high, and the bit 6 A control signal for setting "1" to (8-bit data input line D6) is output. Then, the successive approximation register 19 stores "0
Since 1000000B "is set, the AD ladder resistor 18 has a corresponding comparison voltage of 1.27 [V].
Is output. As a result of comparison between the comparison voltage and the input voltage by the comparator 23, the comparison voltage (1.27 [V]) <analog input voltage (2.00 [V]). Outputs a signal that is low.
As a result, since the AD conversion control circuit 21 has a low comparison voltage, the bit 6 (8-bit data input line D6) is not changed to the successive approximation register 19 and the bit 5 (8
A control signal for setting "1" to the bit data input line D5) is output. The above operation is repeated eight times in total until bit 0 is determined, and after the 8-bit data is determined, the contents of the successive approximation register are output to the AD register, and the AD conversion is completed. In this way, the analog input voltage is converted into 8-bit digital data by the method described above. When the reference voltage is 5.12 [V],
Since the minimum resolution of the 8-bit AD converter is 20 [mV], the AD converter in the microcomputer is easily affected by the fluctuation of the power supply.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0005

[Correction method] Change

[Correction content]

[0005]

In the conventional microcomputer having the built-in AD converter, the AD converter operates as a peripheral function separately from the operation of the CPU, and therefore, in the cycle in which AD conversion is performed. Also CPU
, The address bus and the data bus are inverted to "L" → "H", "H" → "L", and noise is applied to the power supply inside the microcomputer and the peripheral board. As a result, for example, in the AD converter 6, the analog input voltage is input from the analog input line, the A
The analog input is compared with the comparison voltage from the AD ladder resistor 18 by the comparator 23, and a digital value is set in the successive approximation register 19 by the AD conversion control circuit 21. However, due to the influence of power supply noise, this digital value
For example, "01111111B" must be set, but actually "10000000B",
There is a problem that the accuracy of AD conversion in the AD converter may deteriorate.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction content]

Next, the operation of the first embodiment will be described with reference to FIG.
Will be explained. When the AD converter 8 is not operating, the CPU 5 operates similarly to the conventional example (FIG. 5). A
When an AD conversion start request is input to the D converter 8, a signal indicating that AD conversion is in progress is output to the CPU 5 via the signal line r. Upon receiving the above signal, the CPU 5 stops the execution of the calculation and performs the waiting process. A
When the D conversion is completed, the AD converter releases the signal on the signal line r indicating that the AD conversion is being performed, and thereby C
PU5 restarts the calculation. By these series of operations,
From the time when the AD converter 8 starts the operation to the time when it ends, the CPU 5 has stopped the operation, and the memory is not accessed. When the CPU 5 does not access the memory, that is, in the standby process, the address bus 12 and the data bus 1 in the microcomputer internal 1
No. 3 is fixed to "H" or "L", and these buses are not inverted from "L" to "H" or "H" to "L", so that noise of the power supply does not occur. Further, since the level of the peripheral system address bus 3 is also fixed, the data output from the external memory is also stopped, and the level of the peripheral system data bus 4 is also fixed, which occurs when these buses change. The noise of the power supply of the peripheral board does not occur. Next, the operation inside the AD converter according to the first embodiment will be described with reference to FIG. In FIG.
The operation during AD conversion is the same as that of the AD converter of FIG. When the operation of the AD converter is started, the AD converter 8 starts its operation by writing "1" data to the AD conversion start register 24 by the program executed by the CPU. In this case, data was written from the data bus 22 via the input signal line K.
The “1” data is held in the AD conversion start register 24 and is output as an AD conversion start signal to the AD conversion control circuit 21 via the AD conversion start signal line L. When the AD conversion ends and the operation of the AD converter stops, the AD conversion control circuit 21 outputs an AD conversion end signal via the AD conversion end signal line M, and the value of the AD conversion start register 24 at that time. Is cleared to "0". When the AD converter is operating according to the above operation, the value of the AD conversion start register 24 is "1", and when the AD converter is stopped, the value of the AD conversion start register 24 is "0". Become. Therefore, by outputting the value of the AD conversion start register 24 to the outside through the signal line N, AD
It can notify the outside that conversion is in progress. As described above, according to the first embodiment, by making the CPU 5 stand by during the AD conversion, it is possible to prevent the noise of the power supply inside the microcomputer and the peripheral board and prevent the deterioration of the AD conversion accuracy. .. Further, in the first embodiment, an example in which the CPU operation is stopped when the AD conversion is started and the CPU operation is restarted when the AD conversion is completed has been described. The CPU calculation may be stopped only in a cycle susceptible to noise.

[Procedure amendment 4]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 1

[Correction method] Change

[Correction content]

[Figure 1]

[Procedure Amendment 5]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 3

[Correction method] Change

[Correction content]

[Figure 3]

[Procedure Amendment 6]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 4

[Correction method] Change

[Correction content]

[Figure 4]

[Procedure Amendment 7]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 5

[Correction method] Change

[Correction content]

[Figure 5]

Claims (3)

[Claims] 1. A central processing unit that performs processing such as calculation and control and also performs standby processing by inputting an external signal, and an AD that performs AD conversion of an analog signal into a digital signal.
A microcomputer provided with at least a converter comprises AD conversion detection means for outputting a signal to the outside when the AD converter is performing AD conversion, and when the AD converter is performing AD conversion, the AD conversion detection is performed. A microcomputer, characterized in that the output signal of the means is input to the central processing unit to cause the central processing unit to perform standby processing. 2. A setting means for setting whether or not the output signal of the AD conversion detecting means from the AD converter is input to the central processing unit when the AD converter is performing AD conversion. The microcomputer according to claim 1, further comprising: 3. A central processing unit that performs processing such as calculation and control and also performs standby processing by inputting an external signal, an external input terminal provided for externally inputting the external signal, and an analog signal. AD to digital signal
In a microcomputer including at least an AD converter for converting, AD conversion detecting means for outputting a signal to the outside when the AD converter is performing AD conversion, and A
An external output terminal provided to output the output signal from the D conversion detecting means to the outside, and by connecting the external input terminal and the external output terminal, the AD converter is performing AD conversion. A microcomputer characterized in that the central processing unit is made to perform a standby process at a certain time.