JPH05304513A - Method and circuit for spread spectrum synchronization - Google Patents

Abstract

PURPOSE:To quickly lock the initial state into a bit phase synchronization state. CONSTITUTION:A prescribed voltage, e.g. larger than a voltage EV is fed to a loop filter 10 for a delay lock loop circuit (DLL) through a changeover device 9 while being in sliding correlation and a charge is stored in a capacitor being a component of the filter 10 and the voltage of the capacitor due to the stored charge is EV, then a control voltage when the DLL circuit is selected in the sliding correlation state is EV and the locking to bit phase synchronization is started by this voltage. Thus, the locking to the bit phase synchronization is quickly implemented from the initial state.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention switches a synchronous operation to a bit phase synchronous follow-up operation by a delay lock loop circuit as a bit phase synchronous follow-up circuit after synchronous acquisition of a pseudo noise code by a sliding correlator as a synchronous acquisition circuit. At this time, a clock frequency close to the pseudo noise code generation clock frequency on the transmission side is set to the voltage controlled oscillation circuit for pseudo noise code generation that is commonly provided for each of the sliding correlator and the delay lock loop circuit. The present invention relates to a spread spectrum synchronization method and a circuit thereof, in which a control voltage capable of oscillating is temporarily and forcibly applied to quickly bring a bit phase synchronization state without causing loss of synchronization. is there.

[0002]

2. Description of the Related Art Generally, in a spread spectrum communication system which is highly confidential, a signal modulated by transmission information is
Further, by performing spread spectrum modulation with a pseudo noise code called a PN code, information is transmitted from the transmitting side in a state where the signal power is spread over a wide band. Therefore, the receiver side demodulates the spread signal, that is,
When despreading, the received signal is demodulated into a narrow band modulated signal by multiplying the received signal by the same pseudo noise code as on the transmission side. At that time, the phase of the pseudo noise code is changed to the received signal. It is necessary to synchronize the bit phase with that of the pseudo-noise code in. This is because if bit phase synchronization is not established between the pseudo noise codes, the information remains encrypted and normal spread spectrum communication cannot be performed.

As described above, the bit phase synchronization of the pseudo-noise code sequence is the most important item for the spread spectrum communication system, but in the synchronization circuit of the spread spectrum communication system according to the prior art, the pseudo correlator is used to simulate Using the autocorrelation characteristics of the noise code, it is considered that the code synchronization is completed only when the demodulated signal exceeds a certain level, and the delay lock loop circuit (hereinafter referred to as DLL circuit) uses the pseudo noise code. In order to perform bit phase synchronization,
The synchronous operation is switched from the sliding correlator side to the DLL circuit side. In the DLL circuit, the bit phase synchronization tracking operation within 1 bit is performed,
Bit phase synchronization is established between pseudo noise codes. In addition, regarding this type of technology,
For example, JP-A-2-220525 can be mentioned.

[0004]

By the way, so far, the spread spectrum communication system has not been used for high-speed mobile communication, but between fixed stations such as satellite communication or between low-speed mobile stations and fixed stations. Since it was exclusively used for inter-communication, even if the time required to pull it from the initial state to the bit phase synchronization state is several tens of seconds to several minutes, there is almost no problem in actual operation. Has become. As described above, in ordinary spread spectrum communication, it is not necessary to consider the speedup of bit phase synchronization so much, and when the synchronous operation is switched from the sliding correlator to the DLL circuit,
Even if the synchronization is lost, the resynchronization has a sufficient time margin.

The problem with the spread spectrum synchronizing circuit configured as described above is that the sliding correlator and the DLL circuit require (voltage control type) oscillation in the receiving side device in order to reduce the size and weight. This is the case when the circuits are provided in common. However, when the oscillation circuit is provided in common, a large difference (discontinuity) is always generated in the control voltage of the oscillation circuit when the synchronous operation shifts from the sliding correlation to the DLL circuit. Therefore, it is impossible to pull in the bit phase synchronization, and the synchronization loss occurs. In order to eliminate this loss of synchronization, it is conceivable to make the rising characteristic of the DLL circuit gentle by reducing the difference in control voltage with respect to the oscillation circuit when the synchronous operation is transferred to the DLL circuit from the sliding correlation. Be done. However, to reduce the difference in the control voltage of the oscillation circuit when the synchronous operation is transferred from the sliding correlation to the DLL circuit, it is necessary to reduce the clock frequency for generating the pseudo-noise code at the time of synchronous acquisition by the sliding correlation and the D
The difference from the pseudo-noise code generation clock frequency after the phase synchronization is established by the LL circuit becomes small, and accordingly, much time is required until the synchronization is captured. On the contrary, in order to speed up the acquisition from the initial state to the bit phase synchronization, the clock frequency for generating the pseudo noise code at the time of synchronization acquisition by the sliding correlation and the DLL
While it is necessary to set the difference from the pseudo-noise code generation clock frequency after the phase synchronization is established by the circuit as large as possible, the DLL is designed to increase the number of pseudo-noise code matches.
It is necessary to speed up the rising characteristics of the circuit, but how to quickly absorb the large difference in control voltage when shifting the synchronous operation from the sliding correlation to the DLL circuit remains a new issue. Has become.

An object of the present invention is to provide a spread spectrum synchronization method and a circuit therefor capable of promptly pulling from an initial state to a bit phase synchronization state.

[0007]

DISCLOSURE OF THE INVENTION The above-mentioned object is to provide a DLL after the pseudo noise code is synchronously captured by a sliding correlator.
When the synchronous operation is switched to the bit phase synchronous tracking operation by the circuit, the pseudo noise on the transmission side is compared to the voltage controlled oscillator circuit for generating the pseudo noise code, which is commonly provided for each of the sliding correlator and the DLL circuit. This is achieved by temporarily and forcibly applying, in the form of accumulated charges, a control voltage capable of oscillating a clock frequency close to the code generation clock frequency. Further, as the spread spectrum synchronization circuit, when a voltage controlled oscillation circuit for generating a pseudo noise code is provided commonly to each of the sliding correlator and the DLL circuit, a loop filter as one component of the DLL circuit, This can be achieved by at least providing a means for forcibly holding a control voltage capable of oscillating a clock frequency close to the pseudo noise code generation clock frequency on the transmission side before the synchronization acquisition in the form of accumulated charges.

[0008]

In order to speed up the acquisition of the bit phase synchronization from the initial state, the clock frequency for generating the pseudo noise code at the time of synchronization acquisition by the sliding correlation and the DLL.
While it is necessary to set a large difference from the pseudo noise code generation clock frequency after the bit phase synchronization is established by the circuit, it is necessary to speed up the rising characteristic in the DLL circuit in order to increase the number of coincidences of the pseudo noise code. However, when switching from the synchronous acquisition state to the bit phase synchronous tracking operation in order to speed up the rising characteristic, a voltage controlled oscillation for generating a pseudo noise code, which is commonly provided to each of the sliding correlator and the DLL circuit. A control voltage capable of oscillating a clock frequency close to the pseudo noise code generation clock frequency on the transmission side is temporarily and forcibly applied to the circuit in the form of accumulated charge from a loop filter as one component of the DLL circuit. It was designed so that it could be done.

Generally, under the above clock frequency setting conditions for generating pseudo noise codes, the control voltage for the voltage controlled oscillator circuit at the time of synchronization acquisition is relatively large, but when switching to the bit phase synchronization tracking operation. Since the control voltage for the voltage controlled oscillation circuit is small, the control voltage in advance in the form of accumulated charge is used as a loop filter as one component of the DLL circuit so that the control voltage becomes larger than the control voltage at the time of synchronous acquisition. When it is forcibly held, the loss of synchronism does not occur, and the DLL circuit quickly pulls in the bit phase synchronization, so that the intended purpose can be easily achieved. ..

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to FIGS. FIG. 1 shows a block configuration of an example of the spread spectrum synchronizing circuit according to the present invention. In this case, in the initial state, the switches 9 and 11 are in the switching state as shown in the figure, and the sliding correlation is performed. In this state, the voltage controlled oscillator 1
The clock frequency signal from 2 is phase-compared by the phase comparator 15 with the clock frequency signal from the low-frequency oscillator 14 via the frequency divider 13, and the phase comparison result is a sliding loop filter (LPF) 16 and is switched. By acting on the voltage controlled oscillator 12 as a control voltage via the generator 11, the phase of the pseudo noise code generated by the pseudo noise code generator 4 can be continuously changed.

With respect to the received signal S _BS that has been passed through an antenna (not shown) and an amplifier circuit (not shown), a sliding correlator despreading unit 1, a DLL despreading unit 2,
Each of the DLL despreading units 3 multiplies the pseudo-noise code from the pseudo-noise code generator 4 with three kinds of phases having a predetermined phase difference relationship, thereby receiving the received signal S _BS as a modulation signal. Has been despread. From each of the signals thus despread, a specific band signal is further extracted by a filter (not shown),
Sliding correlator detector 5, DLL detector 6,
Each of the 7 is detected. Although these detection outputs are compared with the set threshold value, the DLL detectors 6, 7
The phase difference is detected by the phase difference detector 8 from the comparison result from each. Further, when the comparison result from the sliding correlator detector 5 is equal to or more than the set threshold value, it is determined that the pseudo noise code is in code synchronization, that is, in the state of synchronization acquisition, and the switching devices 9 and 11 are illustrated. The state is switched to the other side. By this switching, the synchronous operation is switched from the sliding correlation side to the DLL circuit side. After switching to the DLL circuit side, the detected phase difference signal from the phase difference detector 8 is a switch 9, a DLL loop filter (LPF) 10, and a switch 1.
By acting on the voltage-controlled oscillator 12 as a control voltage via 1, the phase of the pseudo-noise code generated by the pseudo-noise code generator 4 is continuously changed within 1 bit, and bit phase synchronization is achieved. Will be carried out. By the way, FIG. 2 shows the control voltage to the voltage controlled oscillator circuit in the spread spectrum synchronizing circuit according to the prior art as when switching from the sliding correlation to the DLL circuit. In addition, since the voltage once drops to 0 V and then gradually rises during the switching, the time required for the bit synchronization follow-up is a relatively long time T ₁ . At this time, if the time T1 is large and does not fall within 1 bit of the pseudo noise code, a frequency shift occurs, resulting in loss of synchronization.

On the other hand, in the spread spectrum synchronization circuit according to the present invention, as shown in FIG. 3, the control voltage at the time of switching does not once drop to 0V, and the pulling in from EV to the bit phase synchronization is started. It is supposed to be done.
In the state where the sliding correlation is performed, the switching device 9
From the above, for example, a constant voltage having a voltage value higher than EV is supplied to the DLL loop filter (LPF) 10, so that charges are accumulated in the capacitor as a component of the DLL loop filter (LPF) 10. , Because the voltage due to the accumulated charge is held as EV,
The control voltage at the time of switching from the sliding correlation to the DLL circuit is such that the pull-in from EV to the bit phase synchronization is started. As a result, the time T ₂ required for tracking the bit synchronization is kept small, and as a result, the initial state can be quickly pulled into the bit phase synchronized state.

[0013]

As described above, according to the first and second aspects, a spread spectrum synchronization method and a circuit therefor can be obtained which can quickly pull in the bit phase locked state from the initial state. There is.

[Brief description of drawings]

FIG. 1 is a diagram showing a block configuration of an example of a spread spectrum synchronization circuit according to the present invention.

FIG. 2 is a diagram showing a control voltage applied to a voltage controlled oscillator circuit in a spread spectrum synchronization circuit according to a conventional technique when switching from a sliding correlation to a DLL circuit.

FIG. 3 is a diagram showing a control voltage applied to a voltage controlled oscillator circuit in a spread spectrum synchronization circuit according to the present invention when switching from a sliding correlation to a DLL circuit.

[Explanation of symbols]

1 ... Sliding correlator despreading unit, 2 ... DLL despreading unit, 3 ... DLL despreading unit, 4 ... Pseudo noise code generator, 5 ... Sliding correlator detector, 6 ... DLL detector, 7 ... DLL detector, 8 ... Phase difference detector 9,
11 ... Switching device, 10 ... DLL loop filter, 12 ...
Voltage controlled oscillator, 13 ... Frequency divider, 14 ... Low frequency oscillator, 15 ... Phase comparator, 16 ... Sliding loop filter

Claims (2)

[Claims] 1. When the synchronous operation is switched to the bit phase synchronization follow-up operation by the delay lock loop circuit as the bit phase synchronization follow-up circuit after the synchronization acquisition of the pseudo noise code by the sliding correlator as the synchronization acquisition circuit, A control voltage capable of oscillating a clock frequency close to the pseudo noise code generation clock frequency on the transmission side with respect to the pseudo noise code generation voltage control type oscillation circuit commonly provided for the sliding correlator and the delay lock loop circuit. , But in the form of accumulated charge, it is forcibly and temporarily applied. 2. A bit phase synchronization follow-up circuit after controlling synchronization of a control voltage for a voltage-controlled oscillation circuit for generating a pseudo-noise code, which is provided in common, after synchronization is captured by a sliding correlator as a synchronization capturing circuit. Is a spread spectrum synchronization circuit having a configuration in which a synchronization operation is switched to a bit phase synchronization follow-up operation by the delay lock loop circuit, and a loop filter as one component of the delay lock loop circuit is forcibly forced before synchronization acquisition. A spread spectrum synchronization circuit having at least a means for holding a control voltage capable of oscillating a clock frequency close to the pseudo noise code generation clock frequency on the transmission side in the form of accumulated charges.