JPH06252884A - Spread spectrum signal receiver - Google Patents

Abstract

PURPOSE:To prevent a phase locked loop from being locked while a phase of a sender side PN code and a phase of a receiver side PN code are deviated when synchronization is kept by the carrier lock tracking system (coherent carrier tracking system). CONSTITUTION:Phase relation among a sender side PN code PNT and a carrier S2 in a spread spectrum signal is kept constant. Phase relation between a receiver side PN code PNR and a reference signal S7 is kept constant at a receiver side. The spread spectrum signal is subject to inverse diffusion processing by an inverse diffusion processing device 35. A synchronization acquisition means 37 allows a switch 40 to throw to the position of a contact (b) to close a phase locked loop 44 in a timing when both the PN codes are synchronized thereby keeping synchronization. After the synchronization is finished, a level detector and a control means 72 detects a correlation output and controls a delay of a variable delay means 70 to maximize the level thereby adjusting the relation of phases of the receiver side PN code PNR and the reference signal S7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum signal receiving apparatus, and in the case where synchronization is held by a so-called carrier lock tracking system (coherent carrier tracking system), the phase of the PN code on the transmitting side and the PN code on the receiving side are synchronized. This prevents the phase-locked loop from being locked when the phase shifts.

[0002]

2. Description of the Related Art A spread spectrum communication system has been conventionally known. There, a carrier whose spectrum is spread by, for example, a binary PN code (pseudo noise code) having a spectrum width sufficiently wider than that of the information signal is transmitted, and the receiving side receives the same PN code as that used on the transmitting side. The original information signal is demodulated by detecting the signal.

In such a spread spectrum communication system, in order to accurately demodulate the information signal, the receiving side PN code generated at the receiving side must be synchronized with the transmitting side PN code. This synchronization sequence is divided into synchronization acquisition (initial pull-in) and synchronization holding (tracking), and various methods have been proposed conventionally.

A so-called carrier wave lock tracking method has been conventionally used as a method of maintaining synchronization.
This is because the phase relationship between the carrier wave in the spectrum signal and the PN code is kept constant, and the reception side generates the PN code at the reception side and the reference signal with a constant phase difference, and after synchronization acquisition is completed ( That is, after the phases of the PN code on the transmitting side and the PN code on the receiving side match, the reference signal generator on the receiving side is PLL controlled so as to lock the phases of the carrier wave and the reference signal, thereby maintaining synchronization. It is a thing.

A carrier lock tracking system is shown in FIG. In the transmitter 10, the frequency reference oscillator 12 outputs a signal S ₁ having a predetermined frequency f _T.
The frequency of this signal S ₁ is multiplied by n in the frequency multiplier 14, and a carrier wave S ₂ having a frequency of n · f _T is generated. P
The N code generator 16 uses the signal S ₁ as a clock signal for PN code generation to generate a PN code _{PT T} on the transmission side (1 clock = 1 chip). The mixer 18 spreads the carrier wave S ₂ on the transmission side PN code PN _T, produces a spread spectrum signal S _RF, via the amplifier 20 is transmitted from the antenna 22.

The transmitted spread spectrum signal S _RF is
The signal is received by the antenna 26 of the receiver 24. The receiver 24 is provided with a VCO (voltage controlled oscillator) 28, and its oscillation signal S ₃ (frequency f _R ) is multiplied by the frequency multiplier 30 to the frequency m · f _R , and the local oscillation signal S _{4 is} generated. Is generated.

The mixer 32 mixes the received signal S _RF with the local oscillation signal S ₄ to perform frequency conversion. The frequency-converted signal is passed through a BPF (band pass filter) 34
Via, it becomes the intermediate frequency signal S _{5 of} frequency f _IF (= n · f _T −m · f _R ) and is input to the despreader 35 (correlator). The reception side PN code generator 33 uses the output signal S _{3 of the} VCO 28 as a PN code generation clock signal to generate a reception side PN code PN _R (1 clock = 1 chip). The despreader 35 receives the intermediate frequency signal S ₅ from the receiving side P.
Despread with the N code PN _R to obtain the correlation output S ₆ .

The correlation output S ₆ is input to the envelope detection circuit 36 of the synchronization acquisition means 37, and its envelope is extracted.
When synchronization is being acquired, a triangular wave-shaped correlation pulse having a width of two chips of the PN code is obtained in the envelope when the phases of the PN codes PN _T and PN _R on the transmitting side and the receiving side match. . The comparator 38 compares this envelope with an appropriate comparator level V _th , detects a correlation pulse, and outputs the detection signal as a synchronization detection signal.

The switch 40 is switched by a sync detection signal. When the sync detection signal is not obtained (that is, when the synchronization acquisition is not completed), the switch 40 is connected to the contact a side to obtain the sync detection signal. When it is open, it is connected to the contact b side. When connected to the contact a side, the DC voltage V _PN + ΔV (or −ΔV) from the DC power supply 42 is applied to the VCO 28 as a control voltage. The voltage value V _PN is VCO28
To the frequency f of the transmission side PN code generation clock signal S ₁
Clock signal S ₃ for receiving side PN code generation, which is almost equal to _T
Is a voltage that oscillates the frequency f _R of. In addition, the voltage value V
_PN + ΔV (or −ΔV) is a voltage that oscillates a frequency slightly higher (or lower).

The phase-locked loop 44 for holding the synchronization is V
The frequency of the output of the CO 28 is multiplied by the frequency multiplier 55.
Reference signal S ₇ multiplied by _R (= f _IF ) and correlation output S ₆
The carrier wave (frequency f _IF ) therein is transferred and compared by the phase detector 59, the phase error signal is smoothed by the loop filter 56, and the DC voltage V _PN from the DC power supply 60 is added to the smoothed output by the adder 58. Then switch VCO2
8 is controlled so that the output of the VCO 28 is phase-locked in units of the carrier frequency f _IF .

To receive the spread spectrum signal S _RF , first connect the switch 40 to the contact a side and connect the VCO 28
Then, a predetermined frequency f _R is oscillated, and the correlation output is monitored by the synchronization capturing means 37. When a correlation pulse is obtained (that is, when synchronization is captured), the switch 40 is connected to the contact b side in the vicinity of its peak to lock the phase. The loop 44 is turned on to hold the synchronization. This allows data demodulation based on the correlation output.

FIG. 3 shows an ideal timing waveform when the synchronization hold is completed in the system of FIG. In FIG. 3, n = 2, m = 1, and p = 1.

[0013]

[SUMMARY OF THE INVENTION The phase relationship between the signal S ₆ inputted to one input terminal of the phase detector 59 (the carrier) and transmit the PN code PN _T, and input to the other input terminal of the phase comparator 59 If the phase relationship between the signal S ₇ (reference signal) and the receiving side PN code PN _R is maintained in an ideal state as shown in FIG. 2, the phase locked loop 44 is in a locked state. When the phase error is 0, the timings of the transmission side PN code PN _T and the reception side PN code PN _R match as shown in FIG.

However, in an actual circuit, a phase difference occurs between the signal S ₆ and the PN code PN _T on the transmitting side or between the signal S ₇ and the PN code PN _R on the receiving side due to IC delay or the like. . For example, FIG. 4 shows a state in which there is a phase difference Δt between the signal S ₇ and the receiving side PN code PN _{R. In} this case, the signals S ₆ and S ₇ are locked with a phase error of 0. Since the phase-locked loop 44 operates, the phase difference of Δt is generated between the PN code PN _R on the transmitting side and the PN code PN _T on the receiving side, and the phase is kept synchronized, which impairs the performance of the spread spectrum communication system. become.

The present invention solves the above-mentioned problems in the prior art and prevents a phase locked loop from being locked in a state in which the PN code of the transmitting side and the PN code of the receiving side are out of phase with each other. It is intended to provide a receiving device.

[0016]

The invention according to claim 1 is
A receiver for receiving a spread spectrum signal transmitted with the phase relationship between the carrier wave and the PN code on the transmitting side kept constant;
A receiving side PN code generator for generating a receiving side PN code having the same pattern and the same transmission rate as the transmitting side PN code;
A reference signal generator for generating a reference signal whose phase relationship with the receiving side PN code is kept constant; and a despreading means for despreading the spread spectrum signal with the receiving side PN code.
A synchronization acquisition means for synchronizing the reception side PN code with the transmission side PN code based on the output of the despreading means, and a carrier wave in the spectrum signal and the reference signal after the synchronization acquisition means completes the synchronization acquisition. And a variable phase adjusting means for adjusting the phase relationship between the reception side PN code and the reference signal.

According to a second aspect of the present invention, the level detecting means for detecting the output level of the despreading means and the variable phase so that the output level detected by the level detecting means exhibits a peak value. It further comprises phase adjustment amount control means for automatically controlling the phase adjustment amount of the adjustment means.

[0018]

According to the invention described in claim 1, since the phase relationship between the PN code on the receiving side and the reference signal can be adjusted,
Even if there is a delay in the IC etc. in the process of signal processing, the PN on the transmitting side
The phase lock loop can be locked when the code and the PN code on the receiving side are in phase with each other, and it is possible to prevent the performance of the spread spectrum communication system from being impaired.

According to the second aspect of the invention, both P
By utilizing the fact that the smaller the phase difference of the N code is, the larger the correlation output is, the magnitude of the correlation output is detected, and the phase adjustment amount of the variable phase adjusting means is controlled so that the correlation output shows a peak value. As a result, the phases of both PN codes can be automatically adjusted.

[0020]

An embodiment of the present invention will be described below. FIG. 1 is a configuration diagram thereof. In the transmitter 10, the frequency reference oscillator 12 outputs a signal S ₁ having a predetermined frequency f _T. The frequency of this signal S ₁ is multiplied by n in the frequency multiplier 14, and a carrier wave S ₂ having a frequency of n · f _T is generated. PN code generator 16 generates a transmission side PN code PN _T with signals S ₁ as the PN code generation clock signal (1 clock = 1 chip). The mixer 18 is a carrier wave S
₂ is diffused on the transmission side PN code PN _T, it produces a spread spectrum signal S _RF, via an amplifier 20 antenna 22
Send from

The transmitted spread spectrum signal S _RF is
The signal is received by the antenna 26 of the receiver 24. The receiver 24 is provided with a VCO (voltage controlled oscillator) 28, and its oscillation signal S ₃ (frequency f _R ) is multiplied by the frequency multiplier 30 to the frequency m · f _R , and the local oscillation signal S _{4 is} generated. Is generated.

The mixer 32 mixes the received signal S _RF with the local oscillation signal S ₄ to perform frequency conversion. The frequency-converted signal is passed through a BPF (band pass filter) 34
Via, the intermediate frequency signal S _{5 of} frequency f _IF (= n · f _T −m · f _R ) is input to the despreader 36 (correlator). The receiving side PN code generator 33 uses the output signal S _{3 of the} VCO 28 as a PN code generating clock signal to generate a receiving side PN code PN _R (1 clock = 1 chip). The receiving PN code PN _R is input to the despreader 35 via the variable delay means 70. The despreader 35 despreads the intermediate frequency signal S ₅ with the receiving side PN code PN _R to obtain a correlation output S ₆ .

The correlation output S ₆ is input to the envelope detection circuit 36 of the synchronization acquisition means 37, and its envelope is extracted.
When synchronization is being acquired, a triangular wave-shaped correlation pulse having a width of two chips of the PN code is obtained in the envelope when the phases of the PN codes PN _T and PN _R on the transmitting side and the receiving side match. . The comparator 38 compares this envelope with an appropriate comparator level V _th , detects a correlation pulse, and outputs the detection signal as a synchronization detection signal.

The switch 40 is switched according to the sync detection signal. When the sync detection signal is not obtained (that is, when the synchronization acquisition is not completed), the switch 40 is connected to the contact a side to obtain the sync detection signal. When it is open, it is connected to the contact b side. When connected to the contact a side, the DC voltage V _PN + ΔV (or −ΔV) from the DC power supply 42 is applied to the VCO 28 as a control voltage. The voltage value V _PN is VCO28
To the frequency f of the transmission side PN code generation clock signal S ₁
Clock signal S ₃ for receiving side PN code generation, which is almost equal to _T
Is a voltage that oscillates the frequency f _R of. In addition, the voltage value V
_PN + ΔV (or −ΔV) is a voltage that oscillates a frequency slightly higher (or lower).

The phase-locked loop 44 for maintaining synchronization is V
The frequency of the output of the CO 28 is multiplied by the frequency multiplier 55.
Reference signal S ₇ multiplied by _R (= f _IF ) and correlation output S ₆
The carrier wave (frequency f _IF ) therein is transferred and compared by the phase detector 59, the phase error signal is smoothed by the loop filter 56, and the DC voltage V _PN from the DC power supply 60 is added to the smoothed output by the adder 58. Then switch VCO2
8 is controlled so that the output of the VCO 28 is phase-locked in units of the carrier frequency f _IF .

When the spread spectrum signal S _RF is received, first the switch 40 is connected to the contact a side and the VCO 28
Then, a predetermined frequency f _R is oscillated, and the correlation output is monitored by the synchronization capturing means 37. When a correlation pulse is obtained (that is, when synchronization is captured), the switch 40 is connected to the contact b side in the vicinity of its peak to lock the phase. The loop 44 is turned on to hold the synchronization.

The level detection and control means 72 detects the level of the correlation output S ₆ after the synchronization acquisition is completed and the synchronization is held. As shown in FIG. 5, the level of the correlation output S ₆ is the largest when the phase difference between the transmitting side PN code PN _T and the receiving side PN code PN _R is 0, and decreases as the phase difference increases. Therefore, the level detector 72 automatically searches the peak position by changing the delay amount of the variable delay means 70 (for example, the delay amount is changed in small increments to find the delay amount at which the maximum level is obtained. ).
When the peak position is searched, the delay amount at that time is fixed. In the example of FIG. 4, the delay amount at this time is, for example, Δ
Equivalent to T. As a result, the phase difference between both PN codes is locked in the state of 0 (state of FIG. 3), the maximum correlation output is obtained, and the receiver 24 can exhibit the maximum demodulation capability.

As the variable delay means 70, various types such as a variable delay line, a CCD (Charge Coupled Device), and a delay circuit utilizing the delay characteristics of a CMOS gate circuit can be used.

Further, the variable delay means 70 is denoted by reference numeral 7 in FIG.
It can also be placed on the side of the reference signal as indicated by 0 '. In this case, the delay amount in this case is, for example, Δt.
Equivalent to.

Further, in the above embodiment, the phase locked loop 44 has a phase difference of 0 between the carrier wave (S ₆ ) and the reference signal S _7.
However, in the case of a phase locked loop in which a predetermined phase difference is generated between the carrier wave and the reference signal, both PN codes are generated in the state where the phase difference is generated. The phase adjustment amount is controlled so that the phases of the two match.

[0031]

As described above, according to the first aspect of the invention, since the phase relationship between the PN code on the receiving side and the reference signal can be adjusted, the IC or the like is delayed during the signal processing. Even if there is, the phase lock loop can be locked in the state where the phases of the PN code on the transmission side and the PN code on the reception side match, and it is possible to prevent the performance of the spread spectrum communication system from being impaired (that is, the best The reception status can be retained.)

According to the second aspect of the invention, both P
By utilizing the fact that the smaller the phase difference of the N code is, the larger the correlation output is, the magnitude of the correlation output is detected, and the phase adjustment amount of the variable phase adjusting means is controlled so that the correlation output shows a peak value. Since this is done, the phases of both PN codes can be automatically adjusted.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional device.

FIG. 3 is a timing waveform diagram in an ideal operating state of the device of FIG.

4 is a timing waveform diagram showing a state in which the phase lock loop is locked in a state in which the phase of the PN code PN _T on the transmitting side and the PN code PN _R on the receiving side are out of phase in the apparatus of FIG.

FIG. 5 is a diagram showing changes in the correlation output when the phases of the PN code on the transmitting side and the PN code on the receiving side are shifted.

[Explanation of symbols]

24 receiver (spread spectrum signal receiving device) 26 antenna (reception unit) 28 VCO (reference signal generator) 33 receiving side PN code generator 35 despreader (despreading means) 37 synchronization acquisition means 44 phase lock loop 70, 70 'Variable delay means (variable phase adjustment means) 72 Level detection and control means (level detection means, phase adjustment amount control means) PN _T Transmission side PN code PN _R Reception side PN code S ₆ Correlation output (carrier wave) S ₇ standard signal

Claims (2)

[Claims] 1. A receiving unit for receiving a spread spectrum signal sent with a phase relationship between a carrier wave and a PN code on the transmitting side kept constant, and a receiving PN having the same pattern and the same transmission rate as the PN code on the transmitting side. A PN code generator on the receiving side for generating a code, a reference signal generator for generating a reference signal whose phase relationship with the PN code on the receiving side is kept constant, and the spread spectrum signal is despread by the PN code on the receiving side. Despreading means for synchronizing the receiving side PN code with the transmitting side PN code based on the output of the despreading means; Phase lock loop that locks the phase relationship between the carrier wave and the reference signal, and variable phase adjusting means that adjusts the phase relationship between the reception side PN code and the reference signal. Spread spectrum signal receiving apparatus comprising comprises a. 2. A level detecting means for detecting the output level of the despreading means, and an automatic phase adjustment amount of the variable phase adjusting means so that the output level detected by the level detecting means exhibits a peak value. The spread spectrum signal receiving apparatus according to claim 1, further comprising a phase adjustment amount control means for controlling.