JPH05303601A - Automatic conversion system for matrix type circuit diagram - Google Patents

Abstract

PURPOSE:To confirm the connection relation at a glance and to readily check the erroneous connection by inputting symbol type circuit diagrams to make a conversion into circuit diagrams putting LSIs and packages in a row and putting signals in a line without symbols. CONSTITUTION:The system can be realized by the engineering work station(EWS) and is provided with a CPU 2 as processor, memory 3 storing data or the like required for processing, and data I/O unit 1. The EWS is provided with a matrix type circuit diagram conversion means 6 which represents LSIs and packages as symbols to be inputted to a symbol type circuit diagram 4 and making an automatic conversion to a matrix type circuit diagram 5 putting LSIs and packages in a row and putting signals in a line without symbols. On the entire symbol type circuit diagram 4, information on all pins connected is inputted. A circuit diagram information table showing the name of the package, the name of signals, and I/O attribute of pins is prepared to be sorted by the name of signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic circuit diagram which expresses a connection relationship for a large-scale LSI or a package having a very large number of pins of hundreds to thousands.

[0002]

2. Description of the Related Art A logic circuit diagram represented by a symbol is effective when the number of pins such as a circuit symbol is small and its shape has meaning, but the number of pins that do not have much meaning in the shape is hundreds to thousands. For a large number of large-scale LSIs and packages, conventionally, the connection relationship between pins has been represented by a logic circuit diagram expressed as one symbol.

[0003]

Since the number of pins of one symbol is as large as several hundreds to several thousands, only a few symbols can be placed on one drawing, and the connection relationship of each signal line is different in multiple drawings. Also, there is a problem that it is very difficult to see because it is necessary to look at many drawings to follow the connection relationship.

It is an object of the present invention to avoid having to look at a number of drawings to follow the connection relationship.

[0005]

In order to achieve the above object, the present invention stores a data input / output device, a central processing unit (CPU) as an arithmetic processing unit, and data necessary for arithmetic processing. And a memory for
Input the symbol type circuit diagram, remove the symbol, LS
A matrix type circuit diagram conversion means for automatically converting a matrix type circuit diagram in which I and packages are arranged in columns and signals are arranged in rows is provided.

[0006]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. In FIG. 1, a matrix type automatic circuit diagram conversion system according to an embodiment of the present invention is realized by an engineering workstation (EWS), a central processing unit (CPU) 2 as an arithmetic processing unit, and data necessary for arithmetic processing. It has a memory 3 for storing data etc., and a data input / output device 1. Further, the EWS inputs a symbol type circuit diagram 4 configured by expressing an LSI or a package as a symbol, eliminates the symbol, and automatically outputs a matrix type circuit diagram 5 in which the LSIs and packages are arranged in columns and signals are arranged in rows. It has a matrix type circuit diagram conversion means 6 for converting.

FIG. 2 is a flow chart showing the flow of processing of an embodiment of the present invention, and FIG. 3 is a diagram showing an example of a symbol type circuit diagram in which a package is expressed as one symbol and the connection relationship is represented. 4 is a diagram showing an example of a circuit diagram information table held internally, FIG. 5 is a diagram showing an example of a signal table held internally, and FIG. 6 is a matrix in which packages are arranged in columns and signals are arranged in rows. It is a figure which shows an example of a mold circuit diagram.

The operation will be described below with reference to FIGS.

First, the connection information is read from the symbol type circuit diagram 4 in which one package is represented as one symbol (step 1). In the example of the symbol type circuit diagram 4 of FIG. 3, PKGA is represented as one symbol, and each pin represents a jump of connection.
There are many shapes of 1, 32, 33, and 34, and signal names near them are NET1, NET2, and NET3.
it is written like this. The same signal names indicate that they are connected. In this way, the jump expression is used because there are too many pins and the signal lines cannot be wired. With respect to all the drawings of the symbol type circuit diagram 4, the connection information of all connected pins is input. A circuit diagram information table showing the package name of the pin, the signal name, and the input / output attribute of the pin is created as shown in FIG. 4 (step 2). The circuit diagram information table is sorted by signal name (step 3). Next, a signal table in which the same signal names are combined is created (step 4). In the example of the symbol type circuit diagram of FIG. 3, for example, in connection information of NET1 of PKGA, NET1 of PKGB and NET of PKGC.
4 and the circuit diagram information table of NET1 of PKGD are created, and a signal table summarizing NET1 is created as shown in FIG. This signal table is edited into a matrix type circuit diagram in which packages are arranged in columns and signals are arranged in rows, and the drawing is output (step 5). In the example of the matrix type circuit diagram of FIG. 6, PKGA is arranged in the first column, PKGB is arranged in the second column, PKGC is arranged in the third column, ... In this order, NET1 is placed in the first row, and the package to which NET1 is connected is PKGA. , PKGB, PKGC, and PKGD (Fig. 5), first place a mark ○ to represent the input pin in the first row, first column crossing where NET1 and PKGA intersect, and then NET1 and Put a mark ● to represent the output pin in the first row and second column crossing where PKGB intersects, and to indicate the input pin in the first row and third column crossing where NET1 and PKGC intersect. Put the mark, and finally, NE
Place a mark of ○ to represent the input pin in the 1st row and 4th column of the box where T1 and PKGD intersect, and connect with a line.
Represents a connection. In this way, the second line shows NET2 and the third line shows NET3 and connections for all signals, and a matrix type circuit diagram is created. In FIG. 3, NET1
Connection is PKGA NET1, PKGB NET1,
Since it is skipped over a plurality of drawings including NET1 of PKGC and NET1 of PKGD, it is very difficult to see, but in FIG. 6, the connection relationship of NET1 can be seen at a glance.

[0011]

Since the present invention is configured as described above, it becomes possible to see the connection relation of each signal at a glance, it is easy to check connection mistakes, etc. It is effective as a drawing handed over to the design process, and the quality of the design can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an exemplary embodiment of the present invention.

FIG. 2 is a flowchart showing a flow of processing according to an embodiment of the present invention.

FIG. 3 is a diagram showing an example of a symbol type circuit diagram used in an embodiment of the present invention.

FIG. 4 is a diagram showing an example of a circuit diagram information table used in an embodiment of the present invention.

FIG. 5 is a diagram showing an example of a signal table used in an embodiment of the present invention.

FIG. 6 is a diagram showing an example of a matrix type circuit diagram used in one embodiment of the present invention.

[Explanation of symbols]

 1 Input / output device 2 Central processing unit (CPU) 3 Memory 4 Symbol type circuit diagram 5 Matrix type circuit diagram 6 Matrix type circuit diagram conversion means 31, 32, 33, 34 Connection skipping

Claims (1)

[Claims] 1. A symbol type circuit diagram is input in a system comprising a data input / output device, a central processing unit (CPU) as an arithmetic processing unit, and a memory for storing data required for arithmetic processing. LSI without the symbol
A matrix type circuit diagram automatic conversion system characterized by further comprising matrix type circuit diagram converting means for automatically converting a matrix circuit diagram in which signals are arranged in rows and packages in columns.