JPH05296696A - Electronic delay electric primer - Google Patents

Abstract

PURPOSE:To advance the leading edge of oscillation and save electric power by oscillating an oscillating piece strongly for a predetermined period of time after outputting a blasting output, in an electric primer, in which an oscillating circuit is oscillated by a supplied blasting electric power and the oscillating output thereof is counted while the primer is ignited when a set value is counted. CONSTITUTION:Under a condition that an oscillating electrode is inputted, a constant voltage is outputted from a constant voltage circuit and the oscillation of an oscillating circuit 27 is started, the current of an inverter 28 and the current of an auxiliary inverter 29 are added to oscillate an oscillating piece 21 strongly and rise the oscillating circuit 27 up quickly. Subsequently, the operation of the auxiliary inverter 29 is stopped when the oscillating frequency of the oscillating circuit 27 becomes stationary condition and the oscillation of the oscillating piece 21 is returned to ordinary oscillation effected by only the output of the inverter 28. During a rise-up period of time until the oscillating circuit 27 becomes stationary condition, the counter 33 of a digital timer is reset by a reset retaining circuit 30 and counting is started when the oscillating circuit 27 is returned to stationary oscillating condition while an electric primer is ignited when a set value is counted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention starts operation when blasting power is supplied, oscillates an oscillating circuit based on a crystal or ceramic oscillator, counts the oscillating output with a counter, and outputs the counted value. An electronic delay electric detonator that ignites the detonator when becomes a set value.

[0002]

2. Description of the Related Art An electronic delay electric detonator of this kind is disclosed in Japanese Examined Patent Publication 6
It is proposed in Japanese Patent Laid-Open No. 3-53478. This digital delay method can perform delay with high accuracy.

[0003]

In order to improve the delay time accuracy of this digital delay method, it is desirable that the oscillation circuit be as fast as possible in a steady oscillation state. To start it up quickly, a crystal or ceramic oscillator is used. It is necessary to excite strongly, which requires a large current. Therefore, it is necessary to supply sufficient electric energy for the operation of the digital delay method. If a crystal or ceramic oscillator having a high natural frequency is selected, the electric energy required at the start of oscillation will be further increased.

Although it is necessary to increase the capacitance of the energy storage capacitor that stores the blasting power, an electrolytic capacitor is usually used as the energy storage capacitor of this type of electronic detonator, and a large capacitance is selected. Then, the shape becomes large, which causes a problem in practical use.

[0005]

According to the present invention, when the blasting electric power is input, the crystal or ceramic oscillator is strongly excited for a predetermined time by the quick activating means, and then returned to normal excitation.

[0006]

FIG. 1 shows an embodiment of the present invention. Input terminal 1
A bypass resistor 13 is connected between 1 and 12, and an input side of the rectifier 14 is connected. A capacitor 15 is connected across the output side of the rectifier 14. By-pass resistor 13
Prevents the capacitor 15 from being charged with a voltage up to ignition due to the stray current generated at the blasting site, and when blasting at the same time by connecting a plurality of electronic delay electric detonators in series, the blasting voltage is to some extent equal. And is applied to the rectifier 14 after being divided. The rectifier 14 is for charging the blasting power to the capacitor 15 with a predetermined polarity regardless of the polarity of the blasting power applied between the input terminals 11 and 12.

An electric detonator 16 is provided between both ends of the capacitor 15.
A series circuit of an ignition wire (not shown) therein and a switching element having a control electrode, for example, a thyristor 17 is connected. The input side of the constant voltage circuit 18 is connected to both ends of the capacitor 15, and the digital timer 19 is connected to the output side of the constant voltage circuit 18. The digital timer 19 has an oscillation circuit, a counter for counting the oscillation output thereof, and a coincidence detection circuit for detecting the coincidence between the count value of the counter and the set value, as a basic configuration. Specifically, for example, the configuration shown in the above publication is adopted. be able to. In FIG. 1, the digital timer 19 is configured as an integrated circuit. A terminal of the digital timer 19 is connected to a pair of output terminals of the constant voltage circuit 18, a crystal or ceramic vibrator 21 is connected between the terminals, and a feedback resistor 22 is connected in parallel with the vibrator 21. And terminals are capacitors 24 and 2
5 is connected to the ground terminal, 13 setting terminals are connected to the ground terminal, and the terminal is connected to the gate of the thyristor 17. Various numerical values can be set by selectively disconnecting the 13 setting terminals from the ground terminal.

The oscillator 21 and the feedback resistor 22 and the internal circuit of the digital timer 19 constitute an oscillation circuit, the oscillation output of the oscillation circuit is counted by an internal counter, and the count value of the counter is set as a set value. When they match, the internal match detection circuit outputs a match detection output to the terminal and controls the thyristor 17 to turn on. Therefore, the blasting power stored in the capacitor 15 is supplied to the ignition line, and the detonator 16 explodes.

In the present invention, the vibrator 21 of the digital timer 19 is strongly excited for a predetermined time from the input of the blasting power by the quick starting means, and then is returned to the normal excitation. Therefore, for example, the oscillation circuit 27 is configured by connecting the feedback resistor 22 and the inverter 28 in parallel as shown in FIG. 2, but the auxiliary circuit 29 is further connected in parallel with the inverter 28.
A quick start control circuit 31 for operating the auxiliary inverter 29 for a predetermined period from the start of oscillation is provided. The quick start control circuit 31 is composed of, for example, a counter, counts the oscillation output of the oscillation circuit 27, and stops the operation of the auxiliary inverter 29 when it reaches a predetermined value. That is, the quick start control circuit 31 includes a circuit for resetting the internal counter when the power supply voltage is applied, and in that state, a bias for operating the auxiliary inverter 29 is applied from the pair of output terminals of the quick start control circuit 31. When the count of the counter inside the quick start control circuit 31 reaches a predetermined value, the polarities of the outputs of the pair of output terminals are inverted and the operation of the auxiliary inverter 29 is stopped.

Therefore, in FIG. 1, the blasting power is input, the constant voltage is output from the constant voltage circuit 18, and the oscillation circuit 2
In the state where 7 starts to oscillate, both currents of the inverter 28 and the auxiliary inverter 29 are added, the oscillator 21 is strongly excited, and the oscillation circuit 27 rises rapidly. Oscillation circuit 27
When the oscillating frequency of becomes the steady state, the auxiliary inverter 2
The operation of 9 is stopped, and the excitation current for the vibrator 21 is returned to normal excitation of only the output of the inverter 28.

In this embodiment, a reset holding circuit 30 (see FIG. 2) is provided, and from the input of the blast power to the operation of the auxiliary inverter 29, that is, the oscillation circuit 27 is in the steady oscillation state. This is a case where the counter 33 in the digital timer 19 is reset during the rising period. Therefore, as shown in FIG. 1, the reset holding time constant circuit 32 is connected to the output side of the constant voltage circuit 18. In this circuit 32, a capacitor 34 is connected between a pair of output terminals of the constant voltage circuit 18, and a series circuit of a resistor 35 and a capacitor 36 is connected in parallel with the capacitor 34.

The connection point of the resistor 35 and the capacitor 36 is connected to the terminal of the digital timer 19, and the voltage at the terminal is compared with a predetermined voltage by an internal comparator 37 as shown in FIG. The output of the comparator 37 is at a high level until the value is reached, and the counter 33 is reset by the high level. When the terminal voltage reaches a predetermined value, the output of the comparator 37 becomes low level, and the counter 33 starts counting the oscillation output of the oscillation circuit 27. The period during which the counter 33 is held in reset is approximately equal to the period from the start of oscillation of the oscillation circuit 27 to the steady oscillation frequency as described above, which is determined by the time constants of the resistor 35 and the capacitor 36. The reset holding time constant circuit 32 and the comparator 37 constitute the reset holding circuit 30.

As described above, when the blasting power is applied between the input terminals 11 and 12, the oscillator 21 is strongly excited, so that the oscillation frequency of the oscillation circuit 27 becomes a steady value in a short time. Since the counter 33 starts counting after entering the steady oscillation state, it is possible to obtain a delay with higher accuracy. Moreover, when the oscillator circuit 27 enters the steady oscillation state, the oscillator 21 is returned to normal excitation, so that the power consumption is small.

With strong excitation, the oscillation circuit 27 can be brought into a steady oscillation state, for example, 5 ms after the start of oscillation. Therefore, in this embodiment, the counter 3 is
3 is 5 ms, that is, the time constant of the resistor 35 and the capacitor 36 is 5 ms, the reset holding time based on the variations of the constants of the resistor 35 and the capacitor 36 and the operating voltage of the comparator 37. It is relatively easy to keep the variation of within 0.37ms,
Moreover, it is easy to keep the temperature variation of this reset hold time within about 0.11 ms, that is, the variation is 0.4
It can be done easily and inexpensively within 8 ms. Therefore, it is possible to perform delay with high accuracy. The counter 33 may be held in the reset state by the output of the quick start control circuit 31 and the reset holding circuit 30 may be omitted. When the reset holding circuit 30 is provided as in this embodiment, the reset holding circuit 30 is also used as a quick start control circuit, and the output of the comparator 37 controls the auxiliary inverter 29 to omit the quick start control circuit 31. You may.

Although the output pulse of the oscillation circuit 27 is directly supplied to the counter 33 in FIG. 2, the crystal oscillator 2 is usually used, for example.
An oscillator circuit 27 is used which has a frequency of 4.096 MHz.
The output pulse is divided by 2 ^{13 by the} frequency divider circuit, the cycle of the output pulse is set to 1 ms, and the delay amount of 8.190 ms can be set at 1 ms intervals by 13 terminals. The crystal oscillator 21 preferably has a vibration frequency of about 1 MHz to 16 MHz. If this frequency is too low, the rise time of oscillation becomes long, and it becomes necessary to lengthen the reset holding time by the reset holding circuit 32, and it is difficult to obtain a stable reset holding time by the simple and inexpensive reset holding circuit 32. Becomes Also, if the vibration frequency is too high, the power consumption becomes large and it becomes impractical as a detonator.

After presetting to the counter 33,
The preset circuit can be separated from the counter 33 to reduce power consumption. For example, as shown in FIG. 3, the power supply terminal 38 is connected to one terminal through the n-channel FET 39 and further through the resistance element 40, which is not shown in the figure, but corresponds to the counter 1 of the counter 33.
Connected to the reset terminals of one counting stage. Also, this connection point is grounded through the P-channel FET 41,
The gates of 39 and 41 are connected to the output terminal of the comparator 37. When the output of the comparator 37 is supplied to the preset control circuit 42 and the output of the comparator 37 changes from high level to low level and the reset of the counter 33 is released, the preset control circuit 42 outputs a positive pulse, During the pulse, FET39 is on, FET41 is off,
Depending on whether the terminal is grounded or disconnected from ground, the connection point between the resistance element 40 and the terminal becomes low level or high level, and this low level or high level occurs during this pulse. The load command is preset in the counting stage connected to this connection point of the counter 33. When the positive pulse from the preset control circuit 42 falls to a low level, the FET 39 is turned off and the FET 41 is turned on, the current from the power supply terminal 38 to the grounded terminal is cut off, and the power consumption is accordingly reduced. Less. The other counting stages of the counter 33 are similarly configured.

As shown in FIG. 1, when a resistor 43 is connected in parallel with the capacitor 15 and the failure occurs for some reason, the energy stored in the energy storage capacitor 15 is stored in the resistor 43 within a predetermined time. Discharge and prevent reignition. This electronic delay electric detonator is
It can be made into a small size by converting it to SI. For example, as shown in FIG. 4, an explosive charge 45 is filled inside a cylindrical plastic case 44, and then an ignition explosive charge 46 is housed therein.
7 is inserted, a digital timer 19 which is an LSI is mounted on one half of a substrate 47, a capacitor 34 and a resistor 35 are further attached, and two parallel resistors 13a and 13b constituting the resistor 13 are formed. Mounted, these resistors 1
A resistor 43 is attached between 3a and 13b. Resistor 1
The crystal unit 21 is bonded onto the surfaces 3b and 43 via the double-sided adhesive tape 48. On the other surface of the board 47, a disconnection portion 49 for connecting each terminal to the ground is formed in a portion corresponding to the digital timer 19, the SCR 17 is further attached to one end portion, and capacitors 24, 25, 36, and a fixed portion are provided in an intermediate portion. The voltage circuit 18 is mounted and the rectifier 14 is attached to the other end. An energy storage capacitor 15 made of an electrolytic capacitor is housed on the side of the substrate 47 opposite to the explosive powder 46, and a leg portion 52, 53 connected to the terminals 11, 12 through the cap 51 is externally covered with a cap 51. Derived. In this way, a very compact design can be achieved as a whole.

[0018]

As described above, according to the present invention, the oscillator is strongly excited at the oscillation start-up to shorten the oscillation rise time, and a relatively large amount of electric energy is supplied for the rise time. Since a relatively small amount of electric energy required for the oscillation of the vibrator is supplied, the electric energy stored in the energy storage capacitor can be saved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific example of a main part of the present invention.

FIG. 3 is a diagram showing an example of a preset input circuit for one stage in a counter 33.

FIG. 4 is a sectional view showing a structural example of the detonator of the present invention.

5A is a front view of the substrate portion of FIG. 4, and B is a plan view thereof.

Claims (1)

[Claims] 1. An energy storage capacitor is charged with the supplied blasting power, operation is started by this charged electrical energy, an oscillation circuit based on a crystal or ceramic oscillator oscillates, and its oscillation output is output. When the count value is counted by the counter, and when the count value reaches the set value, in the electronic delay electric detonator that ignites the detonator, after the oscillator is strongly excited for a predetermined time from the input of the blasting power, it is automatically switched to normal An electronic delay electric detonator characterized by comprising a starting means.