JPS602676Y2 - IC circuit for timer - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a timer IC circuit (integrated circuit) that includes an oscillator and a counting circuit, counts oscillation output, and generates an output when a predetermined value is reached.

In this timer IC circuit, a capacitor and resistors for determining the oscillation period are externally attached, and the timer time is set by adjusting these constants.

Conventional ICs are generally configured to have a separate terminal for reset, and to perform a reset operation by sending a signal to this terminal from the outside.

However, in this case, one of the terminals (bin, leg) of the IC will be occupied as a reset input, which increases the number of pins and is disadvantageous in terms of price.

In view of the above, an object of this invention is to provide a timer IC circuit that can efficiently utilize terminals, provide many functions with a small number of pins, and be inexpensive.

An embodiment of the present invention will be described below with reference to the drawings.

In Fig. 1, the part surrounded by a broken line is inside the IC, including an upper limit voltage detection comparator 1, a lower limit voltage detection comparator 2, a reset voltage detection comparator 3, a set/reset flip-flop 4, a counting circuit 5, and an output. It includes a circuit 6, a reset circuit 7, a transistor 18 forming a switch circuit, etc., and has an output terminal 8, a power supply terminal 9゜10 as a terminal for connection with the outside.
, and a capacitor 1 for determining the oscillation period of the oscillator.
It has terminals 11.12 for connecting external parts such as 6 and variable resistors 14.15.

The operation of this circuit is as follows.

This will be explained with reference to FIG.

The voltage at terminal 11 increases according to the time constant of variable resistor 15 and capacitor 16, and when it reaches the upper limit reference voltage (voltage at terminal 12) determined by variable resistor 14, comparator 1
An output is generated from , and flip-flop 4 is set.

Then, the Q output becomes rH yo, so the transistor]
8 turns on, shorting the capacitor 16.

Therefore, the capacitor 16 is rapidly discharged, and the voltage at the terminal 11 is rapidly decreased.

When the voltage at terminal 11 reaches the lower limit reference voltage (voltage at point 19) created by a resistor voltage divider circuit inside the IC, an output is generated from comparator 2, flip-flop 4 is reset, and transistor 18 is turned off. Become.

Therefore, from this point on, the capacitor 16 is replaced by the variable resistor 15.
The battery will be charged through the battery, and the above operation will be repeated.

In this way, it oscillates at a constant period, and the Q of flip-flop 4 is
The output is counted by a counting circuit 5, and when the counted value reaches a predetermined value, the output passes through an output circuit 6 and appears at an output terminal 8.

In FIG. 2, the voltage at the terminal 12 changes from time t1 to t2 because the variable resistor 14 is changed, and the upper limit of the charging voltage of the capacitor 16 (voltage at the terminal 11) also changes.

This is changing accordingly.

In FIG. 1, the terminal 12 is connected to the switch 13, etc.
By applying a reset voltage (for example, ground potential) to the terminal 12, the reset can be performed externally.

That is, switch 13 is a reset switch.

When this switch 13 is turned on, time t4 in FIG.
, the voltage at terminal 12 becomes zero and is lower than the reference voltage obtained from point 20 of the resistor voltage divider circuit, so comparator 3
sends an output to the reset circuit 7, and the counting circuit 5 and output circuit 6 are reset.

During this time, the flip-flop 4 is set, so that the charge on the capacitor 16 is discharged by the transistor 18.

After time t, the switch 13 returns to the off state, and the normal oscillation state resumes.

In this way, the terminals for external components of the oscillator can also be used for resetting without providing a separate terminal for resetting, so the reset function can be provided without increasing the number of terminals.

As described above with respect to the embodiments, according to the present invention,
With a simple configuration in which a comparator for detecting the reset voltage is provided inside the IC, the number of pins of the IC can be reduced and the cost can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a voltage waveform diagram of each part for explaining the operation. 1... Comparator for upper limit voltage detection, 2...
Comparator for lower limit voltage detection, 3... Comparator for reset voltage detection, 4... Song set reset flip-flop, 5... Counting circuit, 6... Output circuit,
7...Reset circuit, 8-12...Terminal.

Claims (1)

[Scope of utility model registration request] A first terminal to which one end of a capacitor to be charged is connected via a resistor and to which a charging voltage of the capacitor is applied, and a first reference voltage that defines one of an upper limit and a lower limit of the charging voltage is externally applied. a first comparator that compares the first reference voltage and the charging voltage; and a second terminal that generates a second reference voltage that defines the other of the upper and lower limits of the charging voltage. a second comparator that compares the second reference voltage with the charging voltage; and a second voltage generating circuit that generates a third reference voltage different from the first and second reference voltages. a voltage generating circuit; a third comparator for comparing the voltage at the second terminal with the third reference voltage;
, a flip-flop that is set and reset by the output of the second comparator, and a switch circuit that is turned on by the output of the flip-flop and short-circuits and discharges the capacitor when the charging voltage reaches the upper limit reference voltage. , a counting circuit that counts the output of the flip-flop, a third terminal that produces an output when the count of the counting circuit reaches a predetermined value, and an output of the third comparator that resets the counting circuit. A timer IC circuit, the timer IC circuit having a reset circuit, and configured to reset by applying a reset potential to the second terminal to cause the third comparator to generate an output.