JPH0529310A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To remove the lateral expanse (bird's beak) of an oxidation area, in the element isolating formation method by selective oxidation method. CONSTITUTION:A pad oxide film 2 is made on a silicon substrate, and a silicon nitride film 3 is stacked on the oxide film 2, and an element isolating region is patterned. Then, a silicon nitride film is made as a sidewall 4 at the sidewall of the insulating film on the silicon substrate 1, and then a groove 5 is made in the silicon substrate, and a polysilicon film 6 is grown selectively in the groove, and then boron 7 is implanted as a channel stopper 8, and then the polysilicon film 6 is oxidated to form an element isolating oxide film 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an element isolation oxide film by selective oxidation.

[0002]

2. Description of the Related Art A conventional method for forming an element isolation oxide film by a selective oxidation method in a semiconductor device manufacturing process is LOCO.
S (Local oxidation of Sili)
It was mainly formed by a method called con). This will be described below with reference to FIG.

First, as shown in FIG. 4 (a), a thin pad oxide film 2A and a thick silicon nitride film 3 are formed on a silicon substrate 1.
After forming A, the silicon nitride film 3A in the element isolation region is formed.
Then, the pad oxide 2A is patterned to form an opening.

Next, as shown in FIG. 4B, the silicon substrate in the opening is selectively oxidized by using the silicon nitride film 3A as a mask to form an element isolation oxide film 19.

[0005]

As device integration becomes higher, element isolation regions are made smaller, that is, in the method of forming an element isolation oxide film by the selective oxidation method, the lateral extension of the oxidized region (bird's beak) is caused. Is required to be reduced. Therefore, in the conventional method of forming an element isolation oxide film by selective oxidation, in order to reduce the bird's beak, the silicon nitride film 3 is formed.
It is necessary to make A thick and make the pad oxide film 2A thin.
Although the bird's beak can be reduced by thinning the pad oxide film and thickening the silicon nitride film, the stress caused by the silicon nitride film cannot be alleviated by the pad oxide film, which causes defects in the silicon substrate. However, there is a drawback that the device characteristics are deteriorated.

Further, when a desired impurity is ion-implanted as a channel stopper, the generation of defects is suppressed by injecting into the silicon substrate through pad oxidation. However, when the pad oxide film becomes thin, the silicon nitride film is removed. At this time, since the pad oxide film is removed at the same time, bare implantation is performed, which causes a large number of defects.

[0007]

According to the method of manufacturing a semiconductor device of the present invention, a silicon oxide film and a first silicon nitride film are sequentially formed on a silicon substrate, and then the first silicon nitride film in the element isolation region is formed. A step of selectively removing the silicon oxide film and forming an opening, a step of forming a side wall made of a second silicon nitride film on a side wall of the opening, the side wall and the first silicon nitride A step of forming a groove in the silicon substrate using the film as a mask, and then selectively growing a silicon layer in the groove, and ion-implanting impurities as a channel stopper through the silicon layer, and then oxidizing the silicon layer And a process.

[0008]

The present invention will be described below with reference to the drawings. 1A to 1D are cross-sectional views of a semiconductor chip for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, a thin pad oxide film (SiO ₂ ) of 45 nm and a silicon nitride film (Si ₃ N ₄ ) are formed on a silicon substrate 1 having a low-concentration P-type plane orientation (100). 3) is sequentially formed to a thickness of 300 nm and then patterned to form an opening in the element isolation region.

Next, as shown in FIG. 1B, a second silicon nitride film is formed on the silicon substrate 1 and then etched back to form a sidewall 4 on the side wall of the opening.
This sidewall suppresses the lateral oxidation process and reduces the lateral spread of the element isolation region. Further, an element isolation region smaller than the actual mask design size is formed. After that, the sidewall 4 and the silicon nitride film 3
Using the as a mask, a groove 5 is formed in the silicon substrate 1 to a depth of 200 nm by an anisotropic etching method. Next in FIG.
As shown in (c), the polysilicon film 6 (1
00 nm) is deposited. After that, the boron ion 7 is 10
A channel stone bar 8 is formed by injecting into the silicon substrate 1 through the polysilicon film 6 under the conditions of 0 KeV and 1.5 × 10 ¹³ cm ⁻² . At this time, the polysilicon film 6 serves as a protective film that relieves the implantation damage.

Next, as shown in FIG. 1D, the polysilicon film 6 is wet-oxidized at 1000 ° C. for 2 hours to form an element isolation oxide film 9. Then, the silicon nitride film is removed.

For comparison with the prior art, FIG. 2 shows the film thickness dependence of the element isolation oxide film on the lateral expansion of the element isolation region. The lateral spread of the element isolation region according to the first embodiment shown by the straight line A is smaller than the lateral spread of the prior art device isolation region shown by the straight line B, and the advantage of the present invention is recognized.

FIGS. 3A to 3D are sectional views of a semiconductor chip for explaining a second embodiment of the present invention.

First, as shown in FIG. 3A, a thin pad oxide 2 and a silicon nitride film 3 are formed on a silicon substrate 1 having a low-concentration P-type plane orientation (100) under the same names as in the first embodiment.
And are patterned and the openings are formed. Next, as shown in FIG. 3B, a sidewall 4 is formed on the side wall of this opening. Furthermore, two grooves 5A are formed on the silicon substrate.
It is formed with a depth of 00 nm. At this time, the anisotropy of dry etching is weakened to form a taper so that the side wall of the groove is inclined.

Next, as shown in FIG. 3C, a polysilicon film 6A is selectively deposited in the groove 5A to a thickness of 100 nm. Compared with the first embodiment, the inclination of the sidewall of the trench 5A suppresses the lateral oxidation process, eliminates the lateral expansion of the element isolation region, and relaxes the stress of the polysilicon film 6A. After that, as in the first embodiment, boron ions 7 are implanted into the silicon substrate through the polysilicon film 6A to form the channel stopper 8A. Then Fig. 3
As shown in (d), the silicon substrate in the opening is wet-oxidized to form an element isolation oxide film 9A.

In the above embodiment, the case where a polysilicon film is used as the silicon film formed in the groove has been described, but single crystal silicon by epitaxy growth which has a higher oxidation rate than a silicon substrate. A film or an amorphous silicon film may be used.

[0017]

As described above, according to the present invention, after a silicon nitride film is formed as a sidewall on the side wall of the opening of the silicon nitride film on the silicon substrate, a groove is formed in the silicon substrate and the inside of the groove is selected. By selectively growing a silicon film, ion-implanting desired impurities as a channel stopper, and then oxidizing the silicon film.
There is an effect that the element isolation region does not spread laterally and an element isolation oxide film smaller than the actual size of the element isolation formation region can be formed.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment.

FIG. 2 is a diagram showing the oxide film thickness dependence of the element isolation formation region in the lateral expansion of the element isolation region.

FIG. 3 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.

FIG. 4 is a sectional view of a semiconductor chip for explaining a conventional technique.

[Explanation of symbols]

1 Silicon substrate 2,2A pad oxide film 3,3A Silicon nitride film 4 sidewalls 5,5A groove 6,6A Polysilicon film 7 Boron ion 8,8A channel stopper 9,19 Element isolation oxide film

Claims (2)

[Claims] 1. A silicon oxide film and a first silicon oxide film on a silicon substrate.
Second silicon nitride film is sequentially formed, and then the first silicon nitride film and the silicon oxide film in the element isolation region are selectively removed to form an opening, and a second silicon nitride film is formed on the side wall of the opening. A step of forming a side wall made of a film, a step of forming a groove in the silicon substrate using the side wall and the first silicon nitride film as a mask, and then selectively growing a silicon layer in the groove, And a step of oxidizing the silicon layer after ion-implanting impurities as a channel stopper through the silicon layer. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the groove formed in the silicon substrate has a taper.