JPH05291219A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To achieve that an element formation wafer for an SOI substrate is made thin and flat at good yield in a method for manufacturing a semiconductor wafer which includes a wafer bonding process. CONSTITUTION:The title manufacture is constituted so as to include the following: a process wherein grooves 4 are formed in a plurality of regions on one face of a semiconductor wafer 1 for element formation; a process wherein one face of the semiconductor wafer 1 for element formation is pasted on an insulating film 6 on a wafer 2 for support; a process wherein the other face of the semiconductor wafer 1 for element formation is polished generally and the grooves 4 are exposed at least partly; and a process wherein the other face of the semiconductor wafer 1 for element formation is polished further and flattened automatically by a selective polishing operation by means of abrasives.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a wafer bonding step.

[0002]

2. Description of the Related Art SOI using a wafer bonding technique
The (silicon on insulator) substrate is expected to be a future substrate for VLSI because it can obtain the same crystal quality as a bulk silicon wafer. In order to suppress the short channel effect due to device miniaturization, ultra-thin SOI substrates with a thickness of 0.1 μm or less are expected in the future.

As a method for bonding the wafers, for example, a method shown in FIG. 3 is adopted. First, the element forming wafer 3
A plurality of positions of one side of the 1, SiO ₂ by selective oxidation (LOCOS) method
After forming the film 32, SiO ₂ is formed on the surface by the CVD method.
The film 33 is deposited on the order of 1 μm.

Next, the exposed surface of the CVD SiO ₂ film 33 is polished and flattened to reduce the influence of the protrusion of the LOCOS SiO ₂ film 32. Then, the polished surface is bonded to the supporting wafer 34, and then the silicon surface of the element forming wafer 31 is ground and polished. In this case, since the polishing rate of the LOCOS SiO ₂ film 32 is low, when the polishing is stopped by detecting this as the end point, the silicon surface becomes flat, and the film thickness of the element forming wafer 31 after polishing is 0.1 μm. You can:

[0005]

However, according to such a process, even if the CVD SiO ₂ film 33 is polished, the LOCOS SiO ₂ film 32 is formed on the surface of the element forming wafer 31 on the bonding side.
Is not completely flattened due to the influence of the protruding part of the
Since the area of the COS SiO ₂ film 32 is small, the adhesion area is narrow,
There is a problem that the wafers are easily separated from each other.

The thinning of the element forming wafer 31 is
Since the difference in polishing rate between the oxide film and silicon is used, it is impossible to completely eliminate the occurrence of polishing dripping due to deformation of the polishing cloth.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a method of forming a semiconductor device capable of thinning and flattening a device forming wafer of an SOI substrate with a good yield.

[0008]

[Means for Solving the Problems]
2, a step of forming grooves 4 in a plurality of regions on one surface of the element-forming semiconductor wafer 1, and a step of bonding the one surface of the element-forming semiconductor wafer 1 to the insulating film 6 of the supporting wafer 2. And a step of generally polishing the other surface of the element-forming semiconductor wafer 1 to expose at least a part of the groove 4, and the other surface of the element-forming semiconductor wafer 1 by selective polishing using an abrasive. Is further polished to automatically flatten the substrate.

Alternatively, the polishing agent used in the selective polishing is more diluted than the polishing agent used in the general polishing, thereby achieving a semiconductor device manufacturing method.

Alternatively, the thickness of the element-forming semiconductor wafer 1 after the selective polishing is changed by changing at least one of the shape of the groove 4 of the element-forming semiconductor wafer 1, the concentration of the polishing agent, and the polishing conditions. This is achieved by a method for manufacturing a semiconductor device, which is characterized by controlling the height.

Alternatively, the groove 4 is formed by a scribe line or an element isolation region of the element forming semiconductor wafer 1 by a method of manufacturing a semiconductor device.

Alternatively, the element forming semiconductor wafer 1 is a silicon wafer, and the insulating film 6 of the supporting wafer 5 is used.
Is a SiO ₂ film, the one surface of the element-forming semiconductor wafer 1 in which the groove 4 is formed is a silicon surface or a SiO ₂ surface, and the supporting wafer 5 side of the groove 4 that appears by polishing A method for manufacturing a semiconductor device is characterized in that the SiO ₂ film 6 is exposed from the bottom surface of the substrate, or the SiO ₂ 2 is exposed from a part of the inner peripheral surface of the groove 4 near the bottom surface. To do.

[0013]

[Operation] According to the present invention, a semiconductor wafer 1 for device formation
When the surface having the grooves 4 formed in a plurality of regions is bonded to the insulating film 6 of the supporting wafer 5, the element forming semiconductor wafer 1 is polished to expose the grooves 4, and then selective polishing using an abrasive is performed. Finally, when the height of the groove 4 from the supporting wafer 5 is lowered to a predetermined value, the selective polishing is automatically stopped, and the height of the groove 4 is made uniform, so that a thin wafer for element formation is formed. 1 has a uniform thickness and its surface is flat.

In this case, the groove 4 may be formed along, for example, a scribe line or an element isolation region, and since a large area is not particularly required, it is possible to secure a bonding area almost the same as when the groove is not provided. , The wafers are not separated from each other.

Moreover, since polishing is stopped before the polishing cloth comes into contact with the insulating film, it is possible to essentially eliminate polishing dripping due to deformation of the polishing cloth. By the way, the mechanism by which the film thickness is automatically made uniform by the selective polishing has not been clarified yet, but it is considered to be due to the chemical action between the insulating films 2 and 6 at the bottom of the exposed groove 4 and the polishing liquid. .. Therefore,
The bottom of the groove 4 on the side closed by the bonding is the insulating film 6
Or in addition to this, it is necessary that the portion of the inner peripheral surface of the groove 4 close to the bottom surface is formed of the insulating film 2.

The thickness of the element forming wafer 1 after being made uniform is about 0.1 to 0.3 μm or less. The thickness of the element-forming semiconductor wafer 1 left after the selective polishing is changed by changing the shape and width of the groove 4, changing the concentration of the polishing liquid, or the number of rotations of the surface plate during polishing,
It can be controlled by changing polishing conditions such as wafer pressing force.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. (A) Description of First Embodiment of the Present Invention FIGS. 1 and 2 are sectional views showing an embodiment of the present invention.

In FIG. 1, reference numeral 1 is a semiconductor wafer for element formation made of silicon, on which an SiO ₂ film 2 having a thickness of several tens nm and formed by a thermal oxidation method is formed. First, a photoresist 3 is coated on the SiO ₂ film 2 and exposed and developed to form a window 3a along the scribe line of the semiconductor wafer 1 for element formation (see FIG. 1).
(a)).

Next, the SiO ₂ film 2 exposed from the window 3a is removed by etching with ammonium fluoride (NH ₄ F) to expose a part of the semiconductor wafer 1 for element formation (FIG. 1 (b)).
Then, add a mixture of HF, HNO ₂ and COOH or KOH to the window 3a.
The semiconductor wafer 1 for element formation thereunder is etched to form the groove 4 along the scribe line (FIG. 1 (c)). The depth of the groove 4 is not less than the sum of the variation in polishing in the general polishing step described later and the thickness required for element formation, for example, 1 to 2 μm or more, and the width of the groove 4 Is, for example, 0.5 μm to 1 mm. In the groove forming step, the photoresist 3 is removed and SiO ₂ is removed.
The film 2 may be used as a mask.

Then, with the photoresist 3 removed, as shown in FIG. 2D, the semiconductor wafer 1 for element formation is formed.
The SiO ₂ film 2 on the groove 4 side is bonded to the SiO ₂ film 6 on one surface of the supporting wafer 5 made of silicon. In this case, since the area of the groove 4 is small and the area of the bonding is large, the bonding strength thereof hardly decreases as compared with the case where the groove 4 is not provided.

Next, the surface of the element-forming semiconductor wafer 1 on which the groove 4 is not formed is ground to reduce the thickness of the element-forming semiconductor wafer 1 including the SiO ₂ film 2 to about 5 μm. Then, general polishing is performed using an alkaline polishing liquid to expose at least a part of the groove 4 (FIG. 2 (e)). According to this general polishing, the polished surface of the semiconductor wafer 1 for element formation is not flattened and has a variation of about 1 μm.

After that, the concentration of the alkaline polishing liquid is diluted to about 10 times that of the general polishing, and the selective polishing is performed by this, so that the thickness of the element forming semiconductor wafer 1 becomes smaller as the layer thickness becomes thinner. When the height of the remaining grooves 4 after subtracting the thickness of the SiO ₂ film 2 becomes, for example, 0.1 to 0.3 μm, polishing automatically stops and the thickness of the semiconductor wafer 1 for forming elements is adjusted. Becomes equal to the whole and is flattened (FIG. 2 (f)).
The height of the groove 4 with a uniform thickness can be changed by parameters such as the rotation speed and pressure of the polishing plate.
For example, if the number of rotations of the polishing platen is increased, the film thickness of the flattened element forming wafer 1 becomes thicker.

The constant film thickness can be changed depending on the concentration of the polishing liquid, the shape and width of the groove 4, and the film thickness of the SiO ₂ film 2 of the element forming wafer 1. For example, if the concentration of the polishing liquid is lowered, the film thickness of the element-forming semiconductor wafer 1 after selective polishing becomes thicker, and in the opposite case, it becomes thinner. Also, the groove 4
If the width is increased, the film thickness can be increased or the element formation region sandwiched by the grooves 4 can be increased.

The SOI substrate is completed by such selective polishing, and thereafter, the groove 4 of the element forming semiconductor wafer 1 is formed.
A semiconductor element will be formed in the region surrounded by. In this way, the remaining height of the groove 4 minus the SiO ₂ film 2 is
For example, the fact that the film thickness of the semiconductor wafer 1 for element formation becomes constant at the time when it becomes 0.1 to 0.3 μm is due to an experiment, and its mechanism has not been clarified accurately. (B) Description of another embodiment of the present invention In the above-mentioned embodiment, the SiO ₂ films 2 and 6 on the bonding surface are
Although it is forcibly formed by the CVD method or the thermal oxidation method, a natural oxide film may be used. That is, the element forming semiconductor wafer 1
A SiO ₂ film is formed on the surface of the supporting wafer 5
An O ₂ film is enough.

Further, in the above embodiment, the bonding surfaces of the element forming semiconductor wafer 1 and the supporting wafer 5 are bonded to each other.
Although the SiO ₂ films 2 and 6 are formed, it is sufficient that the SiO ₂ film is formed at least on the bottom surface of the groove 4 after bonding or in addition to this, the lower part of the side surface.

Further, even if the groove 4 is formed on the silicon exposed surface of the semiconductor wafer 1 for element formation, Si is not formed on the supporting wafer 5 side.
If the O ₂ film 6 is present, the thickness after the selective polishing becomes uniform, and the planarization can be achieved.

Although the grooves 4 are formed by wet etching in the above-mentioned embodiments, dry etching such as reactive ion etching or plasma etching may be applied. Although the groove 4 is formed along the scribe line of the semiconductor wafer for element formation, it may be formed in the element isolation region or the semiconductor circuit formation region.

[0028]

As described above, according to the present invention, the surfaces of the element-forming semiconductor wafer having the grooves formed therein are bonded to the insulating film of the supporting wafer, and the element-forming semiconductor wafer is polished to form the grooves. When the selective polishing using the polishing agent is performed after exposing, the selective polishing is automatically stopped when the height of the groove from the supporting wafer is lowered to a predetermined value. The height is uniform, and the thinned wafer for element formation has a uniform thickness, and the surface can be made flat.

In this case, the groove may be formed, for example, along the scribe line or the element isolation region, and since a large area is not particularly required, it is possible to secure a bonding area almost the same as when the groove is not provided, Wafer peeling can be prevented. Moreover, since polishing is stopped without the polishing cloth coming into contact with the insulating film, polishing dripping due to deformation of the polishing cloth can be essentially eliminated.

The thickness of the semiconductor wafer for element formation left after the selective polishing can be controlled by changing the shape of the groove, the concentration of the polishing liquid, the polishing conditions, etc., and the optimum thickness can be obtained. it can.

[Brief description of drawings]

FIG. 1 is a sectional view (1) showing an embodiment of the present invention.

FIG. 2 is a sectional view (2) showing an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a conventional method.

[Explanation of symbols]

1 Semiconductor wafer for element formation 2 SiO ₂ film (insulating film) 3 Photoresist 4 Groove 5 Supporting wafer 6 SiO ₂ film (insulating film)

Front Page Continuation (72) Inventor Yoshihiro Kiyokawa 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (5)

[Claims] 1. A step of forming grooves (4) in a plurality of regions on one surface of an element-forming semiconductor wafer (1), and insulating the one surface of the element-forming semiconductor wafer (1) from a supporting wafer (5). A step of laminating to the film (6), a step of generally polishing the other surface of the semiconductor wafer for element formation (1) to expose at least a part of the groove (4), and a selective polishing using an abrasive. A method of manufacturing a semiconductor device, further comprising the step of further polishing the other surface of the element-forming semiconductor wafer (1) to automatically flatten it. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the polishing agent used in the selective polishing is more diluted than the polishing agent used in the general polishing. .. 3. The element-forming semiconductor after the selective polishing by changing at least one of the shape of the groove (4) of the element-forming semiconductor wafer (1), the concentration of the polishing agent and polishing conditions. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the wafer (1) is controlled. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the groove (4) is formed in a scribe line or an element isolation region of the element forming semiconductor wafer (1). 5. The device forming semiconductor wafer (1) is a silicon wafer, the insulating film (6) of the supporting wafer (5) is a SiO ₂ film, and the groove (4) is formed. The one surface of the element forming semiconductor wafer (1) is a silicon surface or a SiO ₂ surface, and SiO ₂ from the bottom surface of the groove (4) on the supporting wafer (5) side which appears by polishing.
The semiconductor device according to claim 1, wherein the film (6) is exposed, or SiO ₂ (2) is exposed from a part of an inner peripheral surface of the groove (4) near the bottom surface. Manufacturing method.