JPH05289044A - Liquid crystal interplace display device - Google Patents

Liquid crystal interplace display device

Info

Publication number
JPH05289044A
JPH05289044A JP4088515A JP8851592A JPH05289044A JP H05289044 A JPH05289044 A JP H05289044A JP 4088515 A JP4088515 A JP 4088515A JP 8851592 A JP8851592 A JP 8851592A JP H05289044 A JPH05289044 A JP H05289044A
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal panel
video signal
display
horizontal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4088515A
Other languages
Japanese (ja)
Other versions
JP3309422B2 (en
Inventor
Hiroshi Miyai
宏 宮井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP08851592A priority Critical patent/JP3309422B2/en
Publication of JPH05289044A publication Critical patent/JPH05289044A/en
Application granted granted Critical
Publication of JP3309422B2 publication Critical patent/JP3309422B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Projection Apparatus (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE:To execute a high resolution display by a more inexpensive liquid crystal panel in which the number of picture elements is small, and to miniaturize the liquid crystal panel by providing a means for executing an interlace display of an image in a liquid crystal display device. CONSTITUTION:The liquid crystal interlace display device is constituted of a video display liquid crystal panel 2, a polarizer 3, a optical rotation control liquid crystal panel 18, a double refractive optical element 19, a video signal field memory, a scan conversion control circuit, and a blanking circuit, and constituted so that an interlace display is executed by moving a display position in the vertical direction of an image by 1/2 of a horizontal display line interval at every field at the time of displaying a video signal by dividing it into two fields.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は液晶パネルを用いた映像
信号のインタ−レス表示に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interlace display of video signals using a liquid crystal panel.

【0002】[0002]

【従来の技術】近年、小型テレビ、ラップトップ型OA
機器など液晶パネルを表示デバイスとした機器の商品化
が著しい。このような動きのなかで注目されるものの一
つに液晶ビデオプロジェクタがある。液晶ビデオプロジ
ェクタは従来のCRT型プロジェクタに対して小型、軽
量化が可能であり、表示性能の点でも幾何学歪みが少な
く、地磁気による影響が原理的にない、コンバ−ゼンス
精度が表示全面で均一に確保できる等の長所を持つ。一
方、液晶ビデオプロジェクタは映像をスクリ−ンに拡大
投写するので画素の粗さが目立つため直視型の液晶表示
装置に比較して高画素数の液晶パネルが必要であり、同
時に投写光学系の小型化の点から小型の液晶パネルが必
要である。以下に従来の液晶ビデオプロジェクタの基本
構成と液晶パネルの駆動について説明する。
2. Description of the Related Art Recently, small televisions and laptop OAs
Commercialization of equipment such as equipment that uses liquid crystal panels as display devices is remarkable. A liquid crystal video projector is one of the things that has attracted attention in this movement. Liquid crystal video projectors can be made smaller and lighter than conventional CRT projectors, have little geometric distortion in terms of display performance, are basically unaffected by geomagnetism, and have uniform convergence accuracy over the entire display. It has the advantage that it can be secured. On the other hand, since the liquid crystal video projector projects an image in a screen in an enlarged manner, the roughness of the pixels is conspicuous, so that a liquid crystal panel with a higher number of pixels is required than a direct-view type liquid crystal display device, and at the same time, the projection optical system is small. A small liquid crystal panel is required from the standpoint of improvement. The basic configuration of the conventional liquid crystal video projector and the driving of the liquid crystal panel will be described below.

【0003】図7は液晶ビデオプロジェックタの基本構
成の従来の一例を示すものである。図7において、1は
光源である。2は映像表示液晶パネル、3は偏光子、4
は検光子、5は投写レンズである。
FIG. 7 shows a conventional example of the basic configuration of a liquid crystal video projector. In FIG. 7, 1 is a light source. 2 is an image display liquid crystal panel, 3 is a polarizer, 4
Is an analyzer and 5 is a projection lens.

【0004】以上のように構成された液晶ビデオプロジ
ェックタについて、以下その動作について説明する。図
7の構成により光源1の白色自然光は偏光子3を通過す
ることにより直線偏光となる。ここで自然光は直交する
二つのベクトル成分(P成分とS成分と呼ぶ)の合成光
として考えられるため偏光子3の偏光方向をP成分と一
致させP成分のみが通過するものとする。映像表示液晶
パネル2は映像信号に従い入射したP成分の偏光を画素
ごとに旋光し偏光方向を制御する。検光子4は映像表示
液晶パネルを通過した偏光の偏光方向と検光子4の偏光
方向が一致した時に透過率が最大となり、直交した時に
最小となるため映像信号に応じた偏光方向制御により階
調表示ができる。以上の映像を投写レンズ5によりスク
リ−ン上に拡大投写する。投写映像の一例を図8に示
す。映像表示液晶パネル2の水平表示ライン数は240
本、すなわち1フレ−ムの水平走査線数の約半分しかな
い場合を示し、奇数フィ−ルドと偶数フィ−ルドの映像
は同一水平表示ラインに重ね書きされる。カラ−表示は
画素単位にカラ−フィルタを形成した映像表示液晶パネ
ルを用いる場合と、光源の白色光をダイクロイック光学
フィルタを用いて波長選択した赤、緑、青の三原色光を
それぞれの光学径路に配置した偏光子と映像表示液晶パ
ネルと検光子に通した後、再びダイクロイック光学フィ
ルタを用いて合成しフルカラ−映像にするなどの方法が
あるが本発明の原理とは直接関係しないため詳細は省略
する。
The operation of the liquid crystal video projector constructed as above will be described below. With the configuration of FIG. 7, the white natural light of the light source 1 becomes linearly polarized light by passing through the polarizer 3. Here, natural light is considered as a combined light of two orthogonal vector components (referred to as P component and S component), so that the polarization direction of the polarizer 3 is made to coincide with the P component and only the P component passes. The video display liquid crystal panel 2 controls the polarization direction by rotating the polarized light of the P component that has entered according to a video signal for each pixel. The transmittance of the analyzer 4 becomes maximum when the polarization direction of the polarized light passing through the image display liquid crystal panel and the polarization direction of the analyzer 4 coincide with each other, and becomes minimum when orthogonal to each other, so that the gradation is controlled by controlling the polarization direction according to the image signal. Can be displayed. The above image is enlarged and projected on the screen by the projection lens 5. An example of the projected image is shown in FIG. The number of horizontal display lines of the image display liquid crystal panel 2 is 240.
In the case of a book, i.e., about half the number of horizontal scanning lines of one frame, the images of the odd field and the even field are overwritten on the same horizontal display line. Color display uses an image display liquid crystal panel with a color filter formed on a pixel-by-pixel basis, and white light from a light source is wavelength-selected using a dichroic optical filter. After passing through the polarizer, the image display liquid crystal panel, and the analyzer that have been arranged, there is a method such as combining again using a dichroic optical filter to make a full-color image, but details are omitted because it is not directly related to the principle of the present invention. To do.

【0005】図9は液晶パネルの従来の駆動回路,図1
0はタイミング図を示す。図9において6はコンポジッ
ト映像信号から同期信号を分離する同期分離回路、7は
水平同期信号H、垂直同期信号Vに従って液晶パネルに
入力する各種タイミングパルス、クロックを発生する同
期制御回路、8はソ−スドライバ、9はゲ−トドライバ
を示す。図10のタイミング図において、aは水平周期
で見た映像信号、bは水平スタ−トパルスSH、cはサ
ンプリングクロックCKを示す。dは垂直周期で見た映
像信号、eは垂直スタ−トパルスSV、fはゲ−トクロ
ックGKを示す。水平周期で見た場合、ソ−スドライバ
8は水平スタ−トパルスSHでサンプリングを開始しサ
ンプリングクロックCKの立ち上がり毎に映像信号をサ
ンプリングする。垂直周期で見た場合、ゲ−トドライバ
9は、ゲ−トスタ−トパルスSVで垂直方向の走査を開
始し、ゲ−トクロックGKの立ち上がり毎に1番目から
最終番目まで水平表示ラインを順次表示する。
FIG. 9 is a conventional drive circuit for a liquid crystal panel, FIG.
0 indicates a timing diagram. In FIG. 9, 6 is a sync separation circuit for separating a sync signal from a composite video signal, 7 is various timing pulses input to a liquid crystal panel according to a horizontal sync signal H and a vertical sync signal V, a sync control circuit for generating a clock, and 8 is a so-called -Gear driver, 9 is a gate driver. In the timing chart of FIG. 10, a is a video signal seen in a horizontal cycle, b is a horizontal start pulse SH, and c is a sampling clock CK. d is a video signal viewed in a vertical cycle, e is a vertical start pulse SV, and f is a gate clock GK. When viewed in the horizontal cycle, the source driver 8 starts sampling with the horizontal start pulse SH and samples the video signal at every rising edge of the sampling clock CK. When viewed in the vertical cycle, the gate driver 9 starts scanning in the vertical direction with the gate start pulse SV, and sequentially displays the horizontal display lines from the first to the last at every rising of the gate clock GK. To do.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記の構
成では、以下に示す問題がある。すでに述べたように液
晶ビデオプロジェクタに使用する液晶パネルは高画素数
化と小型化が要求されるため画素密度が高く、その結果
生産歩留まりが低下しコストが高くなるという問題点を
有していた。
However, the above configuration has the following problems. As described above, the liquid crystal panel used in the liquid crystal video projector has a high pixel density because it is required to have a large number of pixels and a small size. As a result, the production yield is lowered and the cost is increased. ..

【0007】本発明は上記従来の問題点を解決するもの
で、2フィ−ルドに分けてインタ−レス走査した映像信
号を表示する際に1フィ−ルド分の水平表示ライン数を
有する映像表示液晶パネルと旋光制御液晶パネルと複屈
折光学板を用い、映像の垂直方向の表示位置をフィ−ル
ドごとに水平表示ライン間隔の2分の1だけ移動しイン
タ−レス表示することにより画素数の少ない安価な液晶
パネルで高解像度表示と液晶パネルの小型化を可能とす
ることを目的とする。
The present invention solves the above-mentioned conventional problems, and when displaying a video signal which is divided into two fields and subjected to interlace scanning, a video display having a horizontal display line number for one field. The liquid crystal panel, the optical rotation control liquid crystal panel, and the birefringent optical plate are used to move the display position in the vertical direction of the image by ½ of the horizontal display line interval for each field for interlaced display to reduce the number of pixels. The purpose of the present invention is to enable high-resolution display and downsizing of liquid crystal panels with few inexpensive liquid crystal panels.

【0008】[0008]

【課題を解決するための手段】この目的を達成するため
に本発明の液晶インタ−レス表示装置は以下の構成を有
している。
In order to achieve this object, the liquid crystal interface display device of the present invention has the following constitution.

【0009】(1)光源からの光を画素ごとに開閉し映
像表示をおこなう映像表示液晶パネルと、映像表示液晶
パネルに対して光の入射側に配置した偏光子と出射側に
配置した検光子と、検光子の出射側に配置し検光子を通
過した直線偏光の偏光方向を映像信号のフィ−ルド周期
で非旋光、90度旋光する旋光制御液晶パネルと、旋光
制御液晶パネルの出射側に配置し偏光方向により異なる
屈折率を示す複屈折性光学素子を備えた液晶インタ−レ
ス表示装置。
(1) An image display liquid crystal panel that opens and closes light from a light source for each pixel to display an image, a polarizer arranged on the light incident side and an analyzer arranged on the light emission side of the image display liquid crystal panel. And a rotation control liquid crystal panel which is arranged on the emission side of the analyzer and rotates the polarization direction of the linearly polarized light passing through the analyzer by 90 degrees at the field period of the video signal, and on the emission side of the rotation control liquid crystal panel. A liquid crystal interlace display device provided with a birefringent optical element which is arranged and exhibits different refractive indexes depending on the polarization direction.

【0010】(2)第一、第二の映像信号フィ−ルドメ
モリと奇数フィ−ルドでは第一の映像信号フィ−ルドメ
モリへの書き込みと第二の映像信号フィ−ルドメモリか
らの読み出しを行い、偶数フィ−ルドでは第一の映像信
号フィ−ルドメモリからの読み出しと第二の映像信号フ
ィ−ルドメモリへの書き込みを行い、書き込みに対して
読み出しを倍速でおこない、同時に読み出した倍速映像
信号に同期した倍速水平同期パルスと倍速垂直同期パル
スと倍速サンプリングクロックを発生し液晶パネルに入
力することにより1フィ−ルド期間に液晶パネルの水
平、垂直走査を二回おこなう走査変換制御回路と、二回
目の走査時に映像信号を消去するブランキング回路と、
一画素で構成した液晶パネルで全体の旋光制御を同時に
おこなう旋光制御液晶パネルを備えた液晶インタ−レス
表示装置。
(2) In the first and second video signal field memories and the odd field, writing to the first video signal field memory and reading from the second video signal field memory are performed, and even In the field, reading from the first video signal field memory and writing to the second video signal field memory are performed, reading is performed at double speed for writing, and double speed synchronized with the simultaneously read double speed video signal. By generating a horizontal synchronizing pulse, a double speed vertical synchronizing pulse, and a double speed sampling clock and inputting them to the liquid crystal panel, a scan conversion control circuit that performs horizontal and vertical scanning of the liquid crystal panel twice in one field period, and at the time of the second scanning A blanking circuit that erases the video signal,
A liquid crystal interface display device equipped with an optical rotation control liquid crystal panel that simultaneously controls the optical rotation of the entire liquid crystal panel composed of one pixel.

【0011】(3)フィ−ルド周期の電圧印加により偏
光方向の回転をおこなう電気光学効果を有する電気光学
結晶板を備えた液晶インタ−レス表示装置。
(3) A liquid crystal interface display device provided with an electro-optic crystal plate having an electro-optic effect of rotating the polarization direction by applying a voltage of a field period.

【0012】(4)水平ラインごとに一画素を構成し、
水平同期パルスで水平ラインごとに順次、旋光制御をお
こなう水平独立旋光制御液晶パネルを備えた液晶インタ
−レス表示装置。
(4) One pixel is formed for each horizontal line,
A liquid crystal interface display device equipped with a horizontal independent optical rotation control liquid crystal panel that controls optical rotation sequentially for each horizontal line with a horizontal synchronization pulse.

【0013】[0013]

【作用】この構成によって2フィ−ルドに分けてインタ
−レス走査した映像信号を表示する際に映像の垂直方向
の表示位置をフィ−ルドごとに水平表示ライン間隔の2
分の1だけ移動しインタ−レス表示することにより画素
数の少ない安価な液晶パネルで高解像度表示と液晶パネ
ルの小型化を可能とすることができる。
With this configuration, when displaying an interlace-scanned video signal divided into two fields, the display position in the vertical direction of the video is divided into two horizontal display line intervals for each field.
It is possible to realize high resolution display and downsizing of the liquid crystal panel with an inexpensive liquid crystal panel having a small number of pixels by moving only one-half and performing interlace display.

【0014】[0014]

【実施例】以下に本発明の実施例について図面を参照し
ながら説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0015】本発明の第一の実施例の基本光学系を図
1、旋光制御液晶パネル6の構造図を図2、駆動回路ブ
ロック図を図3、タイミング図を図4に示す。図1にお
いて18は旋光制御液晶パネル、19は複屈折性光学素
子である。図2において20は液晶、21はガラス基
板、10、11は透明電極である。図3において12は
第一の映像信号フィ−ルドメモリ、13は第二の映像信
号フィ−ルドメモリ、14は走査変換制御回路、15は
ブランキング回路、16はAD変換器、17はDA変換
器である。
FIG. 1 shows the basic optical system of the first embodiment of the present invention, FIG. 2 is a structural diagram of the optical rotation control liquid crystal panel 6, FIG. 3 is a drive circuit block diagram, and FIG. 4 is a timing diagram. In FIG. 1, reference numeral 18 denotes a rotation control liquid crystal panel, and 19 denotes a birefringent optical element. In FIG. 2, 20 is a liquid crystal, 21 is a glass substrate, and 10 and 11 are transparent electrodes. In FIG. 3, 12 is a first video signal field memory, 13 is a second video signal field memory, 14 is a scan conversion control circuit, 15 is a blanking circuit, 16 is an AD converter, and 17 is a DA converter. is there.

【0016】次ぎに第一の実施例の基本動作について説
明する。旋光制御液晶パネル18は図2に示したように
液晶20の両面全体を各々透明電極10、11で挟む構
造をしている。従って図4のgに示す旋光制御液晶パネ
ル駆動信号DDによりフィ−ルド周期で透明電極10、
11間の電圧をオン、オフすると液晶20は入射光の非
旋光、90度旋光を繰り返す。ここでオン時の電圧極性
は交互に正負反転して交流駆動する。以上により検光子
4を出たP成分(検光子4の偏光方向はP成分と一致さ
せるものとする)はフィ−ルド周期でP成分(非旋
光)、S成分(90度旋光)に偏光方向が回転する。複
屈折性光学素子19は水晶、方解石のような異方性結晶
を用いて結晶の光学軸の方向を設定すればP成分、S成
分に対する屈折率の相違から図1に示すようにP成分、
S成分の光を垂直方向に分離することができる。なお、
分離の間隔は複屈折性光学素子19の厚みで設定する。
以上のようにして映像信号のインタ−レス走査に応じ、
奇数フィ−ルドに対する偶数フィ−ルドの映像を垂直方
向に水平表示ライン間隔の2分の1だけ移動することに
よりインタ−レス表示が可能である。スクリ−ン上での
表示例を図5に示す。
Next, the basic operation of the first embodiment will be described. As shown in FIG. 2, the optical rotation control liquid crystal panel 18 has a structure in which the entire surface of the liquid crystal 20 is sandwiched between the transparent electrodes 10 and 11, respectively. Therefore, the transparent electrode 10 has a field cycle according to the optical rotation control liquid crystal panel drive signal DD shown in g of FIG.
When the voltage across 11 is turned on and off, the liquid crystal 20 repeats non-rotation of incident light and 90-degree rotation. Here, the voltage polarity at the time of turning on is alternately inverted, and AC drive is performed. As described above, the P component emitted from the analyzer 4 (the polarization direction of the analyzer 4 is made to match the P component) is polarized into the P component (non-optical rotation) and the S component (90 ° optical rotation) in the field cycle. Rotates. The birefringent optical element 19 is a P component if the direction of the optical axis of the crystal is set by using an anisotropic crystal such as quartz or calcite, and as shown in FIG.
The S component light can be separated in the vertical direction. In addition,
The separation interval is set by the thickness of the birefringent optical element 19.
As described above, according to the interlace scanning of the video signal,
Interlaced display is possible by moving the image of the even field with respect to the odd field in the vertical direction by ½ of the horizontal display line interval. An example of the display on the screen is shown in FIG.

【0017】次ぎに映像表示液晶パネル2の駆動方法に
ついて説明する。図4a〜fのタイミング図に示すよう
に水平走査周波数15.75KHz、垂直走査周波数6
0Hzの映像信号に対して倍速走査変換した水平走査周
波数31.5KHz、垂直走査周波数120Hzの映像
信号を映像表示液晶パネル2に入力し、1フィ−ルド期
間に2回水平、垂直走査をおこなう。ただし図4のdに
示すように2回目の垂直走査時は映像信号は消去する。
なお、奇数、偶数フィ−ルドの水平走査線表示は従来と
同様に240本の水平表示ラインに重ね書きする。以上
のように映像表示液晶パネル2においては1フィ−ルド
の映像を表示し、一旦消去した後に次ぎのフィ−ルドを
表示し、旋光制御液晶パネル18においてはフィ−ルド
の変わり目ごとにスクリ−ン上の垂直表示位置を移動す
ることで正確なインタ−レス表示が可能となる。ちなみ
に映像表示液晶パネル2を従来の方法で駆動した場合
は、例えば第一フィ−ルドで書き込みされた240本目
の水平表示ラインの映像は書き込み直後から第二フィ−
ルドで再び書き込まれるまで液晶に書き込み内容が保持
されるため、第一フィ−ルドの映像が大半の期間、第二
フィ−ルドの映像として垂直位置のずれた位置に誤って
表示されることになる。このような理由で本発明の倍速
駆動が必要である。なお図3の駆動回路ブロック図にお
いて第一の映像信号フィ−ルドメモリ12と、第二の映
像信号フィ−ルドメモリ13は奇数フィ−ルドと偶数フ
ィ−ルドで映像信号の書き込みと読み出しを交互におこ
なう。また読み出しクロックRCKは書き込みクロック
WCKに対して倍速であり、1フィ−ルド期間に2回読
み出す。ブランキング回路15は1フィ−ルド期間の2
回目の読み出しに対して映像信号を消去する。これらに
より図4のdに示す倍速映像信号が得られる。走査変換
制御回路14は前記のフィ−ルドメモリ書き込みクロッ
クWCK,読み出しクロックRCK、映像表示液晶パネ
ル2の水平垂直倍速走査に必要な倍速サンプリングクロ
ック2CK、倍速水平スタ−トパルス2SH,倍速ゲ−
トクロック2GK、倍速垂直スタ−トパルス2SVを発
生する。
Next, a method of driving the image display liquid crystal panel 2 will be described. The horizontal scanning frequency is 15.75 KHz and the vertical scanning frequency is 6 as shown in the timing charts of FIGS.
A video signal having a horizontal scanning frequency of 31.5 KHz and a vertical scanning frequency of 120 Hz obtained by double-speed scanning conversion of a video signal of 0 Hz is input to the video display liquid crystal panel 2, and horizontal and vertical scanning is performed twice in one field period. However, as shown in FIG. 4D, the video signal is erased during the second vertical scanning.
The horizontal scanning line display of odd and even fields is overwritten on 240 horizontal display lines as in the conventional case. As described above, one field image is displayed on the image display liquid crystal panel 2, the next field is displayed after being erased once, and the screen is displayed at each turn of the field on the optical rotation control liquid crystal panel 18. Accurate interlace display is possible by moving the vertical display position on the screen. By the way, when the image display liquid crystal panel 2 is driven by the conventional method, for example, the image of the 240th horizontal display line written in the first field immediately after the second field is written.
Since the written contents are retained in the liquid crystal until it is written again in the field, the image of the first field is erroneously displayed as the image of the second field in a position displaced from the vertical position for most of the time. Become. For this reason, the double speed drive of the present invention is necessary. In the drive circuit block diagram of FIG. 3, the first video signal field memory 12 and the second video signal field memory 13 alternately perform writing and reading of video signals in odd fields and even fields. .. Further, the read clock RCK has a speed double that of the write clock WCK and is read twice in one field period. The blanking circuit 15 has 2 in 1 field period.
The video signal is erased for the second reading. As a result, the double speed video signal shown in d of FIG. 4 is obtained. The scan conversion control circuit 14 includes the field memory write clock WCK, the read clock RCK, the double speed sampling clock 2CK necessary for the horizontal and vertical double speed scanning of the video display liquid crystal panel 2, the double speed horizontal start pulse 2SH, and the double speed gate.
2GK, and a double speed vertical start pulse 2SV are generated.

【0018】本発明の第二の実施例は図1の旋光制御液
晶パネル18の代わりにリン酸二水素カリウム(KD
P)の結晶板などの電気光学効果をもつ電気光学結晶板
16を用いてフィ−ルド周期の電圧印加による偏光方向
の回転をおこなうものである。その他の構成と動作は第
一の実施例と同様である。
The second embodiment of the present invention uses potassium dihydrogen phosphate (KD) instead of the optical rotation control liquid crystal panel 18 of FIG.
By using the electro-optic crystal plate 16 having an electro-optic effect such as the crystal plate of P), the polarization direction is rotated by applying a voltage with a field period. Other configurations and operations are similar to those of the first embodiment.

【0019】本発明の第三の実施例は図1の旋光制御液
晶パネル18の代わりに水平分離旋光制御液晶パネル1
7を用いるものである。水平分離旋光制御液晶パネル1
7は図6に示すように水平ラインごとの液晶の旋光が可
能なように、水平ラインごとに分離され、ゲ−トドライ
バ9で駆動する。すなわち映像表示液晶パネル2から水
平方向の画素分離を削除し、ソ−ス側電極を一つにした
構造をもつ。そして映像表示液晶パネル2の一つの水平
表示ラインの出射光が水平分離旋光制御液晶パネル17
一つの水平ラインに入射するように映像表示液晶パネル
2に近接して配置する。第三の実施例では映像表示液晶
パネル2の駆動のタイミング図は図10に示した従来例
と全く同等である。水平分離旋光制御液晶パネル17の
駆動はソ−ス側については第一の実施例の旋光制御液晶
パネル駆動信号DDと同等のものを用い、ゲ−ト側につ
いては映像表示液晶パネル2に入力するものと同じゲ−
トクロックGKと垂直スタ−トパルスSVを用いる。以
上により映像表示液晶パネル2の水平ライン表示に応じ
て1ラインごとに順次、スクリ−ン上の垂直表示位置を
移動しインタ−レス表示が可能となる。第三の実施例で
はCRTディスプレィと同様に1ラインごとに垂直表示
位置を移動できるため正確なインタ−レス表示が可能で
あることは明白である。なお、ハイビジョン映像表示装
置としても本発明は極めて有効な手段を提供できるのは
言うまでもない。
The third embodiment of the present invention is a horizontal separation optical rotation control liquid crystal panel 1 instead of the optical rotation control liquid crystal panel 18 of FIG.
7 is used. Horizontally separated optical rotation control liquid crystal panel 1
As shown in FIG. 6, 7 is separated for each horizontal line so that liquid crystal can be rotated for each horizontal line, and is driven by a gate driver 9. That is, it has a structure in which the pixel separation in the horizontal direction is eliminated from the image display liquid crystal panel 2 and only one source side electrode is provided. Then, the light emitted from one horizontal display line of the image display liquid crystal panel 2 is horizontally separated and rotated and controlled.
The image display liquid crystal panel 2 is arranged in proximity to one horizontal line. In the third embodiment, the timing chart for driving the image display liquid crystal panel 2 is exactly the same as that of the conventional example shown in FIG. The horizontal separation optical rotation control liquid crystal panel 17 is driven by using a signal equivalent to the optical rotation control liquid crystal panel drive signal DD of the first embodiment on the source side and input to the image display liquid crystal panel 2 on the gate side. The same game as
Tok clock GK and vertical start pulse SV are used. As described above, the vertical display position on the screen is sequentially moved line by line in accordance with the horizontal line display of the video display liquid crystal panel 2, and the interlace display becomes possible. In the third embodiment, since the vertical display position can be moved line by line as in the CRT display, it is clear that accurate interlaced display is possible. It is needless to say that the present invention can provide extremely effective means as a high-definition video display device.

【0020】[0020]

【発明の効果】以上のように本発明によれば、映像の垂
直方向の表示位置をフィ−ルドごとに水平表示ライン間
隔の2分の1だけ移動しインタ−レス表示することによ
り画素数の少ないより安価な液晶パネルで高解像度表示
と液晶パネルの小型化を可能にすることができる。
As described above, according to the present invention, the display position in the vertical direction of an image is moved by ½ of the horizontal display line interval for each field and the interlace display is performed to reduce the number of pixels. It is possible to realize high-resolution display and downsizing of the liquid crystal panel with a few less expensive liquid crystal panels.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第一の実施例における液晶インターレ
ス表示装置の基本光学系構成図
FIG. 1 is a block diagram of a basic optical system of a liquid crystal interlace display device according to a first embodiment of the present invention.

【図2】本発明の第一の実施例における旋光制御液晶パ
ネルの構造図
FIG. 2 is a structural diagram of an optical rotation control liquid crystal panel in the first embodiment of the present invention.

【図3】本発明の第一の実施例における駆動回路のブロ
ック図
FIG. 3 is a block diagram of a drive circuit according to the first embodiment of the present invention.

【図4】本発明の第一の実施例の駆動タイミング図FIG. 4 is a drive timing chart of the first embodiment of the present invention.

【図5】本発明のスクリーン上の表示例を示す図FIG. 5 is a diagram showing a display example on the screen of the present invention.

【図6】本発明の第二の実施例における液晶インターレ
ス表示装置の水平分離旋光制御液晶パネルの構成図
FIG. 6 is a configuration diagram of a horizontal separation optical rotation control liquid crystal panel of a liquid crystal interlace display device according to a second embodiment of the present invention.

【図7】従来の液晶ビデオプロジェックタの基本光学系
を示す構成図
FIG. 7 is a block diagram showing a basic optical system of a conventional liquid crystal video projector.

【図8】従来のスクリーン上の表示例を示す図FIG. 8 is a diagram showing a display example on a conventional screen.

【図9】従来の液晶パネルの駆動回路のブロック図FIG. 9 is a block diagram of a conventional liquid crystal panel drive circuit.

【図10】従来の駆動タイミング図FIG. 10 is a conventional drive timing chart.

【符号の説明】[Explanation of symbols]

2 映像表示液晶パネル 3 偏光子 4 検光子 12 第一の映像信号フィールドメモリ 13 第二の映像信号フィールドメモリ 14 走査変換制御回路 15 ブランキング回路 16 電気光学結晶板 17 水平独立旋光制御液晶パネル 18 旋光制御液晶パネル 19 複屈折性光学素子 2 image display liquid crystal panel 3 polarizer 4 analyzer 12 first image signal field memory 13 second image signal field memory 14 scan conversion control circuit 15 blanking circuit 16 electro-optic crystal plate 17 horizontal independent optical rotation control liquid crystal panel 18 optical rotation Control liquid crystal panel 19 Birefringent optical element

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 光源からの光を画素ごとに開閉し映像表
示をおこなう映像表示液晶パネルと、映像表示液晶パネ
ルに対して光の入射側に配置した偏光子と出射側に配置
した検光子と、検光子の出射側に配置し検光子を通過し
た直線偏光の偏光方向を映像信号のフィ−ルド周期で非
旋光、90度旋光する旋光制御液晶パネルと、旋光制御
液晶パネルの出射側に配置し偏光方向により異なる屈折
率を示す複屈折性光学素子を備えた液晶インタ−レス表
示装置。
1. An image display liquid crystal panel for opening and closing light from a light source for each pixel to display an image, a polarizer arranged on an incident side of light and an analyzer arranged on an exit side of the image display liquid crystal panel. , A rotation control liquid crystal panel that is arranged on the exit side of the analyzer and rotates the polarization direction of the linearly polarized light that has passed through the analyzer by 90 degrees in the field cycle of the video signal, and on the exit side of the rotation control liquid crystal panel. A liquid crystal interface display device including a birefringent optical element that exhibits different refractive indexes depending on the polarization direction.
【請求項2】 第一、第二の映像信号フィ−ルドメモリ
と、奇数フィ−ルドでは第一の映像信号フィ−ルドメモ
リへの書き込みと第二の映像信号フィ−ルドメモリから
の読み出しを行い、偶数フィ−ルドでは第一の映像信号
フィ−ルドメモリからの読み出しと第二の映像信号フィ
−ルドメモリへの書き込みを行い、書き込みに対して読
み出しを倍速でおこない、同時に読み出した倍速映像信
号に同期した倍速水平同期パルスと倍速垂直同期パルス
と倍速サンプリングクロックを発生し液晶パネルに入力
することにより1フィ−ルド期間に液晶パネルの水平、
垂直走査を二回おこなう走査変換制御回路と、二回目の
走査時に映像信号を消去するブランキング回路と一画素
で構成した液晶パネルで全体の旋光制御を同時におこな
う旋光制御液晶パネルを備えた液晶インタ−レス表示装
置。
2. In the first and second video signal field memories, and in the odd field, writing to the first video signal field memory and reading from the second video signal field memory are performed, and even number is performed. In the field, reading from the first video signal field memory and writing to the second video signal field memory are performed, reading is performed at double speed for writing, and double speed synchronized with the simultaneously read double speed video signal. The horizontal sync pulse, the double speed vertical sync pulse, and the double speed sampling clock are generated and input to the liquid crystal panel.
A liquid crystal interface equipped with a scan conversion control circuit that performs vertical scanning twice, a blanking circuit that erases the video signal during the second scan, and a liquid crystal panel configured by one pixel that simultaneously controls the overall optical rotation. -Less display device.
【請求項3】 旋光制御液晶パネルの代わりに、フィ−
ルド周期の電圧印加により偏光方向の回転をおこなう電
気光学効果を有する電気光学結晶板を備えた請求項1、
2記載の液晶インタ−レス表示装置。
3. A liquid crystal panel instead of the optical rotation control liquid crystal panel
2. An electro-optic crystal plate having an electro-optic effect that rotates the polarization direction by applying a voltage of a pulse period.
2. The liquid crystal interface display device according to 2.
【請求項4】 旋光制御液晶パネル代わりに、水平ライ
ンごとに一画素を構成し、水平同期パルスで水平ライン
ごとに順次、旋光制御をおこなう水平独立旋光制御液晶
パネルを備えた請求項1、2記載の液晶インタ−レス表
示装置。
4. A horizontal independent optical rotation control liquid crystal panel, which constitutes one pixel for each horizontal line and sequentially controls optical rotation for each horizontal line by a horizontal synchronizing pulse, instead of the optical rotation control liquid crystal panel. The liquid crystal interface display device described.
JP08851592A 1992-04-09 1992-04-09 LCD interlace display device Expired - Fee Related JP3309422B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP08851592A JP3309422B2 (en) 1992-04-09 1992-04-09 LCD interlace display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08851592A JP3309422B2 (en) 1992-04-09 1992-04-09 LCD interlace display device

Publications (2)

Publication Number Publication Date
JPH05289044A true JPH05289044A (en) 1993-11-05
JP3309422B2 JP3309422B2 (en) 2002-07-29

Family

ID=13944969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP08851592A Expired - Fee Related JP3309422B2 (en) 1992-04-09 1992-04-09 LCD interlace display device

Country Status (1)

Country Link
JP (1) JP3309422B2 (en)

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US5537256A (en) * 1994-10-25 1996-07-16 Fergason; James L. Electronic dithering system using birefrigence for optical displays and method
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US5572341A (en) * 1994-10-25 1996-11-05 Fergason; James L. Electro-optical dithering system using birefringence for optical displays and method
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US5715029A (en) * 1994-10-25 1998-02-03 Fergason; James L. Optical dithering system using birefringence for optical displays and method
US6061103A (en) * 1995-01-20 2000-05-09 Olympus Optical Co., Ltd. Image display apparatus
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US7843417B2 (en) 1994-10-25 2010-11-30 Fergason Patent Properties, Llc Optical display system and method, active and passive dithering using birefringence, color image superpositioning and display enhancement with phase coordinated polarization switching
US7843418B2 (en) 1994-10-25 2010-11-30 Fergason Patent Properties, Llc Optical display system and method, active and passive dithering using birefringence, color image superpositioning and display enhancement with phase coordinated polarization switching
US5572341A (en) * 1994-10-25 1996-11-05 Fergason; James L. Electro-optical dithering system using birefringence for optical displays and method
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US5715029A (en) * 1994-10-25 1998-02-03 Fergason; James L. Optical dithering system using birefringence for optical displays and method
US5537256A (en) * 1994-10-25 1996-07-16 Fergason; James L. Electronic dithering system using birefrigence for optical displays and method
US6184969B1 (en) 1994-10-25 2001-02-06 James L. Fergason Optical display system and method, active and passive dithering using birefringence, color image superpositioning and display enhancement
US6243055B1 (en) 1994-10-25 2001-06-05 James L. Fergason Optical display system and method with optical shifting of pixel position including conversion of pixel layout to form delta to stripe pattern by time base multiplexing
US6816141B1 (en) 1994-10-25 2004-11-09 Fergason Patent Properties Llc Optical display system and method, active and passive dithering using birefringence, color image superpositioning and display enhancement with phase coordinated polarization switching
US6061103A (en) * 1995-01-20 2000-05-09 Olympus Optical Co., Ltd. Image display apparatus
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US7125121B2 (en) 2002-02-25 2006-10-24 Ricoh Company, Ltd. Image display apparatus
US7322700B2 (en) 2002-02-25 2008-01-29 Ricoh Company, Ltd. Image display apparatus
US9847073B2 (en) 2003-03-10 2017-12-19 Fergason Licensing Llc Apparatus and method for preparing, storing, transmitting and displaying images
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